JPS60181776A - Manufacture of display panel - Google Patents

Manufacture of display panel

Info

Publication number
JPS60181776A
JPS60181776A JP3704184A JP3704184A JPS60181776A JP S60181776 A JPS60181776 A JP S60181776A JP 3704184 A JP3704184 A JP 3704184A JP 3704184 A JP3704184 A JP 3704184A JP S60181776 A JPS60181776 A JP S60181776A
Authority
JP
Japan
Prior art keywords
transparent electrode
display panel
forming
conductive film
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3704184A
Other languages
Japanese (ja)
Inventor
正 長谷川
謙次 岡元
雅行 脇谷
佐藤 精威
三浦 照信
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP3704184A priority Critical patent/JPS60181776A/en
Publication of JPS60181776A publication Critical patent/JPS60181776A/en
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 発明の技術分野 本発明は透明電極上に該透明電極の一部を露出させて形
成された薄膜を介し導′tFi、膜を形成し、該導電膜
をエツチングによりパターニングして上部電極を形成す
るディスプレイパネルの製造方法の改良に関するもので
ある。
Detailed Description of the Invention Technical Field of the Invention The present invention is a method of forming a conductive film on a transparent electrode through a thin film formed by exposing a part of the transparent electrode, and patterning the conductive film by etching. The present invention relates to an improvement in a method for manufacturing a display panel in which an upper electrode is formed by forming an upper electrode.

従来技術と問題点 従来この種のディスプレイパネルの上部電極形成に際し
ては、薄膜エレクトロルミネッセンスパネルIを例にと
った第1図に示すように、ガラス基板1の上に透明電極
(rro膜)2を形成して、その上K Si3N4 O
絶縁層3. ZnS:Knの発光層4゜Si3N4の絶
縁層5よシなる薄膜を積層し、次にその上にAt等の導
電膜6を蒸着した後、その上にレジストパターン7を形
成し、該レジストパターン7をマスクとして導電膜6の
エツチングを行なって上部電極(背面電極)を形成する
。なお、レジストパターン8轄、レジスト膜を塗布して
これに所定パターンで嬉光した後、現像を行うことによ
り形成される。
Prior Art and Problems Conventionally, when forming the upper electrode of this type of display panel, a transparent electrode (RRO film) 2 is formed on a glass substrate 1, as shown in FIG. forming and then K Si3N4 O
Insulating layer 3. A thin film such as a light emitting layer 4 of ZnS:Kn and an insulating layer 5 of Si3N4 is laminated, and then a conductive film 6 of At or the like is deposited thereon, and a resist pattern 7 is formed thereon. Using 7 as a mask, the conductive film 6 is etched to form an upper electrode (back electrode). The resist pattern 8 is formed by applying a resist film, exposing it to a predetermined pattern, and then developing it.

この場合、レジストの現像、導電膜のエツチングは、透
明電極2の一部が薄膜から露出したままで行われていた
ため、これらの工程時に透明電極2の薄膜から露出して
いる部分(薄膜を積層しない部分)が黒く変色し、さら
には断線するという欠点があった。
In this case, developing the resist and etching the conductive film were performed with part of the transparent electrode 2 exposed from the thin film. The disadvantage was that the parts that were not connected) turned black and even broke.

また、この現像、エツチング時に各電極がレジスト現像
液、電極エツチング液等のアルカリ溶液に浸された場合
、そこに一種の電池が形成され両電極間に起電力が生じ
る。従って、第2図に示すように両電極間の薄膜8中に
ピンホール9が存在し、両電極間が低抵抗になっている
場合、そこに図中矢印線で示すように電流が流れ、上部
電極から透明前&2へ電子が供給される。そして、例え
ば透明電極が酸化インジウム(In20B)の場合、I
n20B + 6g:→21n+ 50”−のような還
元反応が起9、これにより透明電極が黒く変色し、さら
には断線が生じることになる。
Further, when each electrode is immersed in an alkaline solution such as a resist developer or an electrode etching solution during this development and etching, a kind of battery is formed there and an electromotive force is generated between the two electrodes. Therefore, as shown in FIG. 2, if a pinhole 9 exists in the thin film 8 between the two electrodes and the resistance between the two electrodes is low, current will flow there as shown by the arrow line in the figure. Electrons are supplied from the upper electrode to the transparent front &2. For example, if the transparent electrode is indium oxide (In20B), I
A reduction reaction such as n20B + 6g:→21n+ 50''- occurs9, which causes the transparent electrode to turn black and further to cause disconnection.

発明の目的 本発明は上述の欠点を解決するだめのもので、透明電極
の薄膜を積層しない部分に変色、断線が生じるのを防止
することのできるディスプレイパネルの製造方法を提供
することを目的としている。
Purpose of the Invention The present invention is intended to solve the above-mentioned drawbacks, and an object of the present invention is to provide a method for manufacturing a display panel that can prevent discoloration and disconnection from occurring in areas where a thin film of transparent electrodes is not laminated. There is.

発明の構成 本発明では、透明電極上の薄膜を積層しない部分に、レ
ジストパターン形成用現像液及び上部電極形成用エツチ
ング液に耐える保護層をレジストパターン形成に先だっ
て形成しておき、この状態でレジストのパターニング及
び導電膜のエツチングを行なって上部電極を形成するよ
うにして上記目的の達成を図っている。
Structure of the Invention In the present invention, a protective layer that is resistant to a developer for forming a resist pattern and an etching solution for forming an upper electrode is formed on a portion of a transparent electrode where a thin film is not laminated, prior to forming a resist pattern. The above object is achieved by patterning the conductive film and etching the conductive film to form the upper electrode.

発明の実施例 以下、第6図に関連して本発明の詳細な説明する。図中
、従来と同一構成の部材は従来と同一符号を付している
DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will now be described in detail with reference to FIG. In the drawings, members having the same configuration as the conventional one are given the same symbols as the conventional one.

本発明では、透明′電極2の薄膜を積層しない部分に、
レジストパターン形成用現像液及び上部電極形成用エツ
チング液に耐える保護層11をレジストパターン形成に
先立って形成しておいてレジストのパターニング及び導
電膜のエツチングを行なう。このように、透明電極2の
露出部分を保護層11によシ保護した状態で現像、エツ
チングが行われるため、これらの工程時における透明電
極露出部分の変色、断面を確実に防止することができる
In the present invention, in the part of the transparent electrode 2 where the thin film is not laminated,
A protective layer 11 that is resistant to a developer for forming a resist pattern and an etching solution for forming an upper electrode is formed prior to forming a resist pattern, and patterning of the resist and etching of the conductive film are performed. In this way, since development and etching are performed with the exposed portion of the transparent electrode 2 protected by the protective layer 11, discoloration and cross-section of the exposed portion of the transparent electrode can be reliably prevented during these steps. .

なお、第6図では、レジスト膜により保護層11を形成
する例を示しており、この場合の保護層11は、レジス
トパターン7形成用のレジスト膜を透明電極露出部分ま
で全面的に塗布し、これをレジストパターン7形成用に
図示の形状に同時にパターニングして形成される。この
方法による場合は、保護層11形成はレジストパターン
7と同工程で行われるため特別な工程が不要で工数的に
有利であり、しかも透明電極2上に積層される薄膜の端
面も保護層11によシ保繰される。
Note that FIG. 6 shows an example in which the protective layer 11 is formed using a resist film. This is simultaneously patterned into the shape shown in the figure for forming the resist pattern 7. In this method, the protective layer 11 is formed in the same process as the resist pattern 7, so there is no need for a special process, which is advantageous in terms of man-hours. It will be kept safe.

保護層の形成は、上述のレジスト膜による他に、テープ
叫を貼ることによっても実現できる。
The protective layer can be formed not only by using the above-mentioned resist film but also by applying tape.

以上の説明では薄膜エレクトロルミネッセンスパネルの
例について述べたが、本発明はエレクトロクロミックデ
ィスプレイパネルあるいは液晶ディスプレイ等の他のデ
ィスプレイパネルの製造にも適用可能である。
Although the above description has been made with reference to thin film electroluminescent panels, the present invention is also applicable to the manufacture of other display panels such as electrochromic display panels or liquid crystal displays.

発明の効果 以上述べたように、本発明によれば、ディスプレイパネ
ルの製造工程中における透明電極の変色。
Effects of the Invention As described above, according to the present invention, discoloration of the transparent electrode during the manufacturing process of the display panel can be prevented.

断面を防止することができ、製造歩′tlIシの同上及
びパネル性能の同上を図ることが可能である。
It is possible to prevent cross-sections, and it is possible to improve the manufacturing process and the panel performance.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の製造方法による薄膜エレクトロルミネッ
センスパネルの製造要領説明図、第2図は同問題点説明
図、第6図は本発明に係るディスプレイパネルの製造方
法の実施例を示す保繰層形成要領図で、図中、1はガラ
ス基板、2は透明電極、6,5は絶縁層、4は発光層、
6は導電膜、7はレジストパターン、8は薄膜、11は
保護層である。 特許出願人富士通株式会社 代理人弁理士玉蟲久五部(外1名)
FIG. 1 is an explanatory diagram of the manufacturing procedure of a thin film electroluminescent panel by a conventional manufacturing method, FIG. 2 is an explanatory diagram of the same problem, and FIG. 6 is a storage layer showing an embodiment of the method of manufacturing a display panel according to the present invention. In the figure, 1 is a glass substrate, 2 is a transparent electrode, 6 and 5 are insulating layers, 4 is a light emitting layer,
6 is a conductive film, 7 is a resist pattern, 8 is a thin film, and 11 is a protective layer. Patent applicant Fujitsu Ltd. Representative Patent Attorney Gobe Tamamushi (1 other person)

Claims (1)

【特許請求の範囲】[Claims] 透明電極上に核透明電極の一部を露出させて積層された
薄膜を介し導電膜を形成し、該導電膜を該導電膜上に形
成されたレジストパターンを用いてエツチングすること
によシ上部電極を形成するディスプレイパネルの製造方
法において、前記透明電極上の前記薄膜を形成しない部
分に、前記レジストパターンを形成するだめの現像液及
び前記上部電極を形成するだめのエラチン2液に耐える
保護層を形成しておき、この状態で現像液およびエツチ
ング液による処理を行うことを特徴とするディスプレイ
パネルの製造方法。
A part of the core transparent electrode is exposed on the transparent electrode, a conductive film is formed through the laminated thin film, and the conductive film is etched using a resist pattern formed on the conductive film. In the method for manufacturing a display panel in which an electrode is formed, a protective layer is provided on a portion of the transparent electrode where the thin film is not formed, and is resistant to a developer for forming the resist pattern and an elatin solution for forming the upper electrode. 1. A method for manufacturing a display panel, which comprises forming a layer, and performing processing using a developer and an etching solution in this state.
JP3704184A 1984-02-28 1984-02-28 Manufacture of display panel Pending JPS60181776A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3704184A JPS60181776A (en) 1984-02-28 1984-02-28 Manufacture of display panel

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3704184A JPS60181776A (en) 1984-02-28 1984-02-28 Manufacture of display panel

Publications (1)

Publication Number Publication Date
JPS60181776A true JPS60181776A (en) 1985-09-17

Family

ID=12486517

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3704184A Pending JPS60181776A (en) 1984-02-28 1984-02-28 Manufacture of display panel

Country Status (1)

Country Link
JP (1) JPS60181776A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007164183A (en) * 2005-12-09 2007-06-28 Samsung Sdi Co Ltd Flat panel display and method of fabricating the same

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007164183A (en) * 2005-12-09 2007-06-28 Samsung Sdi Co Ltd Flat panel display and method of fabricating the same
US8203264B2 (en) 2005-12-09 2012-06-19 Samsung Mobile Display Co., Ltd. Flat panel display and method of fabricating the same
US8890406B2 (en) 2005-12-09 2014-11-18 Samsung Display Co., Ltd. Flat panel display and method of fabricating the same

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