JPS60180145U - radio receiver - Google Patents
radio receiverInfo
- Publication number
- JPS60180145U JPS60180145U JP6850784U JP6850784U JPS60180145U JP S60180145 U JPS60180145 U JP S60180145U JP 6850784 U JP6850784 U JP 6850784U JP 6850784 U JP6850784 U JP 6850784U JP S60180145 U JPS60180145 U JP S60180145U
- Authority
- JP
- Japan
- Prior art keywords
- radio receiver
- level
- intermediate frequency
- circuit
- gain control
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Noise Elimination (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来のＦＭラジオ受信機のブロック図、第２図
は相互変調妨害の発生条件を説明する周波数パターン図
、第３図は本考案に係るＦＭラジオ受信機のブロック図
、第４図及び第５図は他局の周波数受信レベルを検出す
るための第１、第２のタイムチャート、第６図は本考案
にかさるＡＧＣ制御の処理の流れ図である。
２１・・・・・・チューナ部、２１ｆ・・・・・・ＡＧ
Ｃ回路、２２・・・・・・中間周波増幅回路、２３・・
・・・・ＦＭ検波器、２５・・・・・・ＡＧＣ回路、２
６・・・・・・レベル検出回路、２８・・・・・・コン
トローラ、２９・・・・・・分周回路、３０・・・・・
・ＰＬＬ回路、３１・・・・・・ローパスフィルタ、３
２・・・・・・ＡＧＣ切換回路。
Ｔ！１
１ ビニ１．干」１
“ １２ ｊ３ １４Fig. 1 is a block diagram of a conventional FM radio receiver, Fig. 2 is a frequency pattern diagram explaining the conditions under which intermodulation interference occurs, Fig. 3 is a block diagram of an FM radio receiver according to the present invention, and Fig. 4. 5 is a first and second time chart for detecting the frequency reception level of another station, and FIG. 6 is a flowchart of the AGC control process according to the present invention. 21...Tuner section, 21f...AG
C circuit, 22...Intermediate frequency amplification circuit, 23...
...FM detector, 25...AGC circuit, 2
6... Level detection circuit, 28... Controller, 29... Frequency dividing circuit, 30...
・PLL circuit, 31...Low pass filter, 3
2...AGC switching circuit. T! 1 1 vinyl 1. dried” 1 “ 12 j3 14
Claims (1)
とも含むラジオ受信機において、中間周波増幅回路から
取り出した中間周波信号のレベルを検出するレベル検出
回路と、前記チューナ部の利得を制御する自動利得制御
回路と、前記チューナ部をして相互変調妨害を引き起こ
す他局からの信号を所定の周期で受信させると共に、希
望局及び前記各他局からの信号の受信レベルを前記レベ
ル検出器から得、該各局の受信レベルに基いて自動利得
制御回路を制御するコントローラを有することを特徴と
するラジオ受信機。The tuner section, intermediate frequency amplification circuit, and detector are
A radio receiver that includes a level detection circuit that detects the level of an intermediate frequency signal taken out from an intermediate frequency amplification circuit, an automatic gain control circuit that controls the gain of the tuner section, and an automatic gain control circuit that controls the tuner section to prevent intermodulation interference. At the same time, the receiving level of the signal from the desired station and each of the other stations is obtained from the level detector, and the automatic gain control circuit is activated based on the receiving level of each station. A radio receiver characterized by having a controller for controlling the radio receiver.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6850784U JPS60180145U (en) | 1984-05-10 | 1984-05-10 | radio receiver |
| US06/733,593 US4654884A (en) | 1984-05-10 | 1985-05-10 | Radio receiver with switching circuit for elimination of intermodulation interference |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6850784U JPS60180145U (en) | 1984-05-10 | 1984-05-10 | radio receiver |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS60180145U true JPS60180145U (en) | 1985-11-29 |
Family
ID=30603319
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6850784U Pending JPS60180145U (en) | 1984-05-10 | 1984-05-10 | radio receiver |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60180145U (en) |
-
1984
- 1984-05-10 JP JP6850784U patent/JPS60180145U/en active Pending
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