JPS59140547U - AM receiver - Google Patents

AM receiver

Info

Publication number
JPS59140547U
JPS59140547U JP3360983U JP3360983U JPS59140547U JP S59140547 U JPS59140547 U JP S59140547U JP 3360983 U JP3360983 U JP 3360983U JP 3360983 U JP3360983 U JP 3360983U JP S59140547 U JPS59140547 U JP S59140547U
Authority
JP
Japan
Prior art keywords
circuit
receiver
intermediate frequency
signal
detection circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3360983U
Other languages
Japanese (ja)
Inventor
幸夫 堀
竹井 進
渋谷 寛人
Original Assignee
松下電器産業株式会社
日本ビクター株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 松下電器産業株式会社, 日本ビクター株式会社 filed Critical 松下電器産業株式会社
Priority to JP3360983U priority Critical patent/JPS59140547U/en
Publication of JPS59140547U publication Critical patent/JPS59140547U/en
Pending legal-status Critical Current

Links

Landscapes

  • Control Of Amplification And Gain Control (AREA)
  • Noise Elimination (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来のAM受信機の一例を示すブロック系統図
、第2図は本考案になるAM受信機の一実施例を示すブ
ロック系統図、第3図は本考案になるAM受信機の要部
の一実施例を示す回路系統図、第4図は中間周波トラン
スの振幅−周波数特性の一例を示す図、第5図は本考案
の要部の一変形例を示す回路系統図である。 1・・・アンテナ回路、21.8・・・高周波増幅回路
、3.9・・・周波数変換回路、4・・・中間周波増幅
回路、5・・・検波回路、10・・・周波数変換器、1
1・・・中間周波トランス(IFT)、13・・・レベ
ル検出回路、14・・・可変インピーダンス素子。
Fig. 1 is a block system diagram showing an example of a conventional AM receiver, Fig. 2 is a block system diagram showing an embodiment of an AM receiver according to the present invention, and Fig. 3 is a block system diagram showing an example of an AM receiver according to the present invention. FIG. 4 is a diagram showing an example of the amplitude-frequency characteristics of an intermediate frequency transformer; FIG. 5 is a circuit diagram showing a modification of the main part of the present invention. . DESCRIPTION OF SYMBOLS 1... Antenna circuit, 21.8... High frequency amplification circuit, 3.9... Frequency conversion circuit, 4... Intermediate frequency amplification circuit, 5... Detection circuit, 10... Frequency converter ,1
1... Intermediate frequency transformer (IFT), 13... Level detection circuit, 14... Variable impedance element.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 検波回路の一部より取り出した信号により少なくとも中
間周波増幅回路の利得側御を行なうAGC回路を有する
AM受信機において、該中間周波増幅回路へ中間周波信
号を出力する周波数変換回路より取り出された妨害信号
レベルを検出する検出回路を有し、該検出回路の検出妨
害信号レベルが一定値以上のときに高周波増幅回路の利
得を可変制御するよう構成したAM受信機。
In an AM receiver having an AGC circuit that controls the gain of at least an intermediate frequency amplifier circuit using a signal extracted from a part of the detection circuit, interference extracted from a frequency conversion circuit that outputs an intermediate frequency signal to the intermediate frequency amplifier circuit. An AM receiver comprising a detection circuit for detecting a signal level, and configured to variably control the gain of a high frequency amplification circuit when the level of the interference signal detected by the detection circuit is above a certain value.
JP3360983U 1983-03-09 1983-03-09 AM receiver Pending JPS59140547U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3360983U JPS59140547U (en) 1983-03-09 1983-03-09 AM receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3360983U JPS59140547U (en) 1983-03-09 1983-03-09 AM receiver

Publications (1)

Publication Number Publication Date
JPS59140547U true JPS59140547U (en) 1984-09-19

Family

ID=30164392

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3360983U Pending JPS59140547U (en) 1983-03-09 1983-03-09 AM receiver

Country Status (1)

Country Link
JP (1) JPS59140547U (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013074505A (en) * 2011-09-28 2013-04-22 Kyocera Corp Communication apparatus and communication control method
JP2016513937A (en) * 2013-03-11 2016-05-16 クゥアルコム・インコーポレイテッドQualcomm Incorporated Amplifier with inductive degeneration, configurable gain, and input matching

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013074505A (en) * 2011-09-28 2013-04-22 Kyocera Corp Communication apparatus and communication control method
JP2016513937A (en) * 2013-03-11 2016-05-16 クゥアルコム・インコーポレイテッドQualcomm Incorporated Amplifier with inductive degeneration, configurable gain, and input matching

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