JPS60180142A - Manufacture of semiconductor thin film - Google Patents
Manufacture of semiconductor thin filmInfo
- Publication number
- JPS60180142A JPS60180142A JP3531784A JP3531784A JPS60180142A JP S60180142 A JPS60180142 A JP S60180142A JP 3531784 A JP3531784 A JP 3531784A JP 3531784 A JP3531784 A JP 3531784A JP S60180142 A JPS60180142 A JP S60180142A
- Authority
- JP
- Japan
- Prior art keywords
- silicon film
- single crystal
- amorphous silicon
- ionized
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/84—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
- H01L21/86—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body the insulating body being sapphire, e.g. silicon on sapphire structure, i.e. SOS
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
Abstract
Description
【発明の詳細な説明】
゛〔産業上の利用分野〕
の発明は、単結晶サファイヤ基板等の単結晶基板上に単
結晶シリコン膜をエピタキシャルさせる半導体薄膜の製
造方法に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The invention relates to a method for manufacturing a semiconductor thin film by epitaxially forming a single crystal silicon film on a single crystal substrate such as a single crystal sapphire substrate.
一般に、集積回路の高集積化,高速化,消費電力の低減
化を図る手法として、SOS ( silicon o
nsapphire )法がよく知られており、これは
単結晶絶縁基板である単結晶サファイヤ基板上に単結晶
シリコン膜をエビクキシャル成長させるものであり、従
来、SiH4の熱分解法罠より、約95σ”C:kこ加
熱されたサファイヤ基板上[,SiH4とH2の混合ガ
スを噂いてサファイヤ基板上て単、結晶シリコン膜をエ
ビタキシャル成長させ、半導体薄膜であるSOS膜を作
製している。In general, SOS (silicon o
The nsapphire) method is well known, and this is a method to evixically grow a single crystal silicon film on a single crystal sapphire substrate, which is a single crystal insulating substrate. A monocrystalline silicon film is epitaxially grown on a heated sapphire substrate using a mixed gas of SiH4 and H2 to produce an SOS film, which is a semiconductor thin film.
しかし前記した従来の方法では950Cという高温下で
SOS膜を作製するため、サファイヤ基板上てシリコン
が平面的K−9に成長せず、サファイヤとシリコンとが
所どころひ反応して核が発生し、いろいろな方向への3
次元的なシリコンの結晶rが起こり、SOS膜中の欠陥
密度の増大およびリア移動度の低下を招くという欠点が
ある。However, in the conventional method described above, since the SOS film is manufactured at a high temperature of 950C, the silicon does not grow to a planar K-9 shape on the sapphire substrate, and the sapphire and silicon react in places and generate nuclei. , 3 in various directions
There is a drawback that dimensional silicon crystallization occurs, leading to an increase in defect density in the SOS film and a decrease in rear mobility.
こで、日本学術振興会薄膜第131委員会,プズマ.イ
オンプロセシング小委員会合同研究会料P.16〜19
(昭和56年12月18日)およびlpanese J
ournal of Applied Physics
Vo1 . 22No . 7, July , 1
983 pp . L 438 〜440 K記載のよ
うに、豊橋技術科学大学電気電子工学系の石田誠氏ほか
5名により前記の欠点を解消するSOS膜の製造方法が
報告されている。Here, the 131st Committee on Thin Films, Japan Society for the Promotion of Science, Psuma. Ion Processing Subcommittee Joint Study Group Fee P. 16-19
(December 18, 1981) and lpanese J.
Internal of Applied Physics
Vol1. 22 No. 7, July, 1
983 pp. As described in L 438 to 440 K, Makoto Ishida of the Department of Electrical and Electronic Engineering, Toyohashi University of Technology and five others have reported a method for producing an SOS film that eliminates the above-mentioned drawbacks.
す々わち第1の工程において、化学的一機械的エッチン
グにより鏡面研磨した主面を(1102)とするサファ
イヤ基板上に、スパックリング装置だより室温ておいて
厚さ20〜200Aのバッファ層であるアモルファスシ
リコン膜を形成し、その後第2の工程において、CvD
装置知より、前記アモルファスシリコン膜上K:SiH
4の熱分解法による単結晶シリコン膜を950〜101
0 Cの温度でエビタキシャル成長させ、前記両工程に
より前記サファイヤ基板上て単結晶シリコン膜をエビタ
キシャル成長させてSOS膜を作製するものである。In the first step, a buffer layer with a thickness of 20 to 200 A is deposited on a sapphire substrate whose main surface is (1102) mirror-polished by chemical and mechanical etching at room temperature. An amorphous silicon film is formed, and then in a second step, CvD
From the knowledge of the equipment, K:SiH on the amorphous silicon film
950-101 single crystal silicon film by thermal decomposition method of 4
A single crystal silicon film is grown epitaxially at a temperature of 0 C, and a single crystal silicon film is grown epitaxially on the sapphire substrate through both of the steps described above to produce an SOS film.
ところが、この方法には2つの欠点があり、まず第IK
1アモルファスシリコン膜をサファイヤ基板上に薄く均
一に形成するためには、シリコンに数10evないし数
100eVのエネルギを与えリコン原子をサファイヤ基
板に突入させなけ會らず、SiH4の熱分解法ではシリ
コン原子10〜数100eVものエネルギを与えること
がないため、前記したように、アモルファスシン膜のス
パッ脅リング装置およびSiH4の熱q用のCVD装置
の2つの装置が必要となり、工)複雑化するという欠点
がある。However, this method has two drawbacks. First, the IK
1. In order to form a thin and uniform amorphous silicon film on a sapphire substrate, it is necessary to apply an energy of several tens to several hundreds of eV to the silicon to cause silicon atoms to rush into the sapphire substrate. Since energy of 10 to several 100 eV is not applied, as mentioned above, two devices are required: a sputter ring device for the amorphous thin film and a CVD device for heat q of SiH4, making the process complicated. There is.
第2K1スパッタリング装置によりアモルファスシリコ
ン膜を形成したサファイヤ基板をCVD装置に移し替え
る際に、アモルファスシリコン膜が外気にさらされ乙こ
と知女り、前記アモルファスシリコン膜が非常に薄くし
かも活性であるため、アモルファスシリコン膜が酸化さ
れ,あるいは炭素などの汚染物が付着して汚染されてし
まい、アモルファスシリコン膜上知単結晶シリコン膜を
エビタキシャル成長させる前に、たとえば1000 C
,5分間という高温の前洗浄処理を行なって前記アモル
ファスシリコン膜上の汚染物を取り除かなければならず
、非常に手間がかかり、しかも前洗浄処理だけでは前記
アモルファスシリコン膜Fの酸化物を十分に取り除くこ
とができず、1000 Cという高温で前洗浄処理を行
なう場合にはサファ−ヤ基板からアモルファスシリコン
膜へのアルミウムのオートドーピングが生じ易いという
欠点、ある。When transferring the sapphire substrate on which the amorphous silicon film was formed by the 2nd K1 sputtering device to the CVD device, the amorphous silicon film was exposed to the outside air. If the amorphous silicon film is oxidized or contaminated by adhesion of contaminants such as carbon, the amorphous silicon film may be heated to 1000 C before epitaxial growth of the monocrystalline silicon film.
, it is necessary to perform a high-temperature pre-cleaning process for 5 minutes to remove contaminants on the amorphous silicon film, which is very time-consuming, and furthermore, the pre-cleaning process alone is not enough to remove the oxides from the amorphous silicon film F. If aluminum cannot be removed and a pre-cleaning treatment is performed at a high temperature of 1000 C, autodoping of aluminum from the sapphire substrate to the amorphous silicon film tends to occur.
発明の目的〕
の発明は、前記の点に留意してラされたもの〉り、1つ
の装置により旧導体薄膜を形成できうてし、薄膜が形成
途中に外気にさらされる′をなくして薄膜の汚染を防止
し、従来のようi洗浄処理を削除し、工程を簡略化する
ととも11
1Iアモルファスシリコン膜への不純物のオートピング
の発生を抑制することを目的とする。Purpose of the Invention The invention was developed with the above-mentioned points in mind, and it is possible to form a thin film of a conventional conductor using one device, and to eliminate the need for the thin film to be exposed to the outside air during formation. The purpose of this invention is to prevent contamination of the 111I amorphous silicon film, eliminate the conventional i cleaning process, simplify the process, and suppress the autopumping of impurities into the 111I amorphous silicon film.
この発明は、単結晶絶縁基板上に蒸着法にアモルファス
シリコン膜を薄く形成する工程前記アモルファスシリコ
ン弁膜上にイオン化法により単結晶シリコン膜をエビク
キシャルさせる工程とを含むことを特徴とする半導体薄
膜の製造方法である。The present invention provides manufacturing of a semiconductor thin film characterized by comprising the steps of: forming a thin amorphous silicon film on a single crystal insulating substrate by vapor deposition; and evictifying the single crystal silicon film on the amorphous silicon valve membrane using an ionization method. It's a method.
したがって、この発明の半導体薄膜の製造方法によると
、蒸着法によりアモルファスシリコン膜を形成し、イオ
ン化蒸着法により単結晶シリコン膜をエビクキシャル成
長させるようにしたことにより、1つの蒸着装fi K
よりアモルファスシリコン膜,単結晶シリコン膜を形成
することができ、半導体薄膜が形成途中で外気にさらさ
れることをなくして薄膜の汚染を防止することが可能と
會り程の簡略化を図ることができる。Therefore, according to the method of manufacturing a semiconductor thin film of the present invention, an amorphous silicon film is formed by a vapor deposition method, and a single crystal silicon film is evixtally grown by an ionization vapor deposition method.
This makes it possible to form amorphous silicon films and single-crystal silicon films, eliminates exposure of semiconductor thin films to the outside air during formation, and prevents contamination of the thin films. can.
らに、半導体薄膜の形成途中に従来のようなの前洗浄処
理を行貴う必要が女<彦り、高温理によるアモルファス
シリコン膜への不純物のートドーピングの発生を抑制す
ることができる。Furthermore, it is possible to suppress the need to perform a conventional pre-cleaning treatment during the formation of a semiconductor thin film, and to prevent doping of impurities into the amorphous silicon film due to high-temperature processing.
1実施例〕
ゝi”zぎに、この発明を、その1実施例を示した図面
とともに詳細て説明する。1 Embodiment] Next, the present invention will be described in detail with reference to drawings showing one embodiment thereof.
まず第1図に示すように、化学的一機械的エッチングに
より鏡面研磨した主面を(1102)とする単結晶サフ
ァイヤ基板(1)を真空度I X 10 Torrに保
持したイオン化蒸着装置の真空室内に配設し、基板(1
)の温度を室温に保持し、蒸発源であるシリコンを前記
装置の電子ビーム源知よる電子ビーム照射てより蒸発さ
せるとともに、熱電子との衝突によりシリコンの蒸気の
一部をイオン化し、イオン化したシリコン京子K5KV
の加速電圧を印加し、平均して数10eViいし数10
0eVのエネルギをシリコン原子に与えてシリコン原子
を加速し、第2図に示すように、シリコン原子を基板(
1)に蒸着させて基板(1)上にイオン化蒸着法による
厚さ40Aの薄いアモルファスシリコン膜(2)を形成
する。First, as shown in Figure 1, a single-crystal sapphire substrate (1) whose main surface is (1102), which has been mirror-polished by chemical and mechanical etching, is placed in a vacuum chamber of an ionization vapor deposition apparatus maintained at a vacuum level of I x 10 Torr. and the board (1
) was maintained at room temperature, and silicon, which was an evaporation source, was evaporated by irradiation with an electron beam from the electron beam source of the device, and a portion of the silicon vapor was ionized by collision with thermionic electrons. Silicon Kyoko K5KV
An acceleration voltage of several 10 eVi to several 10 eVi is applied on average.
Energy of 0eV is applied to silicon atoms to accelerate them, and as shown in Figure 2, the silicon atoms are attached to the substrate (
1) to form a thin amorphous silicon film (2) with a thickness of 40A on the substrate (1) by ionization vapor deposition.
つぎに、前記の真空度を維持しながら、基板(1)度を
8000に加熱して保持し、前記したアモアスシリコン
膜(2)の形成時と同様のイオン化工程により、アモル
ファスシリコン膜(2)上に】コン粗子(3)を蒸着さ
せてイオン化蒸着法1でよド結晶シリコン膜をエビ少キ
シャル成長させ乙。Next, while maintaining the above-mentioned degree of vacuum, the substrate is heated to (1) degree and held at 8000 degrees, and an amorphous silicon film (2 ) on top of the silicon coating (3), and then epitaxially grow a crystalline silicon film using ionization deposition method 1.
−のとき、基板(1)の温度を800 CK保持しつつ
吉晶シリコン膜を形成することにより、アモルファスシ
リコン膜(2)が単結晶化し、第4図て示すようて、基
板(1)上にエビやキシャル成醍した厚さ11lmの単
結晶シリコン膜/4)が形成され、半導体薄膜であるS
OS膜(5)が製造され乙。-, by forming the amorphous silicon film while maintaining the temperature of the substrate (1) at 800 CK, the amorphous silicon film (2) becomes a single crystal, and as shown in FIG. A monocrystalline silicon film with a thickness of 11 lm/4) is formed by crystallization, and S is a semiconductor thin film.
The OS film (5) has been manufactured.
したがって、前記実施例によると、1つのイオン化蒸着
装1iJKよりアモルファスシリコン膜(2)および単
結晶シリコン膜を形成することができ、SOS膜(5)
が形成途中で外気にさらされることを女くしてアモルフ
ァスシリコン膜(2)等の汚染を防止することが可能と
なり、工程の簡略化を図ることができる。Therefore, according to the embodiment, the amorphous silicon film (2) and the single crystal silicon film can be formed using one ionization vapor deposition system 1iJK, and the SOS film (5)
It is possible to prevent the amorphous silicon film (2) from being exposed to the outside air during the formation, thereby preventing contamination of the amorphous silicon film (2), etc., thereby simplifying the process.
さらに、SOS膜(5)の形成途中に従来のようラ高温
の前洗浄処理を行女う必要が々<女リ、高温処理K ヨ
る基板(1)からアモルファスシリコンII (2)へ
のアルミニウム等のオートドーピングの発生を抑制する
ことができ、前記従来のSOS膜に比べ単結゛リコン膜
(4)中の欠陥密度を大幅に減少させ、1リア移動度を
向上オ乙ことができる。Furthermore, during the formation of the SOS film (5), it is necessary to perform a high-temperature pre-cleaning process as in the past. It is possible to suppress the occurrence of autodoping such as, etc., significantly reduce the defect density in the single silicon film (4) compared to the conventional SOS film, and improve the single-layer mobility.
なお、アモルファスシリコン膜(2)はイオン化蒸以外
の通常の蒸着法てより形成してもよい。Note that the amorphous silicon film (2) may be formed by a normal vapor deposition method other than ionization vaporization.
また、サファイヤ基板(1)に代え、単結晶スピネ膜を
使用しても、この発明を同様て実施するこができる。Furthermore, the present invention can be implemented in the same manner even if a single crystal spinane film is used instead of the sapphire substrate (1).
4441 図面の簡単會説明
図面は、この発明の半導体薄膜の製造方法の1実施例を
示し、第1図ないし第4図はそれぞれ製造工程を示す断
面図である。4441 Brief Description of the Drawings The drawings show one embodiment of the method of manufacturing a semiconductor thin film of the present invention, and FIGS. 1 to 4 are sectional views showing the manufacturing steps, respectively.
(1)・・・サファイヤ基板、(2)・・・アモルファ
スシリコン膜、1.4)・・・単結晶シリコン膜、(5
)・・・SOS膜。(1)... Sapphire substrate, (2)... Amorphous silicon film, 1.4)... Single crystal silicon film, (5
)...SOS film.
Claims (1)
ン膜を薄く形成する工程と、前記アj? 17スシリコン→膜上にイオン化蒸着法によ迅シリコン
膜をエビタキシャル成長させる工程を含むことを特徴と
する半導体薄膜の製造方法。[Claims] ■ A step of forming a thin amorphous silicon film by vapor deposition on a single crystal insulating substrate; 17. A method for producing a semiconductor thin film, comprising the step of epitaxially growing a silicon film on the 17th silicon film by ionization vapor deposition.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3531784A JPS60180142A (en) | 1984-02-28 | 1984-02-28 | Manufacture of semiconductor thin film |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3531784A JPS60180142A (en) | 1984-02-28 | 1984-02-28 | Manufacture of semiconductor thin film |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS60180142A true JPS60180142A (en) | 1985-09-13 |
Family
ID=12438426
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3531784A Pending JPS60180142A (en) | 1984-02-28 | 1984-02-28 | Manufacture of semiconductor thin film |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS60180142A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05179800A (en) * | 1991-12-27 | 1993-07-20 | Ono Tatsuo | Post device |
US6573160B2 (en) * | 2000-05-26 | 2003-06-03 | Motorola, Inc. | Method of recrystallizing an amorphous region of a semiconductor |
KR100676201B1 (en) | 2005-05-24 | 2007-01-30 | 삼성전자주식회사 | Method of manufacturing semiconductor device used Atomic Layer DepositionALD |
-
1984
- 1984-02-28 JP JP3531784A patent/JPS60180142A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05179800A (en) * | 1991-12-27 | 1993-07-20 | Ono Tatsuo | Post device |
US6573160B2 (en) * | 2000-05-26 | 2003-06-03 | Motorola, Inc. | Method of recrystallizing an amorphous region of a semiconductor |
KR100676201B1 (en) | 2005-05-24 | 2007-01-30 | 삼성전자주식회사 | Method of manufacturing semiconductor device used Atomic Layer DepositionALD |
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