JPS60179866A - Real time operating system - Google Patents

Abstract

PURPOSE:To attain high speed processing by executing a device handler function by the 2nd muP. CONSTITUTION:A command inputted from a keyboard 3 is stored in a two-port memory 27, and at the end of the input, an muP24 sets up a keyboard port of an I/O port 28. A muP21 is interrupted by said setting and arithmetic processing is executed. If information from a flexible disc device 4 is made necessary on the way of the execution, the muP21 monitors a peripheral apparatus starting request in the memory 27, and when the information of a part to be read out from the disc device 4 is set up in the memory 27, drives the disc device 24 and transfers the whole request data to the memory 27. After end of the transfer, the muP21 is interrupted. The muP21 detects the interruption and restarts the arithmetic processing of the original task.

Description

[Detailed Description of the Invention] [Technical Field of the Invention] This invention relates to an operating system (hereinafter abbreviated as O8) for a computer system using a microprocessor.
It is related to.

[Prior art]

Figure 1 is a block diagram illustrating a conventional real-time O8. In the figure, fi+ is a microprocessor (hereinafter μP
), (2) is the memory for μP (1), (3)
is a keyboard, (4) is a flexible disk device (generally an auxiliary storage device), (5) is a cathode ray tube display device (hereinafter abbreviated as CRT), (6) is a printer, (7) is
is a common bus that interconnects the μP (1), memory (2), keyboard (3), flexible disk device (4), CRT+51, and printer (6). Also (3
1, (41, (51.

(6) are collectively referred to as peripheral devices.

Since the operation of the computer system shown in Fig. 1 and LIS in general are well known, their explanation will be omitted.
il reads out a predetermined program from the memo (January 2), and according to the read program, for example, reads internal medicine from a predetermined area of the flexible disk (4), performs arithmetic processing on it, and displays the result on the CRT +5+. At the same time, the task of storing it again in a predetermined area of the flexible disk (4) is executed. In such a case, the flexible disk device (4) will have gone bankrupt before this task is completed and will still generate an interrupt, so a device handler that handles interrupts according to the procedure will be executed under the control of O8. I was going.

The conventional device operates as described above, with one μP handling keyboard input, flexible disk input/output, playback processing,
All CRT display and printer output must be performed.
If the arithmetic processing is complex and the number of accesses to each peripheral device is large, the overall processing time becomes long.

[Summary of the invention]

This invention was made to eliminate the drawbacks of the conventional ones as described above, and in this invention, at least one second μP is provided in addition to the first μP that performs the task scheduler function and execution processing. This second μP executes all the device handler functions and satisfies the functions of the real-time O8 as a whole, making high-speed processing possible.

In addition, in order to transfer information between the first and second μPs, a 2-board memory that can be accessed from either μP is provided, so that it is still possible to issue an interrupt from the second μP to the first μP. .

[Example of modification of invention]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 2 is a block diagram showing one embodiment of the present invention.
The same reference numerals as those in the figure indicate the same or lower part, Qυ is provided for the task scheduler function and execution processing in the first μP, (C) is the memory corresponding to μPQ1),
It is used to store the program that is output and executed by μP a]) and to save intermediate results of calculations. The wire is a bus that connects the μPa1l and the memory (2). (c) is the second μP, and the second μP is not limited to one, but as shown by the dotted block 4, the second μP is
It is also possible to further distribute functionality by adding . The following explanation will be limited to the case where there is only one second μP (to). 4 is a memory corresponding to μP (c). Second
μP (c) is peripheral equipment +31, +4j, t5
), the open side 1 of 161 is executed, and the winning side j program is stored in the memory (c).

Plow is μP with 2 boat memory? Both can be accessed from υ and (c). (E) is an input/output port (abbreviated as I10 port) used to generate an interrupt from μPρ9 to μPC2υ.

Next, the operation of the system shown in FIG. 2 will be explained. By inputting from the keyboard (3), the input command is stored in the keyboard area on the two-port memory (A), and upon completion of the input command, μPfA sets the keyboard port of fi I10 port (to). With this set, the interrupt to μPQ0 is 9, after the task schedule,
Start the corresponding task and start calculation processing. If information on the flexible disk device (4) is required during the process, write the desired information item, address, and other necessary items to the corresponding area of the 2-port memory (c), and then interrupt the task. Then μP @1) executes another task. The μP (c) always monitors the restricted device activation request on the 2-port memory (in the 2-port memory), and as mentioned above, the information of the part to be read from the flexible disk device (4) is set in the 2-port memory @. When this occurs, it detects this and drives the flexible disk device (4), and after all requested data has been transferred to the corresponding area on the 2-port memory (b), the flexible disk port of the I10 boat is set. and interrupts μP2u.

μP Qll detects this interrupt and resumes the calculation process of the original task that requested the flexible disk information after task scheduling. The information on the flexible disk device (4) necessary for the next calculation process is requested from the μpH in advance as described above, and then sent to the μPC.
The yn processing itself at 2υ continues. However, before actually using the data, synchronize and check for input completion.

Display output to be displayed on CRT +5), printer (6)
For the output to be printed with , the output data from μP (c) is written to the corresponding area of the 2-port memory ■ along with other necessary data. μP @1) continues processing, and the next time a new output is made, the previous Determine whether the request is complete and synchronize. That is, in the embodiment shown in FIG.
Of the functions, the task schedule processing section and system call processing section are executed on the first μPeυ, and the peripheral device handler section (device handler section) is executed on the second μP, reducing overhead time such as task switching. We are currently working on speeding up the processing.

Note that in the above embodiment, the first μP (2) is
(c) I used the I10 port to generate an interrupt, but this is a memory Matsubuto I10 (memor
Alternatively, a method may be used in which completion is known by setting a flag in the 2-port memory (a) and scanning it (5can) without using the Ilo port.

〔Effect of the invention〕

As described above, according to the present invention, the task scheduler function, entertainment function, and peripheral device handler function of the real-time O8 are divided into separate μPs, so that processing speed can be improved.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a conventional device, and FIG. 2 is a block diagram showing an embodiment of the present invention. +31, (41, +51, (6)...Peripheral device 4, (7)...Common bus, +2])...First μP1 (A)...Memory of μP deer, (H )...Second μP1v→...Memory of μP (c), (a)...
・2 port memory, ni)...■, n port. Note that the same reference numerals in each figure indicate the same or corresponding parts. Agent Masuo Oiwa Figure 1 Figure 2

Claims (1)

[Claims] In a real-time operating system that controls a computer system that uses a microprocessor,
a first microprocessor that performs task scheduler functions and execution processing; at least one second microprocessor that performs peripheral device handler functions; 2-port memory that can be used, above]'
2 microprocessor, keyboard, auxiliary storage device,
a common bus connecting peripheral devices such as a cathode ray tube display device and a printer; means for interrupting the first microprocessor via the common bus; A real-time operating system comprising a program for controlling the scheduler function and execution processing to be executed by the first microprocessor and the peripheral device handler function to be executed by the second microprocessor.