JPS60176314A - Automatic gain adjusting circuit - Google Patents

Abstract

PURPOSE:To increase a speed so that a voltage of a capacitor reaches a necessary AGC voltage, and to improve a response speed for adjusting the gain by connecting the capacitor for a filter to an output part of an automatic gain adjusting amplifier, through a parallel circuit of a resistance and a diode. CONSTITUTION:A titled circuit is constituted so that a detecting signal from an AM detector is supplied to an automatic gain adjusting amplifier 12, a filter capacitor 16 is connected to its output terminal through a parallel circuit of a resistance 20 and a diode 24, and a voltage generated in said capacitor 16 is applied to a mixing circuit and an intermediate frequency amplifier and becomes an AGC voltage. When an output of the automatic gain adjusting amplifier 12 becomes lower than the voltage of the capacitor 16 in a state that the capacitor 16 has been charged with the AGC voltage, discharging is executed quickly through the diode 24, is can be executed to make the voltage of the capacitor 16 reach quickly the necessary AGC voltage, and a response speed of the automatic gain adjustment can be improved.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an automatic gain adjustment circuit, and particularly to improving its response characteristics.

FIG. 1 shows a general automatic gain adjustment circuit. That is, the AM (amplitude modulation #1!it) high frequency signal received by the antenna 2 is mixed with the local oscillation frequency in the mixer circuit 4 and changed to an intermediate frequency, and then amplified by the intermediate frequency amplifier 6. The frequency of this intermediate frequency amplifier 6 is detected by an AM detector 8, taken out as a low frequency output from an output terminal 10, and added to an automatic gain adjustment amplifier 12.
A gain control voltage (AGC voltage) is formed.

This automatic gain control output is applied to a filter capacitor 16 connected to terminal 14, and the control voltage generated across capacitor 1G is applied to mixer circuit FIII4 and intermediate frequency amplifier 6 as its gain control input. As a result, the gains of the mixer circuit 4 and the intermediate frequency amplifier 6 are adjusted according to the received signal level, and the level is adjusted in response to fluctuations in the received signal level, thereby making it possible to obtain audio output at a constant level.

In such an automatic gain adjustment circuit, the filter capacitor 16 is repeatedly charged and discharged in relation to the output of the automatic gain adjustment amplifier 12, and an AGC voltage corresponding to the received signal level is formed between its terminals.

FIG. 2 shows an equivalent circuit of the output section of the automatic gain adjustment amplifier 12. That is, the resistor 18 is the equivalent resistance of the output section of the automatic gain control amplifier 12.

The filter time constant is related to the distortion of the signal waveform, and if the capacitance of the capacitor 16 is increased to reduce the distortion, the filter time constant becomes larger, and the charging speed and discharging speed are restricted. When the discharge speed of the capacitor 16 is slow, MI# changes from the strong input band to the weak input band.
Jl, it becomes difficult to respond instantly and there is a drawback that the generation of sound is delayed.

The object of this invention is to increase the capacitance of a capacitor and to improve the discharge rate of the capacitor.

In the present invention, a filter capacitor is connected via a resistor to the output section of an automatic gain control amplifier that forms a gain control voltage from an amplitude detection output, and a diode is connected in parallel to the resistor at the output of the automatic gain control amplifier. It is characterized by being connected in the forward direction toward the part.

Hereinafter, the present invention will be described in detail with reference to embodiments shown in the drawings.

FIG. 3 shows an embodiment of the automatic gain adjustment circuit of the present invention,
The same parts as in the automatic gain adjustment circuit of FIG. 1 are given the same reference numerals.

A resistor 20 is connected to the output terminal 14 of the automatic gain adjustment amplifier 12.
A filter capacitor 16 is connected between the terminal 22 formed through the filter and a ground point, and a diode 24 is connected in parallel with the resistor 20 and in the forward direction toward the automatic gain adjustment amplifier 12.

The AGC voltage generated in the capacitor 16 becomes a gain control input for the mixer circuit 4 and intermediate frequency amplifier 6.

With this configuration, the diode 24 constitutes a floating type rapid discharge circuit. When an AGC voltage is generated at the output terminal 14 of the automatic gain adjustment amplifier 12 by the AM detection output, a potential difference is generated between the output terminal 14 and the terminal 22 if the AGC voltage is higher than the terminal voltage of the capacitor 16. . For example, when the terminal voltage of the capacitor 16 is OV, this potential difference is given by the AGC voltage, and the capacitor 16 is charged to the AGC voltage.

Next, when the input becomes weak from such a charged state and the output voltage of the automatic gain adjustment amplifier 12 becomes lower than the terminal voltage of the capacitor 6, a potential difference is generated between the terminals 14 and 22.

When this potential difference exceeds the forward voltage drop vF of the diode 24, the diode 24 becomes conductive, and a discharge current flows through the diode 24 to the capacitor 16.

Then, the discharge of the capacitor 16 progresses, and the terminal 14.22
The potential difference between them is the forward drop voltage VF of the diode 24 (
(for example, about 0.4 V), the diode 24 becomes non-conductive, and the subsequent discharge of the capacitor 16 is caused by the resistor 2.
This will be done via 0.

By discharging through the diode 24 in this way, the voltage of the capacitor 16 can reach the required AC or C voltage quickly (this improves the response speed of automatic gain adjustment and the ability to follow the received signal level). In addition, by improving the charging speed in this way, the capacitance of the capacitor 16 can be increased, and distortion of the signal waveform can be prevented.Moreover, the circuit configuration is very simple. It is.

As shown in FIG. 4, a resistor 26 may be connected in series with the diode 24 as a current limiting element to protect the diode 24.
It is possible to prevent the diode 24 from being destroyed due to rapid discharge.

FIGS. 5 and 6 show other embodiments of the present invention, and FIGS.
The same parts as in the embodiment shown in the figures and FIG. 4 are given the same reference numerals.

In the embodiment shown in FIG. 5, a diode 28 for quickly charging the capacitor 16 is connected in parallel with a diode 24 and a resistor 20. With this configuration, the capacitor 16 can be charged quickly. Automatic gain adjustment with low distortion and high followability.

Further, in the embodiment shown in FIG. 6, a resistor 30 is connected in series with the diode 28 as a current limiting element, and a capacitor 1
The diode 28 can be protected from the rapid charging current of 6.

Note that the present invention is not limited to the charging circuit of the embodiment, and similar effects can be expected even when a conventionally used quick charging circuit is used in combination.

As described above, according to the present invention, the capacitor can be rapidly discharged regardless of its time constant, and automatic gain adjustment with low distortion and good followability can be performed.

[Brief explanation of drawings]

Figure 1 is a block diagram showing a general automatic gain adjustment circuit.
Fig. 2 is an explanatory diagram showing an equivalent circuit of the output section of an automatic gain adjustment amplifier, Fig. 3 is a circuit diagram showing an embodiment of the automatic gain adjustment circuit of the present invention, and Figs. FIG. 7 is a circuit diagram showing another example of the gain adjustment circuit. 12... Automatic gain adjustment amplifier, 16... Filter capacitor, 24... Diode-F', 26... Resistor as a current limiting element. Figure 1 Figure 2 Figure 4 Figure 3 Figure 5

Claims (2)

[Claims] (1) A filter capacitor is connected via a resistor to the output section of an automatic gain adjustment amplifier that forms a gain control voltage from the amplitude detection output, and a diode is connected in parallel to the resistor at the output section of the automatic gain adjustment amplifier. An automatic gain adjustment circuit characterized in that the circuit is connected in a forward direction toward the terminal. (2) The automatic gain adjustment circuit according to claim 1, characterized in that a current limiting element is connected in series to the diode.