JPS60176165A - Interdevice connecting system - Google Patents

Interdevice connecting system

Info

Publication number
JPS60176165A
JPS60176165A JP59032823A JP3282384A JPS60176165A JP S60176165 A JPS60176165 A JP S60176165A JP 59032823 A JP59032823 A JP 59032823A JP 3282384 A JP3282384 A JP 3282384A JP S60176165 A JPS60176165 A JP S60176165A
Authority
JP
Japan
Prior art keywords
data
interface
main memory
bus
path
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59032823A
Other languages
Japanese (ja)
Inventor
Takashi Nagashima
孝 長島
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP59032823A priority Critical patent/JPS60176165A/en
Priority to AU39509/85A priority patent/AU580756B2/en
Publication of JPS60176165A publication Critical patent/JPS60176165A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/44—Mechanical structures for providing tensile strength and external protection for fibres, e.g. optical transmission cables
    • G02B6/4401—Optical cables
    • G02B6/4429—Means specially adapted for strengthening or protecting the cables
    • G02B6/44384—Means specially adapted for strengthening or protecting the cables the means comprising water blocking or hydrophobic materials
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/44—Mechanical structures for providing tensile strength and external protection for fibres, e.g. optical transmission cables
    • G02B6/4401—Optical cables
    • G02B6/4415—Cables for special applications
    • G02B6/4427—Pressure resistant cables, e.g. undersea cables

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Maintenance And Management Of Digital Transmission (AREA)

Abstract

PURPOSE:To enable parallel processing such as data reception and transmission of modified data and to enhance a data transfer efficiency between devices by providing plural GP-IB bus parts capable of actions independent of the specific device. CONSTITUTION:A GP-IB interface 102 of a device 10 is listener (data receiving party) specified on a bus GP-IB40. A GP-IB interface 103 is talker (data transmitting party) specified on a bus GP-IB50. Data on the GP-IB40 are written in a main memory 101 through the interface 102. A processor 104 operates data on the main memory 101 and converts them into the required data. The interface 103 transmits the data converted on the main memory 101 to the GP-IB50. Thus the GP-IB40 and GP-IB50 allow parallel processing such as data reception and modified data transmission as an independent bus, and data transfer efficiency can be enhanced.

Description

【発明の詳細な説明】 〔発明の技術分野〕 本発明はＩＩＩＣＥＥ　−４８８パスを用いた機器間接
続方式に関する。DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to an inter-device connection system using IIICEE-488 paths.

〔発明の技術的背景とその問題点〕[Technical background of the invention and its problems]

機器間の接続において、最大１メガビット／秒の転送能
力を有するパスとして、ＩＥＥＦｉ　−ＩＢと称される
ＩＥＥｇ　−４８８パス（以下ＧＰ−ＩＢと称す）が広
く使用されている。このＧＢ−ＩＢは、複数個の機器間
をディジーチェイン方式で接続し、１つのトーカ（デー
タ送信元）と複数のリスナ（データ受入光）との間でデ
ータ転送（７′−タ＝８ビ、ト単位）が行なえる。しか
しながら、ＧＰ−ＩＢは！ロック転送を主眼においたパ
スであり、このため複数のブロックデータをパス上で時
分割に並列して転送することは不可能である。このため
、従来では、例えば第１図に示す如く、ＧＰ−ＩＢ　（
ＩＥＩＪ−４８８パス）１で接続された機器２に、２Ｂ
、２Ｃ間において、機器２Ｂが、機器２人より受信した
（Ａ）というデータをモデファイし、〔Ａクデータとし
て、他の機器２Ｃに送出する場合、〔Ａ〕の受信と〔八
〇の送信はシリアルになり、プロ、り長分のデータバッ
ファを持つ必要があるとともに、転送時間も、受信、送
信の両データ転送時間を合わせた長時間になるという不
都合があった。In connections between devices, an IEEEg-488 path called IEEE Fi-IB (hereinafter referred to as GP-IB) is widely used as a path having a maximum transfer capacity of 1 megabit/second. This GB-IB connects multiple devices using a daisy chain method, and transfers data (7'-ta = 8 bits) between one talker (data sending source) and multiple listeners (data receiving lights). , unit) can be performed. However, GP-IB! This path focuses on lock transfer, and therefore it is impossible to transfer multiple blocks of data in parallel on the path in a time-sharing manner. For this reason, conventionally, GP-IB (
2B to device 2 connected via IEIJ-488 path) 1
, 2C, when device 2B modifies the data (A) received from two devices and sends it to another device 2C as [A data], the reception of [A] and the transmission of [80] are Since it is serial, it is necessary to have a data buffer that is longer than the original, and the transfer time is also a long time, which is the sum of the data transfer time for both reception and transmission.

〔発明の目的〕[Purpose of the invention]

本発明は上記実情に鑑みなされたもので、ＧＰ−ＩＢに
より機器間のデータ転送を行なうシステムにおいて、Ｇ
Ｐ−ＩＢのもつ高速ブロック転送能力を維持しつつ、並
列処理機能を実現でき、これにより機器間のデータ転送
処理を効率良く実現できるようにした機器間接続方式を
提供することを目的とする〇 〔発明の概要〕 本発明はＧＰ−ＩＢの接続対象となる複数の機器のうち
、特定の機器に独立して動作可能な複数のＧＰ−ＩＢパ
スポートを用意し、データの受信とモデファイしたデー
タの送信、更には複数の機器からの各データの取込み、
送信等を各々並行して行なえるようにしたものである。The present invention was made in view of the above-mentioned circumstances, and is a system that transfers data between devices using GP-IB.
The purpose is to provide a device-to-device connection method that can realize parallel processing functions while maintaining the high-speed block transfer capability of P-IB, and thereby efficiently realize data transfer processing between devices. [Summary of the Invention] The present invention provides a plurality of GP-IB passports that can operate independently for a specific device among a plurality of devices to be connected to GP-IB, and receives data and modifies data. Sending and even importing each data from multiple devices,
Transmission etc. can be performed in parallel.

〔発明の実施例〕[Embodiments of the invention]

以下図面を参照して本発明の一実施例を説明する。第２
図は本発明の一実施例を示すブロック図である。図中、
１０，２０．３０はそれぞれＧＰ−ＩＢ　（ＩｇＥｇ−
４８８パス〕の接続対象となる機器である。４０及び５
０はそれぞれ独立した２つのＧＰ−ＩＢ　（ＩＥＩＪ−
４８８）々ス）であり、各々機器１０，２０．３０との
間に独立したＧＰ−ＩＢインターフェイスを介在して接
続される。ここでは、ＧＰ−ＩＢ　４０を経由する機器
２０から機器１０へのデータ〔Ａ〕の転送、及びＧＰ−
ＩＢ　５０を経由する機器１０から機器３０への例えば
モアファイ後のデータ〔八りの転送と、機器１０の内部
でのデータ［Ａ）からデータ〔Ａつへのデータ変換とが
同時並行して行なわれる場合を例にとって示している。An embodiment of the present invention will be described below with reference to the drawings. Second
The figure is a block diagram showing one embodiment of the present invention. In the figure,
10, 20.30 are GP-IB (IgEg-
488 path]. 40 and 5
0 represents two independent GP-IBs (IEIJ-
488) and 20.30 respectively, and are connected to each device 10, 20.30 via an independent GP-IB interface. Here, data [A] is transferred from the device 20 to the device 10 via the GP-IB 40, and
For example, the transfer of the data after MoFi from the device 10 to the device 30 via the IB 50 and the data conversion from data [A] to data [A] within the device 10 are performed in parallel. This example shows the case where the

第３図は上記機器１０の構成例を示すブロック図である
。図中、１００は内部パス、１０）は主メモリ、１０２
はＧＰ−ＩＢ　（ＩＥＥＥ−４８８パス）４０と内部パ
ス１００との間に介在されたＧＰ−ＩＢインターフェイ
ス、１０３はＧＰ−ＩＢ５０と内部パスｌθ０との間に
介在されたＧ　Ｉ）　−Ｉ　Ｂインターフェイス、１０
４は機器１０のデータ送受制御を含む各部の制御を司る
プロセッサである。FIG. 3 is a block diagram showing an example of the configuration of the device 10. As shown in FIG. In the figure, 100 is an internal path, 10) is the main memory, and 102
is the GP-IB interface interposed between the GP-IB (IEEE-488 path) 40 and the internal path 100, and 103 is the GI-IB interface interposed between the GP-IB 50 and the internal path lθ0. , 10
4 is a processor that controls various parts of the device 10, including data transmission and reception control.

ここで第２図及び第３図を参照して一実施例の動作を説
明する。ここでは、機器１０がＧＰ−ＩＢ４０を介して
機器２０からデータを受信し、そのデータを内部のプロ
セッサ１０４で処理した後、ＧＰ−ＩＢ　５０を介して
機器３ｏに送出する場合を例にとって説明する。上記転
送処理時において、機器１００ＧＰ−ＩＢゼインーフェ
イス１０２はＧＰ−ＩＢ　４０上でリスナ（Ｌ）指定さ
れている。一方、ＧＰ−ＩＢインターフェイス１０３は
ＧＰ’−ＩＢ５（７上でトーカ（Ｔ）指定されている。The operation of one embodiment will now be described with reference to FIGS. 2 and 3. Here, an example will be explained in which the device 10 receives data from the device 20 via the GP-IB 40, processes the data in the internal processor 104, and then sends it to the device 3o via the GP-IB 50. . During the above transfer process, the device 100 GP-IB interface 102 is designated as a listener (L) on the GP-IB 40. On the other hand, the GP-IB interface 103 is designated as a talker (T) on GP'-IB5 (7).

ＧＰ−ＩＢ　４０上のデータはＧＰ−ＩＢゼインーフェ
イス１０２を経由して主メモリ１０１へ１゛込まれる。Data on the GP-IB 40 is loaded into the main memory 101 via the GP-IB interface 102.

プロセッサ１０４け、主メモリ１０１上のデータを処理
し、要求されるデータに変換する。ＧＰ−ＩＢインター
フェイス１０３は、主メモリ１０１上の変換処理された
データをＧＰ−ＩＢ　５０へ送出する。Processor 104 processes the data on main memory 101 and converts it into required data. The GP-IB interface 103 sends the converted data on the main memory 101 to the GP-IB 50.

このようにして、ＧＰ−ＩＢ　４０とＧＰ−ＩＢ５０と
は、互に独立したパスとして並列動作が可能きなる。In this way, the GP-IB 40 and GP-IB 50 can operate in parallel as mutually independent paths.

以上は機器１０のＧＰ−ＩＢ　４　ｏ経由による受信と
、ＧＰ−ＩＢ５０経由による送信との並列動作を例にと
って説明したが、例えばＧＰ−ＩＢゼインーフェイス１
０２，１０３が共にリスナ（Ｌ）となり、２つの独立し
たＧＰ−ＩＢ４（７，５（＋よりデータを並列に主メモ
リ１０１に取込む動作も可能であり、又、逆に、主メモ
リ１０１より２つのＧＰ−ＩＢ４０，５０へ並行してデ
ータを送出する動作も可能である。　゛・ 〔発明の効果〕 以上詳記したように本発明のＱＰ−ＩＢ（ＩＥＥＥ−４
８８バス）による機器間接続方式によれば、ＧＰ−ＩＢ
の接続対象となる複数の機器のうち、特定の機器に、独
立して動作可能な複数のＧＰ−ＩＢパスポートを用意し
、データの受信とモデファイしたデータの送信、更には
複数の機器から。The above explanation has been given by taking as an example the parallel operation of the device 10 receiving via GP-IB4o and transmitting via GP-IB50.
02 and 103 become listeners (L), and it is also possible to import data from two independent GP-IB4s (7, 5 (+) into the main memory 101 in parallel, or vice versa. It is also possible to send data to two GP-IBs 40 and 50 in parallel.゛・ [Effects of the Invention] As detailed above, the QP-IB (IEEE-4
According to the device-to-device connection method using 88 bus), GP-IB
Among multiple devices to be connected, multiple GP-IB passports that can operate independently are prepared for a specific device, and data can be received and modified data can be sent from multiple devices.

の各データの取込み、送信等を各々並行して行なえる構
成としたことにより、機器間のデータ転送を効率良く実
現できる。By adopting a configuration in which each data can be taken in, transmitted, etc. in parallel, it is possible to efficiently transfer data between devices.

【図面の簡単な説明】[Brief explanation of drawings]

第１図はＧＰ−ＩＢｆｉｌ−用いた従来の機器間接続構
成を示すブロック図、第２図は本発明の一実施例を示す
ブロック図、第３図は上記実施例における一部機器の内
部構成要素を示すブロック図である。 １０．２０．３０・・・機器、４ｏ、ｓｏ・・・ＧＰ”
ＩＢ（ＩＥＥＥ−４８８パス）、１００・・・内部ノ々
ス、１０１・・・主メモリ、１０２，１０３・・・ＧＰ
−ＩＢインターフェイス、１０４・・・グロセッサＯ出
願人代理人　弁理士　鈴　江　武　彦第３図FIG. 1 is a block diagram showing a conventional connection configuration between devices using GP-IBfil-, FIG. 2 is a block diagram showing an embodiment of the present invention, and FIG. 3 is an internal configuration of some devices in the above embodiment. FIG. 2 is a block diagram showing elements. 10.20.30...Equipment, 4o, so...GP"
IB (IEEE-488 path), 100... Internal node, 101... Main memory, 102, 103... GP
-IB interface, 104... Grossessa O applicant's agent Patent attorney Takehiko Suzue Figure 3

Claims (1)

【特許請求の範囲】[Claims] １１１Ｊ−４８８パスにより機器間を接続するシス・テ
ムにおいて、上記システム内の特定の機器に上記ＩＥＩ
Ｊ　−４８８パスのポートを少くとも２つ設け、上記特
定の機器が少くとも２つの独立したＩＥＥＥ　−４８８
パスにより複数の相手機器との間でデータを並行して送
受することｆ：特徴とした機器間接続方式。In a system that connects devices using an 111J-488 path, the above IEI is installed on a specific device in the system.
At least two J-488 path ports are provided, and the above specified equipment has at least two independent IEEE-488 ports.
f: A device-to-device connection method characterized by transmitting and receiving data in parallel with multiple partner devices using a path.
JP59032823A 1984-02-23 1984-02-23 Interdevice connecting system Pending JPS60176165A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP59032823A JPS60176165A (en) 1984-02-23 1984-02-23 Interdevice connecting system
AU39509/85A AU580756B2 (en) 1984-02-23 1985-03-05 Water-blocked optical fiber cable

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59032823A JPS60176165A (en) 1984-02-23 1984-02-23 Interdevice connecting system

Publications (1)

Publication Number Publication Date
JPS60176165A true JPS60176165A (en) 1985-09-10

Family

ID=12369545

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59032823A Pending JPS60176165A (en) 1984-02-23 1984-02-23 Interdevice connecting system

Country Status (2)

Country Link
JP (1) JPS60176165A (en)
AU (1) AU580756B2 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6082156A (en) * 1983-10-13 1985-05-10 ドル−オリバ−　インコ−ポレイテツド Hydrocyclone
CA1299412C (en) * 1986-09-19 1992-04-28 Nobuhiro Akasaka Optical fiber cable preventing water from spreading toward cable interior
GB8905056D0 (en) * 1989-03-06 1989-04-19 Telephone Cables Ltd Optical fibre cable

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1569454A (en) * 1976-08-18 1980-06-18 Electric Power Res Inst Electric cables
DE3118172A1 (en) * 1981-05-08 1982-11-25 Philips Kommunikations Industrie AG, 8500 Nürnberg Longitudinally watertight optical communication cable
ATE36200T1 (en) * 1984-03-27 1988-08-15 Kabel & Drahtwerke Ag CABLE.

Also Published As

Publication number Publication date
AU580756B2 (en) 1989-02-02
AU3950985A (en) 1985-09-12

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