JPS60171037U - Snapper circuit of gate turn-off thyristors connected in series - Google Patents
Snapper circuit of gate turn-off thyristors connected in seriesInfo
- Publication number
- JPS60171037U JPS60171037U JP5536184U JP5536184U JPS60171037U JP S60171037 U JPS60171037 U JP S60171037U JP 5536184 U JP5536184 U JP 5536184U JP 5536184 U JP5536184 U JP 5536184U JP S60171037 U JPS60171037 U JP S60171037U
- Authority
- JP
- Japan
- Prior art keywords
- series
- gate turn
- thyristors connected
- circuit
- diode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来のゲートターンオフサイリスタを直列接続
した回路のスナバ−回路図、第′２図は第１図の回路波
形図、第３図は本考案の一実施例を。
示すスナバ−回路図である。
１〜４・・−ＧＴＯ１５・・・高圧直流電源、６・・・
−流リアクトル、７・・・負荷、８〜１１・・・スナバ
−回路、１２〜１５・・・スナバ−ダイオード、１６〜
１９・・・スナバ−コンデンサ、２０〜２３−’−放！
抵抗、２４・・・抵抗、２６〜２９・・・非線形抵抗器
、２５・・・フリーホイリングダイオード。Fig. 1 is a snubber circuit diagram of a conventional circuit in which gate turn-off thyristors are connected in series, Fig. 2 is a circuit waveform diagram of Fig. 1, and Fig. 3 is an embodiment of the present invention. FIG. 3 is a snubber circuit diagram shown in FIG. 1 to 4...-GTO15... High voltage DC power supply, 6...
- Current reactor, 7... Load, 8-11... Snubber circuit, 12-15... Snubber diode, 16-
19...Snubber capacitor, 20~23-'-release!
Resistor, 24...Resistor, 26-29...Nonlinear resistor, 25...Freewheeling diode.
Claims (1)
イオードとコンデンサから成る直列回路を並列に接続し
、更に前記ダイオードに並列に抵抗器を接続して成るス
ナバ−回路において、前記ダイオードに並列に非線形抵
抗器を接続したことを特徴とする直列接続したゲートタ
ーンオフサイリスタのスナバ−回路−゛ 、In a snubber circuit, a series circuit consisting of a diode and a capacitor is connected in parallel to each gate turn-off thyristor connected in series, and a resistor is connected in parallel to the diode, and a nonlinear resistor is connected in parallel to the diode. A snubber circuit of gate turn-off thyristors connected in series, characterized by:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5536184U JPS60171037U (en) | 1984-04-17 | 1984-04-17 | Snapper circuit of gate turn-off thyristors connected in series |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5536184U JPS60171037U (en) | 1984-04-17 | 1984-04-17 | Snapper circuit of gate turn-off thyristors connected in series |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS60171037U true JPS60171037U (en) | 1985-11-13 |
Family
ID=30577962
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5536184U Pending JPS60171037U (en) | 1984-04-17 | 1984-04-17 | Snapper circuit of gate turn-off thyristors connected in series |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60171037U (en) |
-
1984
- 1984-04-17 JP JP5536184U patent/JPS60171037U/en active Pending
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