JPS60169194A - Substrate for hybrid integrated circuit - Google Patents

Substrate for hybrid integrated circuit

Info

Publication number
JPS60169194A
JPS60169194A JP59024801A JP2480184A JPS60169194A JP S60169194 A JPS60169194 A JP S60169194A JP 59024801 A JP59024801 A JP 59024801A JP 2480184 A JP2480184 A JP 2480184A JP S60169194 A JPS60169194 A JP S60169194A
Authority
JP
Japan
Prior art keywords
glass
layer
copper
substrate
conductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59024801A
Other languages
Japanese (ja)
Other versions
JPH0464198B2 (en
Inventor
徹 石田
菊池 立郎
泰治 菊池
泰彦 堀尾
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP59024801A priority Critical patent/JPS60169194A/en
Priority to KR1019840005623A priority patent/KR900004379B1/en
Priority to GB08423483A priority patent/GB2149222B/en
Priority to DE19843434449 priority patent/DE3434449A1/en
Publication of JPS60169194A publication Critical patent/JPS60169194A/en
Priority to US06/898,892 priority patent/US4732798A/en
Publication of JPH0464198B2 publication Critical patent/JPH0464198B2/ja
Granted legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は厚膜部品、チップ部品、IC,LSIなどから
構成される高密度実装回路モジュール用のハイブリッド
集積回路用基板に関するものである。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a hybrid integrated circuit board for high-density packaging circuit modules composed of thick film parts, chip parts, ICs, LSIs, and the like.

従来例の構成とその問題点 近年、機器の小型化や多機能化の要望が年を追って強く
なってきているが、これらの要望に応えるため回路部品
の高密度実装が重要な技術となっている。特に、ICi
、LSIの発達、さらには抵抗やコンデンサの厚膜部品
の発達に伴い回路部品の実装密度が増々高密度化へと移
行しつつある。
Conventional configurations and their problems In recent years, the demand for smaller devices and more multi-functionality has become stronger, and in order to meet these demands, high-density mounting of circuit components has become an important technology. There is. In particular, ICi
With the development of LSIs and the development of thick film components such as resistors and capacitors, the mounting density of circuit components is becoming increasingly dense.

また、近年は通信周波数の高周波数化に伴って、モジュ
ール配線層の導体抵抗が重要なポイントとなっている。
Furthermore, in recent years, as communication frequencies have become higher, the conductor resistance of the module wiring layer has become an important point.

例えばチューナモジュールでは高周波域になると配線導
体抵抗が高い場合、発振やゲインの低下などの現象が伴
うため、従来構成のアルミナチューナモジュールでは導
体抵抗が高いため実用化が困難なのが現状である、しか
し、機器の小型化、アセプル工程の合理化などの観点か
らこれらの高周波回路のハイブリッドICによるモジュ
ール化が強く望まれている。
For example, in a tuner module, if the wiring conductor resistance is high in the high frequency range, phenomena such as oscillation and decrease in gain will occur, so it is currently difficult to put it into practical use with the alumina tuner module with a conventional configuration due to the high conductor resistance. From the viewpoints of miniaturization of equipment, rationalization of the aceplu process, etc., there is a strong desire for modularization of these high frequency circuits using hybrid ICs.

回路をモジュール化するとともに高周波域の特性向上を
も含めた回路実装を実現するためには、部品を小さくす
ることはもちろんのこと、上記したように配線導体の低
抵抗化や配線密度の向」二が必要となる。ここで配線密
度の向上には一般に配線の多層化という手段が考えられ
、各方面でその取組みが積極的である。従来これらの多
層基板としては大別して樹脂基板と銅配線の組合わせ、
またはアルミナセラミックスとMoiたはWとの組合わ
せなどかある。従来これらの構成による基板では高密度
化実装用基板として次のような問題点があった。
In order to modularize circuits and realize circuit packaging that also improves characteristics in the high frequency range, it is necessary not only to reduce the size of components, but also to reduce the resistance of wiring conductors and increase wiring density as described above. Two are required. In order to increase the wiring density, it is generally considered that the wiring is multilayered, and efforts are being made actively in various fields. Conventionally, these multilayer boards can be roughly divided into combinations of resin boards and copper wiring,
Alternatively, there is a combination of alumina ceramics and Moi or W. Conventional boards with these configurations have had the following problems as high-density mounting boards.

■ 樹脂基板と銅配線の組合わせ (イ)内部導体層間接続ピアホールの形成がむづかしく
、導体層部?接続には基板両面を貫通するスルホール形
成を行っている。そのため、多くの部品を塔載しようと
するときスルホール孔の面積が無視できず、結果的に実
装密度が上らない。
■ Combination of resin substrate and copper wiring (a) Is it difficult to form connection peer holes between internal conductor layers in the conductor layer? Connections are made by forming through holes that penetrate both sides of the board. Therefore, when trying to mount many components, the area of the through holes cannot be ignored, and as a result, the packaging density cannot be increased.

(ロ)樹脂基板では、厚膜部品の形成が不可能、すなわ
ち、グレーズ抵抗のような厚膜部品は800〜900℃
、空気中で形成するため、これらの部品の樹脂基板上へ
の形成ができず、基板と抵抗との一体化構成がとれない
(b) With resin substrates, it is impossible to form thick film parts, that is, thick film parts such as glaze resistors can be heated at temperatures of 800 to 900°C.
Since these parts are formed in air, these parts cannot be formed on a resin substrate, and an integrated structure of the substrate and the resistor cannot be achieved.

■ アルミナとMOまたはWの組合わせ(イ)部品の半
田接続のために多層基板表面のタングヌテン捷たはモリ
ブデン層上にニッケル、金などのメッキを施す必要かあ
る。
■ Combination of alumina and MO or W (a) Is it necessary to plate nickel, gold, etc. on the tungnuten or molybdenum layer on the surface of the multilayer board for solder connection of parts?

(ロ)厚膜部品でちるグレーズ抵抗やコンデンサの形成
は空気中、高温で行う必要があるが、タングステンやモ
リブデンのような酸化され易い導体利料から構成されて
いると、これらの厚膜部品の形成は不可能で厚膜部品と
の一体化回路基板として不向きである。
(b) The formation of glaze resistors and capacitors made of thick-film parts must be carried out in air at high temperatures, but if these thick-film parts are made of easily oxidized conductors such as tungsten or molybdenum, It is impossible to form such a film, making it unsuitable for use as an integrated circuit board with thick-film components.

(ハ)Mo、Wの導体抵抗が高い(20〜3〇四泊)上
記の理由から、高密度実装用基板または高周波モジュー
ル用基板として従来の樹脂多層基板まだはセラミック多
層基板として十分な機能を備えていないといえる。
(c) High conductor resistance of Mo and W (20 to 30 days) For the above reasons, conventional resin multilayer substrates do not have sufficient functionality as ceramic multilayer substrates as high-density mounting substrates or high-frequency module substrates. It can be said that they are not prepared.

発明の目的 本発明は上記欠点に鑑み、内部配線層の導体抵抗が低く
かつ厚膜抵抗が形成され、高周波回路のモジュール化や
高密度部品実装が可能なハイブリッド集積回路用基板を
提供するものである。
Purpose of the Invention In view of the above-mentioned drawbacks, the present invention provides a substrate for a hybrid integrated circuit in which the conductor resistance of the internal wiring layer is low and a thick film resistor is formed, and which enables modularization of high-frequency circuits and high-density component mounting. be.

発明の構成 本発明の銅配線層を含むハイブリッド集積回路用基板は
、アルミナを主成分とする多結晶基板上に、銅配線層と
電気絶縁を目的とするガラス層を1互に形成した積層体
と、最上層に形成したガラス層に内部銅配線層が露出す
るように設けた小孔と、この小孔部分に銅に還元されな
い低融点ガラスと貴金属とからなる充填材料と、この最
上層の充填材料に接続するように形成した銀−パラジウ
ム導体とルテニウム系グレーズ抵抗とからなるように構
成したものであシ、これによシ導体抵抗の低い、抵抗体
一体型多層構成の集積回路用基板となるものである。
Structure of the Invention The hybrid integrated circuit board containing a copper wiring layer of the present invention is a laminate in which a copper wiring layer and a glass layer for electrical insulation are formed on a polycrystalline substrate mainly composed of alumina. A small hole is formed in the glass layer formed on the top layer so that the internal copper wiring layer is exposed, a filling material made of low melting point glass and noble metal that cannot be reduced to copper is placed in the small hole portion, and This integrated circuit board is composed of a silver-palladium conductor formed to be connected to a filling material and a ruthenium-based glazed resistor, and has a multilayer structure with an integrated resistor and has low conductor resistance. This is the result.

実施例の説明 以下本発明の一実施例について、図面を参照しながら説
明する。
DESCRIPTION OF EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

第1図は、本発明の一実施例におけるハイブリッド集積
回路用基板の断面図を示すものである。
FIG. 1 shows a cross-sectional view of a hybrid integrated circuit board according to an embodiment of the present invention.

第1図において、1はアルミナ基板、2は銅材料からな
るヌルホール、3はアルミナ基板上に形成された銅配線
、4は上層配線層と絶縁する目的で形成したガラス層、
5はガラス絶縁層に形成された小孔に充填した銅に還元
されないガラスと貴金属とからなる充填部である。
In FIG. 1, 1 is an alumina substrate, 2 is a null hole made of copper material, 3 is a copper wiring formed on the alumina substrate, 4 is a glass layer formed for the purpose of insulating from the upper wiring layer,
Reference numeral 5 denotes a filling portion made of glass and noble metal that is not reduced to copper and filled in small holes formed in the glass insulating layer.

以上のように構成された本実施例の銅配線層を含むハイ
ブリッド集積回路用基板について以下その機能を説明す
る。
The functions of the hybrid integrated circuit board including the copper wiring layer of this embodiment configured as described above will be explained below.

第1図のように構成された基板は、まずアルミナ基板1
に銅ペーストでヌルホール2と配線層3をスクリーン印
刷する。これを120℃程度の温度で乾燥させたのちガ
ラス粉末をペースト状にしたものをヌクリーン印刷し次
に印刷されたガラスペーストを乾燥させガラス層4を形
成する。このとき、ガラス層4には下部導体が露出する
ような小孔4aが必要箇所に形成されている。この小孔
4aはあとで最上層と電気的に接続する目的で設けられ
るものである。このようにアルミナ基板と銅ペーストと
、ガラスペーストを印刷、乾燥したのち、これを900
°C1窒素雰囲気中で焼成した。
First, the substrate configured as shown in Fig. 1 is an alumina substrate 1.
Then, screen print the null hole 2 and wiring layer 3 using copper paste. After drying this at a temperature of about 120° C., a paste of glass powder is printed with Nuclean, and then the printed glass paste is dried to form a glass layer 4. At this time, small holes 4a are formed in the glass layer 4 at necessary locations to expose the lower conductor. This small hole 4a is provided for the purpose of electrical connection with the uppermost layer later. After printing and drying the alumina substrate, copper paste, and glass paste in this way,
It was fired in a nitrogen atmosphere at 1°C.

焼成中のプロファイルはピーク温度900°Cで10分
程度であった。なお、焼成中窒素ガス中に10ppm以
下の若干の酸素を混入した。こののち、形成された絶縁
ガラス層4に設けた銅配線が露した小孔部4aにBa 
O−B703系ガラス粉末と銀粉末とのペーストをスク
リーン印刷し、乾燥後850℃の通常厚膜炉に通した。
The profile during firing was about 10 minutes at a peak temperature of 900°C. Note that a small amount of oxygen of 10 ppm or less was mixed into the nitrogen gas during firing. After that, Ba
A paste of O-B703 type glass powder and silver powder was screen printed, dried and then passed through a conventional thick film oven at 850°C.

この基板を空気中860°Cに30分間放置したが、内
部銅導体層が酸化される事なく2〜3mΩの導体抵抗を
示した。また、充填材と下部導体層の間の抵抗を測定し
たところ10へ15mΩであった。
This substrate was left in the air at 860° C. for 30 minutes, but the internal copper conductor layer was not oxidized and exhibited a conductor resistance of 2 to 3 mΩ. Further, when the resistance between the filler and the lower conductor layer was measured, it was 10 to 15 mΩ.

以下に上記実施例の構成原理を簡単に述べる。The principle of construction of the above embodiment will be briefly described below.

ここで、最もポイントとなるところは第1図5の充填部
に銅に還元されないガラスと貴金属とからなる充填材を
形成するところにある。これはこの構造にすることによ
り下部導体である銅と充填材を通じて表面層と電気的導
通がとれることと、これを空気中高温の条件下において
も充填材を通じて空気が下部導体層が酸化されることが
ないことである。もちろん、ガラス絶縁層で下部に形成
された銅導体は、ガラスが空気の拡散防止利として働き
、高温空気中処理においても酸化されることはない。一
般に、流動性の材料に導電性粒子を分散することによシ
、導電粒子同志が一種の凝集現象を起し粒子が接触を保
つ構造となる。その結果、導電粒子分散体は電気的導通
現象がみられることとなる。したがって、本発明の構成
ではある温度に達するとガラスは流動性を持ち、これに
貴金族が分散されているため電気的導通が得られること
となる。導電粒子として貴金属を用いたのは高温空気中
でも酸化されないことが必要となるためである。一方、
本発明の構成によシ空気中高温においても内部銅配線層
か酸化されないことについて述べる。
The most important point here is to form a filler made of glass and precious metals that cannot be reduced to copper in the filling portion shown in FIG. 5. This is because this structure allows electrical continuity with the surface layer through the copper, which is the lower conductor, and the filler, and even under high temperature conditions in the air, the lower conductor layer is oxidized by air through the filler. This is something that never happens. Of course, the copper conductor formed under the glass insulating layer will not be oxidized even during high-temperature air treatment because the glass acts as an air diffusion preventive. Generally, by dispersing conductive particles in a fluid material, a type of agglomeration phenomenon occurs between the conductive particles, resulting in a structure in which the particles maintain contact with each other. As a result, the conductive particle dispersion exhibits an electrical conduction phenomenon. Therefore, in the structure of the present invention, when a certain temperature is reached, the glass becomes fluid, and since the noble metal group is dispersed therein, electrical conduction is obtained. The reason for using noble metals as the conductive particles is that they must not be oxidized even in high-temperature air. on the other hand,
It will be described that the structure of the present invention prevents the internal copper wiring layer from being oxidized even at high temperatures in air.

本発明では、内部銅配線層への酸化を防止するのにガラ
ス利料の効果が意。つまり、第1図の充填部5の充填材
のガラス層が焼成後、ガラス絶縁層によくぬれ、まだ貴
金属粒子のまわりはガラスで充堕されているため、との
放ラス層により内部への気密性を保ち空気が下部導体層
に至らないだめである。ここで、ガラス材料として一般
に良く用いられる鉛系のガラスを考えてみると、ガラス
は下部導体の銅と次のような反応を起す。
In the present invention, the effect of the glass additive is significant in preventing oxidation of the internal copper wiring layer. In other words, after firing, the glass layer of the filling material in the filling part 5 in Fig. 1 wets the glass insulating layer well, and the area around the precious metal particles is still filled with glass. It is important to maintain airtightness so that air does not reach the lower conductor layer. If we consider lead-based glass, which is commonly used as a glass material, the following reaction occurs between the glass and the copper of the lower conductor.

Cu +3PbO→CuO+ 3Pb すなわち、導体である銅がガラスの主成分である酸化鉛
によって酸化され、充填部と銅の接触部の抵抗が高くな
ってし甘う。従って、本発明に使用するガラスは銅を酸
化しない性質、別の云い方をすれば銅によって還元され
ないガラス拐料である事が重要な点となる。このような
条件を満足するガラスとしてはアルカリ土類金属酸化物
が川原系金属酸化物を主成分とするものがある。前に述
べたBaO−B206系ガラスはそれに該当するもので
ある。
Cu +3PbO→CuO+ 3Pb That is, copper, which is a conductor, is oxidized by lead oxide, which is the main component of glass, and the resistance of the contact area between the filled part and the copper increases. Therefore, it is important that the glass used in the present invention has a property that does not oxidize copper, or in other words, that it is a glass powder that is not reduced by copper. Some glasses that satisfy these conditions include those whose alkaline earth metal oxides are mainly Kawahara metal oxides. The BaO-B206 glass described above falls under this category.

以上述べたように、本発明の構成をとることによυ、下
部に銅配線を施すと同時にその上部の絶縁層に設けた小
孔に形成した充填材を通じて上部層へ電気的導通がとれ
る事が可能となり、かつこの基板は空気中高温に於いて
も下部銅配線層が酸化される事かない。したがって、現
在非常に発達している厚膜技術によってこの基板の上部
にグレーズ抵抗、グレーズ誘電体の一体化が可能となる
As described above, by adopting the configuration of the present invention, electrical continuity can be established to the upper layer through the filling material formed in the small hole provided in the upper insulating layer at the same time as copper wiring is provided at the lower part. Moreover, the lower copper wiring layer of this board will not be oxidized even when exposed to high temperatures in the air. Therefore, the currently very developed thick film technology makes it possible to integrate a glaze resistor and a glaze dielectric on top of this substrate.

ここで、実施例では銅配線層、ガラス絶縁層をそれぞれ
1層としたがこれは工程を繰返すことによシ層数を増す
事ができる。つまり、本発明の基板構成によシ内部配線
が多層化され、高密度の部品実装が可能であるとともに
、厚膜部品の一体化が可能であシ実装密度が更に向上で
きる。
Here, in the embodiment, each of the copper wiring layer and the glass insulating layer is one layer, but the number of layers can be increased by repeating the process. In other words, the board structure of the present invention allows the internal wiring to be multi-layered, allowing for high-density component mounting, as well as the integration of thick-film components, thereby further improving the packaging density.

また、内部導体層として銅配線を施しているため導体抵
抗が小さく■高周波回路モジュール用に適している。■
配線の線IJを細くする事か可能などの利点がある。
In addition, since copper wiring is used as the internal conductor layer, the conductor resistance is low and it is suitable for use in high-frequency circuit modules. ■
There are advantages such as being able to make the wiring line IJ thinner.

次に、本発明の他の実施例について図面を参照しなから
説明するう 第2図は、本発明の他の実施例における銅配線を含むハ
イブリッド集積回路用基板の制面図である。本発明の実
施例は実施例1に示した基板に充填材6と接続するよう
に銀−パラジウム導体6と銀パラジウム導体を電極とし
て酸化ルテニウム系グレーズ抵抗6を形成したものであ
る。
Next, another embodiment of the present invention will be described with reference to the drawings. FIG. 2 is a top view of a hybrid integrated circuit board including copper wiring according to another embodiment of the present invention. In an embodiment of the present invention, a ruthenium oxide based glaze resistor 6 is formed on the substrate shown in embodiment 1 using a silver-palladium conductor 6 and a silver-palladium conductor as electrodes so as to be connected to a filler 6.

銀−パラジウム導体と酸化ルテニウム系抵抗体の形成は
従来の形成方法と全て同じ工程を経て作成した。すなわ
ち、銀−パラジウムベーヌトヲ印刷乾燥後、860℃空
気中厚膜炉で焼成し、更にこれに酸化ルテニウム系ペー
ストを印刷、乾燥後860’(:、、空気中で焼成した
。このようにして、作成したグレーズ抵抗体は従来のア
ルミナ基板上へ形成したグレーズ抵抗体に比べ若干抵抗
値は高目にでたが、例えば100にΩ/口の抵抗体で温
度係数100〜150 ppmと十分一般に使用し得る
特性のものが得られた。以上のように、本実施例によれ
ば実施例1の基板上に従来厚膜抵抗を従来方法で形成す
る事によシ、内部導体抵抗の小さい、多層構造を有する
抵抗一体型基板を実現している。
The silver-palladium conductor and the ruthenium oxide resistor were formed through the same steps as in the conventional method. That is, after printing and drying the silver-palladium base metal, it was fired in a thick film oven at 860°C in the air, and then a ruthenium oxide paste was printed on it, and after drying, it was fired in the air at 860°C. The resistance value of the glazed resistor that was created was slightly higher than that of a conventional glazed resistor formed on an alumina substrate, but it is generally enough to have a temperature coefficient of 100 to 150 ppm for a resistor of 100 Ω/hole, for example. As described above, according to this example, by forming the conventional thick film resistor on the substrate of Example 1 by the conventional method, it was possible to obtain a small internal conductor resistance. A resistor-integrated substrate with a multilayer structure has been realized.

発明の効果 以上の説明から明らかなように、本発明はアルミナ基板
上に内部導体層として銅材料、絶縁層としてガラヌ材料
を用い多層化するとともに、ガラス貴金属からなる充填
材で表面層へ電気的接続を可能とし、かつ上層には厚膜
部品を形成し一体化しているもので、■内部導体抵抗が
小さいため高周波特性を向上させ、かつ導体線巾を細く
できる。
Effects of the Invention As is clear from the above explanation, the present invention uses copper material as an internal conductor layer and galanu material as an insulating layer on an alumina substrate to form a multilayer structure, and a filler made of a glass noble metal to electrically connect the surface layer. It enables connection and is integrated with a thick film component formed on the upper layer. (1) Low internal conductor resistance improves high frequency characteristics and allows for thinner conductor line width.

■空気中、高温形成の厚膜部品一体化が可能という優れ
た効果が得られる。その効果によシ、これから増々情報
通信手段として高周波化する回路のモジュール化を可能
にするとともに高密度実装を可能にするという点で回路
モジュールの小型化が可能という効果が得られる。
■The excellent effect of being able to integrate thick film parts formed at high temperatures in air is achieved. As a result, it is possible to modularize circuits that will increasingly be used as information communication means at high frequencies, and also to enable miniaturization of circuit modules in that high-density packaging is possible.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例におけるハイグリッド集積回
路用基板の断面図、第2図は本発明の他の実施例におけ
るハイブリッド集積回路用基板の断面図である。 1・・・・・・アルミナ基板、2・・・・・・銅ヌルホ
ール、3・・・・・・銅配線層、4・・・・・・ガラス
絶縁層、6・・・・・充填部、6・・・・・・銀−パラ
ジウム導体層、7・・・・・酸化ルテニウム系グレーズ
抵抗体。
FIG. 1 is a sectional view of a high-grid integrated circuit board according to one embodiment of the invention, and FIG. 2 is a sectional view of a hybrid integrated circuit board according to another embodiment of the invention. DESCRIPTION OF SYMBOLS 1... Alumina substrate, 2... Copper null hole, 3... Copper wiring layer, 4... Glass insulating layer, 6... Filling part , 6... Silver-palladium conductor layer, 7... Ruthenium oxide based glaze resistor.

Claims (1)

【特許請求の範囲】[Claims] アルミナを主成分とする多結晶基板上に、銅配線層と電
気絶縁を目的とするガラス層を交互に形成した積層体と
、最上層に形成したガラス層に内部銅配線層が露出する
ように設けた小孔と、この小孔部分に銅に還元されない
低融点ガラスと貴金属とからなる充填材料と、この最上
層の充填材料に接続するように形成した銀−パラジウム
導体と7レテニウム系グレーズ抵抗からなるハイブリッ
ド集積回路用基板。
A laminate in which copper wiring layers and glass layers for electrical insulation are alternately formed on a polycrystalline substrate mainly composed of alumina, and the internal copper wiring layer is exposed to the glass layer formed on the top layer. A small hole is provided, a filling material made of low-melting glass and noble metal that cannot be reduced to copper is formed in the small hole, and a silver-palladium conductor and a 7 rethenium-based glaze resistor are formed so as to be connected to this top layer filling material. A hybrid integrated circuit board consisting of:
JP59024801A 1983-09-16 1984-02-13 Substrate for hybrid integrated circuit Granted JPS60169194A (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP59024801A JPS60169194A (en) 1984-02-13 1984-02-13 Substrate for hybrid integrated circuit
KR1019840005623A KR900004379B1 (en) 1983-09-16 1984-09-15 Multilayer ceramic substrate and method of making the same
GB08423483A GB2149222B (en) 1983-09-16 1984-09-17 Multilatered ceramic substrate and method of making the same
DE19843434449 DE3434449A1 (en) 1983-09-16 1984-09-17 CERAMIC MULTILAYER SUBSTRATE AND METHOD FOR PRODUCING THE SAME
US06/898,892 US4732798A (en) 1983-09-16 1986-08-21 Multilayer ceramic substrate and method of making the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59024801A JPS60169194A (en) 1984-02-13 1984-02-13 Substrate for hybrid integrated circuit

Publications (2)

Publication Number Publication Date
JPS60169194A true JPS60169194A (en) 1985-09-02
JPH0464198B2 JPH0464198B2 (en) 1992-10-14

Family

ID=12148295

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59024801A Granted JPS60169194A (en) 1983-09-16 1984-02-13 Substrate for hybrid integrated circuit

Country Status (1)

Country Link
JP (1) JPS60169194A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07176864A (en) * 1993-12-21 1995-07-14 Fujitsu Ltd Manufacture of multilayered ceramic board
JP2013033894A (en) * 2011-06-27 2013-02-14 Shinko Electric Ind Co Ltd Wiring board, manufacturing method of the same and semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07176864A (en) * 1993-12-21 1995-07-14 Fujitsu Ltd Manufacture of multilayered ceramic board
JP2013033894A (en) * 2011-06-27 2013-02-14 Shinko Electric Ind Co Ltd Wiring board, manufacturing method of the same and semiconductor device

Also Published As

Publication number Publication date
JPH0464198B2 (en) 1992-10-14

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