JPS60165745A - Resin-sealed semiconductor device - Google Patents
Resin-sealed semiconductor deviceInfo
- Publication number
- JPS60165745A JPS60165745A JP2074484A JP2074484A JPS60165745A JP S60165745 A JPS60165745 A JP S60165745A JP 2074484 A JP2074484 A JP 2074484A JP 2074484 A JP2074484 A JP 2074484A JP S60165745 A JPS60165745 A JP S60165745A
- Authority
- JP
- Japan
- Prior art keywords
- heat sink
- resin
- sink
- layer
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
Description
【発明の詳細な説明】
〔発明の技術分野〕
この発明は樹脂封止型半導体装置に係り、特にヒートシ
ンクを有する樹脂封止型半導体装置におけるヒートシン
クの改良構造に関する。DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a resin-sealed semiconductor device, and more particularly to an improved structure of a heat sink in a resin-sealed semiconductor device having a heat sink.
従来の樹脂封止型半導体装置で、例えば第１図ないし第
３図に示されるパワーＩＣがある。図示の半導体装置の
構成は、銅のように熱伝導性にすぐれた金属板で形成さ
れたビー１−シンク（１）と、このビー１−シンク（１
）にマウン１−された半導体装７−（２）と、この半導
体素子（２）の電極が金属細線（３）によって導出され
るリード（４）、（４）・・・ と、前記半導体素子（
２）とともにリード（４）、（４）・・・の各一部およ
びヒートシンク（１）の一部とを一体に封止するモール
ド樹脂外囲器（５）とからなっている。2. Description of the Related Art Conventional resin-sealed semiconductor devices include, for example, power ICs shown in FIGS. 1 to 3. The configuration of the illustrated semiconductor device consists of a B1-sink (1) formed of a metal plate with excellent thermal conductivity such as copper, and a B1-sink (1) formed of a metal plate with excellent thermal conductivity such as copper.
) mounted on a semiconductor device 7-(2), leads (4), (4), from which electrodes of the semiconductor element (2) are led out by thin metal wires (3), and the semiconductor element. (
2), a molded resin envelope (5) that integrally seals each part of the leads (4), (4), and a part of the heat sink (1).
」二記において、リード（４）、（４）・・・はヒート
シンク（１）のヒートシンク基体（１ａ）と同様に銅板
で形成され熱伝導性、導電性にすぐれた材質でなるリー
ド基体（４ａ）とともに、銅の酸化を防止するためその
露出面はニッケル被覆層（４ｂ）で被覆され、またイン
ナ一部には金属細線をボンディングするための銀被覆層
（４ｂ）が設けられ、さらに、樹脂モールド封止後にそ
の外囲器（５）からの突出部（アウターリード部）には
表面の耐酸化とはんだ接合を良好ならしめるため錫被覆
層（４ｃ）が設けられている。次にヒートシンク（りは
前に述べたように伝熱効率を高めるためにそのヒートシ
ンク基板（１ａ）は銅で形成されるが、その表面はニッ
ケル被覆層（１ｂ）で被覆され、かつ半導体素子（２）
をマウントする側の主面には銀被覆層（ＩＣ）が設けら
れて」１記半導体素子のマウン１−のだめのはんだ層（
６）との接合を良好ならしめている。また、他方の露出
側の主面には表面の耐酸化性向」二のため錫被覆層（１
ｄ）が設けられており、これで外部放熱板（１０）に密
接させて半導体素子の発熱を熱放散させるようになって
いる。2, the leads (4), (4)... are made of a copper plate, similar to the heat sink base (1a) of the heat sink (1), and are made of a material with excellent thermal conductivity and electrical conductivity. ), the exposed surface of the copper is coated with a nickel coating layer (4b) to prevent oxidation, and a silver coating layer (4b) is provided on a part of the inner part for bonding thin metal wires. After mold sealing, a tin coating layer (4c) is provided on the protruding part (outer lead part) from the envelope (5) in order to improve the surface oxidation resistance and solder joint. Next, the heat sink (as mentioned earlier, the heat sink substrate (1a) is made of copper in order to increase heat transfer efficiency, its surface is coated with a nickel coating layer (1b), and the semiconductor element (2 )
A silver coating layer (IC) is provided on the main surface on the side where the semiconductor element is mounted.
6) provides good bonding. In addition, on the other exposed main surface, a tin coating layer (1
d) is provided, which is brought into close contact with the external heat sink (10) to dissipate heat generated by the semiconductor element.
斜上の従来のピー１−シンクは半導体素子のけんだマウ
ン１−を良好にするためマウン１−面に銀めっき被覆層
が設けられ、外囲器からのｎ出面には銅の耐蝕防止のた
めニッケルめっき被覆層を介して錫の被覆層が設けられ
ているが、ニッケルの被覆層を介在させる理由は、錫被
覆層を銅に直付すると両者によって金属間化合物の例え
ばＣｕ３ＳｎやＣｕ６Ｓｎ５等を生じやすく、これらは
一般に脆く、温度の変動に対し銅とは異なる熱膨張をな
すため銅との結合が破壊される場合があるのでこれを回
避するためである。」二記錫被覆層はアラターリ−３−
かつ同時に形成される。The conventional P-1 sink on the slant has a silver plating coating layer on the surface of the mount 1- to improve the mount 1- of the semiconductor element, and a corrosion-resistant copper layer is provided on the n-output surface from the envelope. Therefore, a tin coating layer is provided through a nickel plating coating layer, but the reason why the nickel coating layer is provided is that when the tin coating layer is attached directly to copper, intermetallic compounds such as Cu3Sn and Cu6Sn5 are formed between the two. This is to avoid this because these materials are generally brittle and have a different thermal expansion than copper due to temperature fluctuations, which may cause the bond with copper to break. The second tin coating layer is formed simultaneously.
次に近年の傾向として半導体装置を機器へ実装する場合
の信頼性を向上させるために、アウターリードを半田デ
ィツプすることが要求されている。Next, as a recent trend, in order to improve the reliability when mounting semiconductor devices on equipment, it is required to solder dip the outer leads.
この場合には、ビー１〜シンクの露出面はニッケルめっ
き被覆層である。ところがニッケルは次表に示すように
、熱伝導性が若干悪いこと、およびニッケルが硬いため
にリード強度が低下する問題があるので、めっき被覆層
厚を小にコントロールする必要があった。In this case, the exposed surfaces of Be 1 to Sink are coated with nickel plating. However, as shown in the following table, nickel has a problem of slightly poor thermal conductivity and a decrease in lead strength because nickel is hard, so it was necessary to control the thickness of the plating layer to a small value.
表
次に、従来半導体装置の組立工程の効率を上げるために
、通常のリードフレームは多連化しており、パワＩＣの
場合はそれぞれ伴なってヒートン ４−
ンクもリードフレー１１に数個取着されていた。ところ
がビー１〜シンクは銅で形成されているため重く、リー
ドフレーム自体の強度がそれに耐えられなくなるので、
リードフレームの板厚を厚くしたり、直接に半導体装置
には不要なリードフレームの枠部を大にしなければなら
なくなり、リードフレーム自体のロストアツプにつなが
る。さらにリードフレームの輸送面でも効率が悪かった
。また、ボンディング工程以降、モールド工程に至る工
程中の搬送、およびモールド金型内にリードフレームを
挿入する時などボンディングワイヤがダメージをうけや
すく、ワイヤ切れ、ボンディングワイヤ剥れなどの不良
が発生しやすかった。また、モールド金型でモールドを
施す際、次にあげる問題があった。すなわち、ボッ１〜
に装填された樹脂がランチを経てゲートから個々のＩＣ
の外囲部分に注入されて封止が達成されるが、その後に
ポットに残った樹脂部（カル）を中心にして各ランナで
個々のリードフレームの樹脂成形品がつながれた状態に
なる。ついで、個々のＩＣ成形品は金型に設けられてい
るエジェクタで下金型のキャビティ部により離型される
。この場合、ヒートシンクで重くなった多連リードフレ
ームはランチ部で折れて下金型に残るため、これの取出
しに手間がかかり作業性が悪くなるという問題があった
。Next, in order to improve the efficiency of the assembly process of conventional semiconductor devices, normal lead frames are made into multiple series, and in the case of power ICs, several Heaton links are also attached to the lead frame 11. It had been. However, since B1~Sink is made of copper, it is heavy, and the strength of the lead frame itself will not be able to withstand it.
It becomes necessary to increase the thickness of the lead frame, or to increase the size of the frame of the lead frame that is not directly necessary for the semiconductor device, which leads to loss of the lead frame itself. Furthermore, the transportation efficiency of lead frames was also poor. In addition, bonding wires are easily damaged during transportation during the bonding process up to the molding process, and when inserting the lead frame into the mold, and defects such as wire breakage and bonding wire peeling are likely to occur. Ta. Further, when molding is performed using a molding die, there are the following problems. In other words, Bo 1~
The resin loaded into the IC passes through the lunch gate and is delivered to individual ICs.
After that, the resin molded parts of the individual lead frames are connected in each runner around the resin part (cul) remaining in the pot. Then, the individual IC molded products are released from the mold by an ejector provided in the mold through the cavity portion of the lower mold. In this case, the multi-lead frame, which has become heavy due to the heat sink, breaks at the launch portion and remains in the lower mold, so there is a problem in that it takes time and effort to take out the lead frame, resulting in poor workability.
次に、ビー１〜シンクについて半導体素子の信頼性保証
項目にある温度サイクルテスト、熱衝撃テスト笠で高パ
ワー用でヒートシンクが大きいものは樹脂とヒートシン
クの熱膨張の差による樹脂クラックが発生しやすい問題
があった。Next, regarding B1~Sink, we will conduct a temperature cycle test and thermal shock test under the reliability guarantee items for semiconductor devices.In the case of high-power devices with large heat sinks, resin cracks are likely to occur due to the difference in thermal expansion between the resin and the heat sink. There was a problem.
この発明は上記従来の樹脂封止型半導体装置の問題点に
鑑み、そのヒートシンクを改良する。In view of the problems of the conventional resin-sealed semiconductor device, the present invention improves the heat sink thereof.
〔発明の概要〕
この発明は半導体素子をマウントしたヒートシンクを有
する樹脂封止型半導体装置におけるヒートシンクが表層
の一部に半導体素子をマウントするための銅層を備えた
アルミニウムで形成されていることを特徴とする樹脂封
止型半導体装置の構造を提供する。そして斜上の構造に
より、ヒートシンクのコストの低減化が達成でき、また
軽量化されてフレームが多連化できアセンブリコストの
低減化が達成され、さらに、封＋Ｉ―樹脂とじ−１−シ
ンク境界での樹脂クラックを防止し、熱抵抗についても
問題なく達成された。[Summary of the Invention] The present invention discloses that a heat sink in a resin-sealed semiconductor device having a heat sink on which a semiconductor element is mounted is formed of aluminum with a copper layer on a part of the surface layer for mounting the semiconductor element. The present invention provides a structure of a characteristic resin-sealed semiconductor device. The slanted structure reduces the cost of the heat sink, and also reduces the weight and allows multiple frames to be connected, reducing assembly costs. The resin cracks were prevented, and thermal resistance was also achieved without any problems.
次にこの発明を一実施例につき図面を参照して詳細に説
明する。なお、この発明の一実施例の説明において従来
と変わらない部分は図面に同じ符号をつけて示し説明も
省略する。Next, one embodiment of the present invention will be explained in detail with reference to the drawings. In the description of an embodiment of the present invention, parts that are the same as those in the prior art are designated by the same reference numerals in the drawings, and the description thereof will be omitted.
一実施例を示す第４図において、ヒーＩ〜シンク（旦）
における（Ｉｌａ）はアルミニラ１１で形成されたピー
１〜シンク基体で、その一方の主面の表層の一部に半導
体素子（２）をはんだ接合さぜるための銅層（ｌｌｂ）
が被着されている。この銅層はビー１−シンク基体にな
るアルミニラ１１条に銅クラツドを施して形成され、あ
るいはアルミニウム条に銅めっきを施して形成される。In FIG. 4 showing an example, heat I to sink (dan)
(Ila) is a P1-sink base made of Aluminum 11, and a copper layer (llb) for soldering the semiconductor element (2) is formed on a part of the surface layer of one main surface.
is covered. This copper layer is formed by applying a copper cladding to 11 aluminum strips that will become the be-1-sink substrate, or by applying copper plating to an aluminum strip.
そして、このピー１−シンクはビー１〜シンクプレ入金
型で形成され、別途プレス成形されたり−ドフレー１１
にこう着させて・７一
体となし、多連のアルミニウム上−１〜シンクつきリー
ドフレームに形成される。次に、パワーＴＣ素了（２）
は上記銅層（］Ｈ））に例えば＋１２−Ｎ２のフォーミ
ングガスの還元性雰囲気中で３５０〜４００℃に加熱し
て振動をｒｉえてマウン１〜が施される。次に、リード
（４）、（４）・における外囲器（５）から突出した部
分、すなわち、アウターリードははんだ浴に浸漬させる
はんだ処理を施してはんだ被覆層（１２）が設けら７ｈ
ている。Then, this P1-sink is formed with a B1-sink pre-deposited mold, and may be press-molded separately.
7 is integrated into a multi-series aluminum top-1 lead frame with a sink. Next, Power TC Soryo (2)
The above-mentioned copper layer (]H) is heated to 350 to 400 DEG C. in a reducing atmosphere of, for example, +12-N2 forming gas and subjected to vibrations. Next, the parts of the leads (4) and (4) that protrude from the envelope (5), that is, the outer leads, are subjected to soldering treatment by immersing them in a solder bath to provide a solder coating layer (12) for 7 hours.
ing.
上記ビー１−シンク基体（１，１ａ）における銅層が被
２ｎさ扛ている主面と反対側の主面は外囲器の一部をな
して露出するが、この露出したアルミニウム面には酸化
アルミニウム、の薄層（ｌｌｃ）が生じるが、表層にと
どまり内部に侵入するものでないので、１へ導体装置の
機能に悪影響を及ぼすものではない。The main surface of the Be-1-sink substrate (1, 1a) opposite to the main surface covered with the copper layer is exposed as a part of the envelope, but this exposed aluminum surface is Although a thin layer (llc) of aluminum oxide is formed, it remains on the surface layer and does not penetrate into the interior, so it does not have an adverse effect on the function of the conductor device.
なお、上記構造は組立を含めロスト低減を最大の目的と
しているが、設備との兼合いで、従来設けられていた銀
めっき被覆層を設けることも問題はない。Although the above structure aims to reduce losses including assembly, there is no problem in providing a conventional silver plating layer in consideration of the equipment.
８− この発明には次に挙げる顕著な効果がある。 8- This invention has the following remarkable effects.
（ａ）ヒーＩ〜シンクの基体をアルミニウムに変えるこ
とにより素材費がぼぼ部分の１に低減できる。(a) By changing the base of the sink to aluminum, the material cost can be reduced to just a fraction of the cost.
すなわち、ビー１〜シン））１個の大きさがＯ、Ｇ ｃ
ｌｌのとき銅素材費は３．５円、アルミニラｊ１は１．
２円となる。That is, the size of B1~Sin)) is O, G c
When ll, the cost of copper material is 3.5 yen, and the cost of aluminum j1 is 1.
It will be 2 yen.
（ｂ）アルミニラ１１の耐蝕性によって外囲器からの露
出面の外装めっきが不要とかり、めっきに要する費用が
低減する。(b) Due to the corrosion resistance of the aluminium 11, there is no need for exterior plating on the exposed surface from the envelope, and the cost required for plating is reduced.
（ｃ）軽量化されるので、ボンディング後の配送や、モ
ールド型へのフレーム挿入時のボンディングワイヤに対
する重さによるダメージが少く、ボンディングワイヤ切
れ、ボンディング剥れ等の不良が軽減できた。次に、フ
レー１１の多連化が可能となり、組立効率が向」二する
。さらに、モールド工程でフレームの重さによるランナ
部からの折れ等がなくなり作業性が改善される。また、
フレームの梱包および輸送効率を向」―させることが可
能になる。(c) Since the weight is reduced, there is less damage to the bonding wire due to the weight during delivery after bonding or when inserting the frame into the mold, and defects such as bonding wire breakage and bonding peeling can be reduced. Next, it becomes possible to have multiple frames 11, and the assembly efficiency is improved. Furthermore, during the molding process, the runner part does not break due to the weight of the frame, and workability is improved. Also,
It becomes possible to improve the packaging and transportation efficiency of the frame.
（ｄ）アルミニウムのピー１〜シンクはアルミニウムに
近いため、ピー１−シンクと封止樹脂との境界面に樹脂
のクラックが発生しにくくなり、温度サイクルデスト１
熱衝撃テスト等の信頼性が向」ニする。(d) Since the aluminum P1-sink is close to aluminum, cracks in the resin are less likely to occur at the interface between the P1-sink and the sealing resin, and the temperature cycle dest1
The reliability of thermal shock tests, etc. is improved.
（ｅ）熱抵抗値については第５図に示すように、製品に
ついてＲｔｈが３℃／Ｗの保障限度に対し２．２８℃／
Ｗで充分満足できるものであり、また、この値は従来の
１．５℃／Ｗとも大差のないものである。(e) As for the thermal resistance value, as shown in Figure 5, the Rth of the product is 2.28℃/W against the guaranteed limit of 3℃/W.
W is sufficiently satisfactory, and this value is not much different from the conventional value of 1.5°C/W.
第１図と第２図はいずれも従来の樹脂封止型半導体装置
の斜視図、第３図は放熱板に取着した従来の樹脂封止型
゛１′：導体装置の断面図、第４図はこの発明の１実施
例の樹脂封止型半導体装置の断面図、第５図は熱抵抗を
示す線図である。
２ 半導体素子
５ 樹脂封１１−外囲器
１１ ピー１−シンク
＋１ａ ヒートシンク基体
１１ｂ ヒートシンクの銅層
Ｉｎｃ 酸化アルミニラ１１の碧層
代理人 弁理−１，井 、に −・ 男−１１＝
第 １ 図
第 ２ 図
第３図
第 ４ 図
第 ５ 図Figures 1 and 2 are both perspective views of conventional resin-sealed semiconductor devices, Figure 3 is a sectional view of a conventional resin-sealed conductor device attached to a heat sink, and Figure 4 The figure is a sectional view of a resin-sealed semiconductor device according to an embodiment of the present invention, and FIG. 5 is a diagram showing thermal resistance. 2 Semiconductor element 5 Resin seal 11 - Envelope 11 P1 - Sink + 1a Heat sink base 11b Copper layer of heat sink Inc Aoya agent of alumina oxide 11 Attorney - 1, I, Ni - Male - 11 = Fig. 1 2 Figure 3 Figure 4 Figure 5
Claims (1)
ートシンク、前記ヒー！・シンクの銅層にマウントされ
た半導体素子、前記゛１′、導体素子の電極を導出する
リード、および、前記リードの各一部とヒートシンクの
一部を露出させリードと半導体素子とヒートシンクを一
体に封着する樹脂封止外囲器を備えた樹脂封止型半導体
装置。A heat sink formed of Aluminum 11 with a copper layer on a part of the surface layer, the heat sink mentioned above!・The semiconductor element mounted on the copper layer of the sink, the lead leading out the electrode of the conductor element, and a part of each lead and a part of the heat sink are exposed to integrate the lead, the semiconductor element, and the heat sink. A resin-sealed semiconductor device equipped with a resin-sealed envelope.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2074484A JPS60165745A (en) | 1984-02-09 | 1984-02-09 | Resin-sealed semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2074484A JPS60165745A (en) | 1984-02-09 | 1984-02-09 | Resin-sealed semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS60165745A true JPS60165745A (en) | 1985-08-28 |
Family
ID=12035697
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2074484A Pending JPS60165745A (en) | 1984-02-09 | 1984-02-09 | Resin-sealed semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60165745A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5488254A (en) * | 1991-08-05 | 1996-01-30 | Hitachi, Ltd. | Plastic-molded-type semiconductor device |
| KR20020051468A (en) * | 2000-12-22 | 2002-06-29 | 밍 루 | Structure for a radiant heat of power device module |
| JP2015153845A (en) * | 2014-02-13 | 2015-08-24 | 株式会社豊田中央研究所 | Semiconductor module and manufacturing method of the same |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5236980A (en) * | 1975-09-19 | 1977-03-22 | Hitachi Ltd | Heat sink for semiconductor devices |
-
1984
- 1984-02-09 JP JP2074484A patent/JPS60165745A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5236980A (en) * | 1975-09-19 | 1977-03-22 | Hitachi Ltd | Heat sink for semiconductor devices |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5488254A (en) * | 1991-08-05 | 1996-01-30 | Hitachi, Ltd. | Plastic-molded-type semiconductor device |
| KR20020051468A (en) * | 2000-12-22 | 2002-06-29 | 밍 루 | Structure for a radiant heat of power device module |
| JP2015153845A (en) * | 2014-02-13 | 2015-08-24 | 株式会社豊田中央研究所 | Semiconductor module and manufacturing method of the same |
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