JPS60165104A - Piezoelectric oscillator - Google Patents
Piezoelectric oscillatorInfo
- Publication number
- JPS60165104A JPS60165104A JP2027384A JP2027384A JPS60165104A JP S60165104 A JPS60165104 A JP S60165104A JP 2027384 A JP2027384 A JP 2027384A JP 2027384 A JP2027384 A JP 2027384A JP S60165104 A JPS60165104 A JP S60165104A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- level voltage
- oscillating
- output
- oscillator
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000010355 oscillation Effects 0.000 abstract description 17
- 238000010586 diagram Methods 0.000 description 8
- 239000013078 crystal Substances 0.000 description 3
- 230000001360 synchronised effect Effects 0.000 description 3
- 238000009412 basement excavation Methods 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 2
- 238000001514 detection method Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 235000017166 Bambusa arundinacea Nutrition 0.000 description 1
- 235000017491 Bambusa tulda Nutrition 0.000 description 1
- 241001330002 Bambuseae Species 0.000 description 1
- 235000015334 Phyllostachys viridis Nutrition 0.000 description 1
- 239000011425 bamboo Substances 0.000 description 1
- 238000009933 burial Methods 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000010304 firing Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000000704 physical effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
- H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
- H03B5/30—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element being electromechanical resonator
- H03B5/32—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element being electromechanical resonator being a piezoelectric resonator
Landscapes
- Oscillators With Electromechanical Resonators (AREA)
Abstract
Description
【発明の詳細な説明】
・ （発明の属する技術分野）
本発明は圧電振動子および反転回路（以下インバータ回
路と称す）を含む圧電発振器に関する。Detailed Description of the Invention - (Technical Field to Which the Invention Pertains) The present invention relates to a piezoelectric oscillator including a piezoelectric vibrator and an inversion circuit (hereinafter referred to as an inverter circuit).
（従来技術）
従来５通信装置においては、現用クロック源および予備
用クロック源等の複数のクロック源が用いら肛てお９、
こｎらのクロック源として圧′ｆｔ発振器を使用してい
る。(Prior Art) In conventional communication devices, multiple clock sources such as a working clock source and a standby clock source are used.
A pressure ft oscillator is used as a clock source for these.
籐１図は従来の発振器を示す回路図でめシ、入力端子１
２１〜１２３と、抵抗器１１７〜１１９と、コンデンサ
１０９〜１１２と、トランジスタ１１３と、水晶発つ辰
子１１４〜１１６と、ダイオード１１７〜１１９と、出
力端子１２４と、アース端子１２５と、゛１源供給端子
１２６とからなる。このような従来の発振器には、（１
））ランジスタ１１３の特性が全ての水晶発振子１１４
〜１１６に通さなければならず、発振子１１４〜１１６
に対する規格（ｗＪ作インピーダンス）が厳しくなる、
（２）水晶発振子１１４〜１１６間の相互干渉の起こる
可能性が高い。Figure 1 is a circuit diagram showing a conventional oscillator.Input terminal 1
21 to 123, resistors 117 to 119, capacitors 109 to 112, transistor 113, crystal terminals 114 to 116, diodes 117 to 119, output terminal 124, ground terminal 125, and ``1 source supply. It consists of a terminal 126. Such a conventional oscillator has (1
)) The crystal oscillator 114 has all the characteristics of the transistor 113.
~116, and the oscillators 114~116
The standards for (wJ production impedance) become stricter,
(2) There is a high possibility that mutual interference will occur between the crystal oscillators 114 to 116.
等の欠点がある。There are drawbacks such as.
（発明の目的）
本発明の目的は上述の欠点を除去した発振器を提供する
ことにｂる。OBJECTS OF THE INVENTION It is an object of the invention to provide an oscillator which eliminates the above-mentioned drawbacks.
（発明の構成）
不発明の発振器は、それぞｎ圧−発振子および第１の反
転回路を含む複数の発振手段と、該各発振手段の入力部
にそｎ（ｊｎ一端が接続され第２の反転回路と抵抗器と
の直列接続からなる複数の直列回路とから構成さ亀ｉ複
数の直列回路のうちの少なくとも１つの他端に“発振側
信号を与えるこ゛ とによシ対応する前記発振手段が動
作する。(Structure of the Invention) The uninvented oscillator includes a plurality of oscillation means each including an n-voltage oscillator and a first inverting circuit, and a second The oscillation circuit is composed of a plurality of series circuits each consisting of an inverter circuit and a resistor connected in series. The means work.
（実施例） 第２図は本発明の一実施例を示す回路図である。(Example) FIG. 2 is a circuit diagram showing one embodiment of the present invention.
図において、本実施例は、延電発振子１３．２３２よび
Ｓ３Ｉ 発掘用インバータ、回路１６．．２６および３
６．バイアス用抵抗器１１．２１および３１゜駆動レベ
ル調整用抵抗器１２．２２および３２ならびに位相反転
用抵抗器１４．１５．２４．２５．３４２よび３５をそ
１ぞれ有し発振周波数をそｎぞれ異にする発振回路１０
，２．０および３０と、各インバータ回路１６，２６＞
よび３６の入力端にそれぞれ一端が接続された抵抗器５
１〜５３と、抵抗器５１〜５３の他端に出力端がそれぞ
れ接続さｎｆｃインバータ回路４１〜４３と、インバー
タ回路４１〜４３の入力端にそれぞｎ接続され１こ端子
８１〜８３と５発振回路１０，２０２よび３ｏの出力が
与えらｉｔ、る論理和（ＯＲ）回路６ｏと、回路６０の
出力が′与えらｎる端子７ｏとがら構成さ几る。In the figure, the present embodiment includes a power propagation oscillator 13.232, an S3I excavation inverter, and a circuit 16. ．． 26 and 3
6. Bias resistors 11.21 and 31°, drive level adjustment resistors 12.22 and 32, and phase inversion resistors 14.15.24.25.342 and 35, respectively, are provided to control the oscillation frequency. Different oscillation circuits 10
, 2.0 and 30, and each inverter circuit 16, 26>
and 36, one end of which is connected to the input terminals of the resistors 5 and 36, respectively.
Terminals 81-83 and 5 are connected to NFC inverter circuits 41-43 and input terminals of the inverter circuits 41-43, respectively. It consists of an OR circuit 6o to which the outputs of the oscillation circuits 10, 202 and 3o are applied, and a terminal 7o to which the output of the circuit 60 is applied.
次に不興流側の動作について説明する。今、端子８１に
高いレベル電圧（例えば＋５Ｖ）が印加されると２発振
回路は、圧電発振子９にょシ決定さｎる周波数で発振す
る。す°なわち、インバータ回路４１の出力は低レベル
”磁圧（例えばｏ■）になるため、第１図の発振器と等
価な構成になる。したがって、発振回路１０は圧電発振
子１３により決定さｎる周波数で発振する。このとき、
端子８２および８３には低レベル電圧（例えばＯＶ ）
を印加しておくと５インバ一タ回路４２および４３の出
力電圧は高レベル電圧となり、発振回路２ｏお工び３０
は発振しない。したがって＝ 、ＯｋＬ １ｊｊｌ路６
゜の出力には、発振回路ｌＯの出力だけが得ら几る。Next, the operation on the Fukoryu side will be explained. Now, when a high level voltage (for example, +5V) is applied to the terminal 81, the two oscillation circuits oscillate at a frequency determined by the piezoelectric oscillator 9. In other words, the output of the inverter circuit 41 is a low-level "magnetic pressure" (for example, o), so the configuration is equivalent to that of the oscillator shown in FIG. oscillates at a frequency of n.At this time,
Terminals 82 and 83 have a low level voltage (e.g. OV).
is applied, the output voltages of the 5 inverter circuits 42 and 43 become high level voltages, and the oscillation circuits 2o and 30
does not oscillate. Therefore = , OkL 1jjl path 6
Only the output of the oscillation circuit 10 is obtained as the output of .
同様に、端子８２に高レベル電圧、端子８１および８３
に低レベル製甲をそｎぞｔ″Ｌｌ：Ｉ］加した場合には
、発振回路２０の出力が、また、端子８３に高レベル醒
圧、端子８１および８２に低レベル電圧をそｎ−ｔＪｎ
印）ＪＩＪ した場合には５発振回路３０の出力がＯＲ
回路６０から得ら几る。この↓うに、端子８１〜８３に
低レベル電圧あるいは高レベル電圧を適当に印加するこ
とにより、所望の発掻周波数？有する発振回路を選択で
きる。Similarly, a high level voltage is applied to terminal 82, terminals 81 and 83
When a low-level voltage is applied to the terminal 83 and a low-level voltage is applied to the terminals 81 and 82, the output of the oscillation circuit 20 becomes tJn
mark) JIJ, the output of the 5 oscillation circuit 30 is OR
It is obtained from circuit 60. By appropriately applying a low level voltage or a high level voltage to terminals 81 to 83, the desired firing frequency can be set. You can select the oscillation circuit that has.
第３図は本実施例を用いた温度補償型圧電発振器を示す
ブロック図である。この発振器は、温度検出部９１と、
レベ／Ｌ／俊換部９２と、不発明の発振器９３と、位相
同期発振器９４とから構成さｎ１温度検出部９１では周
囲温度に比例し７（電気信号を出力し、この信号はレベ
ル変換部９２で次段の発振器９３内のインバータ回路、
４１．４２ｉたは４３を駆動できるレベルに変換される
。す、なわち、める周囲温度で１発振ｓ９３の中で発掘
させる周波数を遠足する。この発振部９３と位相同期発
振器９４とでフェー少ロックループを構成する。すなわ
ち、周囲温駄変動によりて発振部９３内の発振回路が切
替わるときに、出力に不連続を生じないように構成する
。第４図にこの温度補償圧醒発会器の物性例を示す。こ
こで、Ａ−Ｃ各発掘回路１０．２０．３０の周波畝置度
竹性ｔ７ｒ、す。破線で示す特性が温度補償さルた出力
ｌｆ：ｆ性である。FIG. 3 is a block diagram showing a temperature compensated piezoelectric oscillator using this embodiment. This oscillator includes a temperature detection section 91,
It is composed of a level/L/quick converter 92, an uninvented oscillator 93, and a phase synchronized oscillator 94.The n1 temperature detector 91 outputs an electric signal proportional to the ambient temperature, and this signal 92, an inverter circuit in the next stage oscillator 93;
It is converted to a level that can drive 41, 42i or 43. That is, the frequency to be excavated in one oscillation s93 at the ambient temperature is excursed. The oscillation section 93 and the phase synchronized oscillator 94 constitute a low-fail lock loop. That is, the configuration is such that when the oscillation circuit in the oscillation section 93 is switched due to ambient temperature fluctuations, no discontinuity occurs in the output. FIG. 4 shows an example of the physical properties of this temperature-compensated pressure generator. Here, the frequency ridge placement degree of each excavation circuit A-C 10.20.30 is bamboo t7r. The characteristic shown by the broken line is the temperature compensated output lf:f characteristic.
（発明の効果）
以上、本発明には、圧電発振子の規格の緩和および圧！
発掘子間の相互干渉の除去を達成できるという効果があ
る。(Effects of the Invention) As described above, the present invention includes relaxation of the standards for piezoelectric oscillators and pressure reduction!
This has the effect of eliminating mutual interference between excavators.
第１図は従来の発掘器を示す回路図、第２図は本発明の
一笑流側をボ丁回路図、第３図は本実施例の応用例を示
すブロック図および第４図は第３図の回路の特性例を示
す図である。
図に２いて、１１．１２，２１．２２，３１゜３２．５
１〜５３・・・・・・抵抗器、 １３． ２３． ３３
゜・・・・・・圧電発振子、１４，１５．２４．２５，
３４゜３５・・・・・・コンデンサ、ｌ ６．２６．３
．６．４１〜４３・・・・・・インバータ、７０，８ｔ
〜８３・・・・・・端子。
９１・・・・・・６度検出部、９２・・・・・・レベル
変換部、９３・・・・・・発振器、９４・・・・・・位
相同期発振器。
１（埋Δ 升堆士 円 涼 １、・、
第 １ 面
裕ｉ剖Fig. 1 is a circuit diagram showing a conventional excavator, Fig. 2 is a circuit diagram showing a simple side of the present invention, Fig. 3 is a block diagram showing an application example of the present embodiment, and Fig. 4 is a circuit diagram showing the third embodiment. FIG. 3 is a diagram showing an example of the characteristics of the circuit shown in the figure. 2 in the figure, 11.12, 21.22, 31°32.5
1-53...Resistor, 13. 23. 33
゜・・・Piezoelectric oscillator, 14, 15.24.25,
34゜35... Capacitor, l 6.26.3
．． 6.41~43...Inverter, 70.8t
~83...Terminal. 91... 6 degree detection section, 92... Level conversion section, 93... Oscillator, 94... Phase synchronized oscillator. 1 (burial Δ Masujishi En Ryo 1,...
Claims (1)
の発振手段と、該各発振手段の入力部にそれぞれ一端が
接続され第２の反転回路と抵抗器との直列接続からなる
複数の直列回路とから構成さ記発振手段を動作させるこ
とを特徴とする圧電発掘器。A plurality of oscillating means including a piezoelectric oscillator and a first inverting circuit, and a plurality of oscillating means each having one end connected to the input section of each oscillating means, and a second inverting circuit and a resistor connected in series. A piezoelectric excavator comprising a series circuit and an oscillating means.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2027384A JPS60165104A (en) | 1984-02-07 | 1984-02-07 | Piezoelectric oscillator |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2027384A JPS60165104A (en) | 1984-02-07 | 1984-02-07 | Piezoelectric oscillator |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS60165104A true JPS60165104A (en) | 1985-08-28 |
Family
ID=12022570
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2027384A Pending JPS60165104A (en) | 1984-02-07 | 1984-02-07 | Piezoelectric oscillator |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60165104A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01228305A (en) * | 1988-03-09 | 1989-09-12 | Fujitsu Ltd | Multifrequency switching oscillation circuit |
-
1984
- 1984-02-07 JP JP2027384A patent/JPS60165104A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01228305A (en) * | 1988-03-09 | 1989-09-12 | Fujitsu Ltd | Multifrequency switching oscillation circuit |
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