JPS60160178A - Field effect transistor and manufacture thereof - Google Patents

Abstract

PURPOSE:To achieve the improvement in Schottky barrier effect and that in thermal and electrical stability simultaneously by performing ion implantation of the elements which will become impurities doped in Al after vapor deposition of Al which will become Schottky barrier gate electrodes. CONSTITUTION:A GaAs semiconductor layer 2 is grown on a semiinsulating substrate 1 and a source electrode 3 and a drain electrode 4 are formed selectively. The resist layer 5 the desired part of which is exposed is formed on a surface of the layer 2. An Al layer 6 as a Schottky barrier gate electrode is formed by vapor deposition. Oxygen which will become the doped impurity in the layer 6 is ion-implanted, after which the unnecessary Al layer is removed by liftoff technique. Then the improvement in Schottky barrier effect can be contrived by accelerating the speed of vapor deposition when fabricating the Al gate electrode 6. Also, the requirements for improvements in performance and reliability can be satisfied simultaneously by increasing the doped impurities in the vicinity of the electrode 6.

Description

[Detailed Description of the Invention] [Technical Field] The present invention relates to a field effect transistor having an M Schottky barrier gate electrode structure and a method for manufacturing the same, in which M is continuously deposited and then an element that becomes an impurity contained in M is ion-implanted. By doing so, the aim is to simultaneously satisfy the demands for both high performance and high reliability.

Hereinafter, a GaAs field effect transistor (GaAs MES FET) having an M Schottky barrier gate structure using gallium arsenide (GaAs) as a semiconductor substrate will be described as an example.

[Background technology]

It is well known that the role played by the M Schottky barrier electrode is an important factor in improving the performance and reliability of GaAs MBS FETs. Performance factors such as the resistivity of the M film due to the barrier hide (height of the barrier) and pattern miniaturization for GaAs, and reliability are discussed in terms of thermal and electrical deterioration rates. It is broadly divided into factors. Now, from the viewpoint of high performance, it is essential to reduce the amount of impurities contained in the M film, and in the case of an active metal such as M, oxygen (02) of the beam-deposited particles under the same vacuum condition. In order to reduce the probability of reaction (adsorption and occlusion) with the metal, it is desirable to increase the deposition rate within a range that does not impede workability.

On the other hand, when considering high reliability, the presence of trace amounts of oxygen
It has been experimentally and empirically found that this function suppresses recrystallization, re-evaporation, and migration of evaporation, and obtains a thermally and electrically stable film quality. good.

Thus, both of these factors affect the impurities contained in the M film (
Special KOs amount). From this point of view □, conventionally, this type of glue Schottky barrier electrode structure
Depending on the purpose of use, sacrifices are often made to one of the two factors.The method of satisfying both factors almost simultaneously or forming a Schottky barrier gate electrode is to continuously or continuously change the deposition rate at a negative rate of change. In other words, in forming an M Schottky barrier gate electrode on a semiconductor substrate, a method of changing the amount of impurities in stages has been proposed. Improve performance by forming a U film with less impurities, and gradually reduce the amount of impurities in the U film by changing the deposition rate continuously or stepwise at a negative rate of change until a predetermined film thickness is reached. The aim is to simultaneously improve the reliability factor by increasing the reliability factor. However, it has been difficult to form an M Schottky barrier gate electrode with good reproducibility and controllability due to changes in conditions such as the method of controlling the M vapor deposition rate, the amount of residual oxygen in the vapor deposition furnace, and the amount of charge on the substrate.

[Disclosure of the invention]

This invention was made in order to eliminate the above-mentioned drawbacks, and it is possible to form a Lyschottky barrier gate electrode on a semiconductor substrate by forming a . A field effect transistor with an M Schottky barrier electrode that can improve performance and improve reliability by implanting elements that become impurities after vapor deposition near the surface of the film through well-controlled ion implantation. and its manufacturing method.

Hereinafter, the present invention will be explained in detail using Examples.

Figures 1(a) to (e) show GaAs, MES FE
FIG. 3 is a cross-sectional view showing the main steps of an embodiment of the method for manufacturing T according to the present invention.

First, as shown in FIG. 1(a), a semi-insulating substrate l
A GaAs semiconductor layer 2 is formed thereon as an active layer by a well-known vapor phase epitaxial growth method, and a source electrode 3 and a drain electrode 4 made of, for example, AuGe-Ni-Au are selectively formed on the surface of the GaAs semiconductor layer 2 to remove unnecessary GaAs semiconductor. The same figure (a) is obtained by selectively removing layer 2 (omitted in the figure).
Prepare the sample shown in . After this, as shown in the cylinder 1w1(b), a desired portion of the surface of the GaAs semiconductor layer 2 between the source electrode 8 and the drain electrode 4 is exposed, and a resist layer 5 is formed to cover the rest. Thereafter, as shown in FIG. 1(C), an M layer 6 as a gate electrode is formed by a well-known vapor deposition method. As described above, the vapor deposition rate is set to a value as high as possible within a range that does not impede the workability of the process. This value should be such that the resistivity of the 2u film does not cause deterioration of the FET characteristics.
/sec is considered. After this, as shown in FIG. 1(d), A! Oxygen, which becomes an impurity contained in the simulated film, is ion-implanted. The desired part of the wafer surface is A! Oxygen ions are not implanted into the GaAs semiconductor layer 2 because the rest of the layer 6 is covered with a layer 6 formed on the resist layer 5 . In addition, the energy of ion implantation is such that oxygen as a contained impurity exists near the surface of the M layer, and
A low value that does not deteriorate the layer, and a high injection amount! It is determined in consideration of the average resistivity of I, and must not be so large as to significantly increase the average resistivity and tend to deteriorate the FET characteristics. After that, by removing the unnecessary M layer using a well-known lift-off technique, the F layer with the source 3, drain 4, and gate 6 electrodes as shown in FIG. 1(e) is created.
Obtain the ET structure.

AJI like this? When forming the gate electrode 6, the semiconductor 7,
Immediately above layer 2, by increasing the deposition rate, the amount of impurities (particularly adsorption and occlusion of 02) in the formed four-layer film is reduced, and the Schottky barrier effect can be improved. In addition, by implanting oxygen ions, it is possible to increase the amount of impurities contained in the A1 film near the surface, thereby satisfying both requirements for performance improvement and reliability improvement at the same time.

In the above embodiment, the case of a GaAs MES FET was explained, but it goes without saying that the present invention can also be applied to FETs made of semiconductor layers corresponding to other semiconductor substrates.

Further, in the above embodiment, a case of a flat gate structure is shown, but there is no problem in using a recessed gate structure.

Further, in the above embodiment, a mesa structure is shown in which the semiconductor layer 2, which is an active layer, is formed over the entire surface and then removed except for a desired portion.
There is no problem in forming the other parts of the brainer structure by a method such as ion implantation.

[Industrial applicability]

As explained above, according to the present invention, when forming a Schottky barrier gate electrode by vapor deposition on a semiconductor substrate, the vapor deposition rate is increased to reduce the amount of impurities contained in the film, and then the AJ By ion-implanting oxygen as a contained impurity near the surface of the film, it is possible to simultaneously achieve higher performance (improved Schottky barrier effect) and higher reliability (improved thermal and electrical stability). .

[Brief explanation of drawings]

1(a), (b), (C), (d) and (e) are main process diagrams showing one embodiment of the present invention. In the figure, ■ is a semi-insulating GaAs substrate, 2 is a GaAs semiconductor layer, 3 is a source electrode, 4 is a drain electrode, 5 is a resist layer, 6 is a gate electrode, and 7 is oxygen to be implanted. In addition, the same symbols in the figures are the same or corresponding parts are older.

Claims (1)

[Claims] (1) After successively depositing gate metal between the source and drain electrodes formed on the semiconductor substrate from just above the semiconductor substrate to a predetermined film thickness, the elements that become impurities contained in the metal are Field effect transistor characterized by having an Al Schottky barrier gate electrode formed by ion implantation (2) Step of forming a source electrode and a drain electrode on a semiconductor substrate and a surface of the semiconductor substrate between the source electrode and the drain electrode A step of forming a resist layer that exposes a desired portion and covers the rest, and forming an A4 layer by continuously depositing the resist layer over the entire surface of the semiconductor substrate to a predetermined thickness. A step of ion-implanting an element to be a contained impurity into this At layer, and an Al Schottky barrier gate electrode formed directly on the semiconductor substrate except for the Al Schottky barrier gate electrode.
A method for manufacturing a field effect transistor, comprising the steps of removing the resist layer and the resist layer.