JPS60160122A - サーマルプリントヘッドの製造方法 - Google Patents

サーマルプリントヘッドの製造方法

Info

Publication number
JPS60160122A
JPS60160122A JP59018056A JP1805684A JPS60160122A JP S60160122 A JPS60160122 A JP S60160122A JP 59018056 A JP59018056 A JP 59018056A JP 1805684 A JP1805684 A JP 1805684A JP S60160122 A JPS60160122 A JP S60160122A
Authority
JP
Japan
Prior art keywords
mask
key
width
alignment
sides
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59018056A
Other languages
English (en)
Japanese (ja)
Other versions
JPH023534B2 (enExample
Inventor
Shunji Nakada
俊次 中田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Priority to JP59018056A priority Critical patent/JPS60160122A/ja
Publication of JPS60160122A publication Critical patent/JPS60160122A/ja
Publication of JPH023534B2 publication Critical patent/JPH023534B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Electronic Switches (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
JP59018056A 1984-01-30 1984-01-30 サーマルプリントヘッドの製造方法 Granted JPS60160122A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59018056A JPS60160122A (ja) 1984-01-30 1984-01-30 サーマルプリントヘッドの製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59018056A JPS60160122A (ja) 1984-01-30 1984-01-30 サーマルプリントヘッドの製造方法

Publications (2)

Publication Number Publication Date
JPS60160122A true JPS60160122A (ja) 1985-08-21
JPH023534B2 JPH023534B2 (enExample) 1990-01-24

Family

ID=11961036

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59018056A Granted JPS60160122A (ja) 1984-01-30 1984-01-30 サーマルプリントヘッドの製造方法

Country Status (1)

Country Link
JP (1) JPS60160122A (enExample)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52144973A (en) * 1976-05-28 1977-12-02 Hitachi Ltd Positioning method of semiconductor wafers
JPS59208722A (ja) * 1983-05-13 1984-11-27 Oki Electric Ind Co Ltd 半導体集積回路装置用合せマ−ク
JPS6077421A (ja) * 1983-10-05 1985-05-02 Fujitsu Ltd 位置合わせ方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52144973A (en) * 1976-05-28 1977-12-02 Hitachi Ltd Positioning method of semiconductor wafers
JPS59208722A (ja) * 1983-05-13 1984-11-27 Oki Electric Ind Co Ltd 半導体集積回路装置用合せマ−ク
JPS6077421A (ja) * 1983-10-05 1985-05-02 Fujitsu Ltd 位置合わせ方法

Also Published As

Publication number Publication date
JPH023534B2 (enExample) 1990-01-24

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Legal Events

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LAPS Cancellation because of no payment of annual fees