JPS6016005A - Processing circuit for pulse width modulating wave - Google Patents

Processing circuit for pulse width modulating wave

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Publication number
JPS6016005A
JPS6016005A JP58123753A JP12375383A JPS6016005A JP S6016005 A JPS6016005 A JP S6016005A JP 58123753 A JP58123753 A JP 58123753A JP 12375383 A JP12375383 A JP 12375383A JP S6016005 A JPS6016005 A JP S6016005A
Authority
JP
Japan
Prior art keywords
terminal
pulse width
modulated wave
power
wave
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58123753A
Other languages
Japanese (ja)
Inventor
Takehiko Hoshino
星野 武彦
Tomoyuki Oogake
大懸 朋雪
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Signal Co Ltd
Original Assignee
Nippon Signal Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Signal Co Ltd filed Critical Nippon Signal Co Ltd
Priority to JP58123753A priority Critical patent/JPS6016005A/en
Publication of JPS6016005A publication Critical patent/JPS6016005A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To improve remarkably a power consumption efficiency by providing a resonance circuit whose impedance is lowered to a modulating wave and increased to a carrier to a switching section of a power switching amplifier. CONSTITUTION:When a voltage of an input signal to a terminal 15 is positive, FETs 2, 3 are turned on and a current flows from a positive terminal 9 to a negative terminal 10 via the FET2, an output transformer 8, a series resonance circuit 5 and the FET3. When the voltage of the input signal is negative, FETs 1, 4 are turned on and a current flows from the positive terminal 9 to the negative terminal 10 via the FET1, the series resonance circuit 5, the output transformer 8 and the FET4. Thus, the current flowing to the output transformer 8 is reversed depending whether the voltage of the input signal is positive and negative, the impedance of the series resonance circuit 5 is lowered to the modulating wave and increased to the carrier, then the modulating wave whose power is amplified is obtained at an output terminal 16.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、自動列車制御装置や、自動列車停止装置等に
用いるパルス幅変調波の処理回路に関し、特に入力信号
であるパルス幅変調波中の変調波成分を主として電力増
幅して出力するパルス幅変調波の処理回路に関する。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a pulse width modulated wave processing circuit used in automatic train control devices, automatic train stopping devices, etc. The present invention relates to a pulse width modulated wave processing circuit that mainly amplifies the power of a wave component and outputs it.

従来技術 パルス幅変調波用のパワーアンプとしては、一般に、B
級−のプッシュプル回路が用いられている。
Conventional technology As a power amplifier for pulse width modulated waves, B
A class-grade push-pull circuit is used.

しかし、プッシュプル回路は、一般に、パルス幅変調波
中の成分のうち、変調波成分と搬送波成分の両者を電力
増幅するから、前記変調波成分のみが必要な場合には消
費電力効率が悪く、またパワーアンプの次段に帯域フィ
ルタや復調器等を設けて前記変調波を復調しなければな
らない。
However, push-pull circuits generally power amplify both the modulated wave component and the carrier wave component among the components in the pulse width modulated wave, so if only the modulated wave component is required, the power consumption efficiency is poor; Further, a bandpass filter, a demodulator, etc. must be provided at the next stage of the power amplifier to demodulate the modulated wave.

発明の目的 本発明は、パルス幅変調波中の成分のうち変調波の電力
増幅と復調とを行なうパルス幅変調波用処理回路を提供
することを目的とする。
OBJECTS OF THE INVENTION An object of the present invention is to provide a pulse width modulated wave processing circuit that performs power amplification and demodulation of a modulated wave among the components in the pulse width modulated wave.

発明の構成 上記目的は本発明によれば、トランジスタ等のスイッチ
ング素子を複数用いてパワースイッチングアンプを構成
し、そのスイッチング部にインピーダンスが変調波に対
しては低下し、搬送波に対しては増大する共振回路を挿
入して、変調波成分に対してのみ電力増幅を行ない、搬
送波成分に対しては電力増幅を抑制することにより達成
される。
Structure of the Invention According to the present invention, a power switching amplifier is configured using a plurality of switching elements such as transistors, and the impedance of the switching part decreases for a modulated wave and increases for a carrier wave. This is achieved by inserting a resonant circuit to perform power amplification only on the modulated wave component and suppress power amplification on the carrier wave component.

実施例 以下、図面に示す実施例に基いて本発明を説明する。Example The present invention will be explained below based on embodiments shown in the drawings.

第1図は4個の電界効果形トランジスタ(1,2=’、
3.4)を用いてパワースイッチングアンプを形成した
場合の実施例を示す。
Figure 1 shows four field effect transistors (1, 2=',
An example will be shown in which a power switching amplifier is formed using 3.4).

電界効果形トランジスタ(1)はJタイプの電界効果形
トランジスタであり、電界効果形トランジスタ(3,4
)はにタイプの電界効果形トランジスタである。電界効
果形トランジスタ(1)と(3)のドレイン電極及び電
界効果形トランジスタ(2)と(4)のドレイン電極は
、互いに短絡されており、電界効果形トランジスタ(1
)と(3)の接続部の中点と、電界効果形トランジスタ
(2)と(4)の接続部の中点とはコイル(6)とコン
デンサ(7)とからなる直列共振回路(5)及び出カド
ランス(8)の1次コイルを介して接続されている。
The field effect transistor (1) is a J type field effect transistor, and the field effect transistor (3, 4
) is a type of field effect transistor. The drain electrodes of the field effect transistors (1) and (3) and the drain electrodes of the field effect transistors (2) and (4) are short-circuited to each other, and the drain electrodes of the field effect transistors (1) and (4) are short-circuited to each other.
) and (3) and the middle point of the connection between field effect transistors (2) and (4) are the series resonant circuit (5) consisting of a coil (6) and a capacitor (7). and is connected via the primary coil of the output transformer (8).

また、Jタイプの電界効果形トランジスタ(1,2)の
各ソース電極は直流電源の正側端子(9)に接続され、
Kタイプの電界効果形トランジスタ(3,4)の各ソー
ス電極は前記直流電源の負側(アース側)端子り10)
に接続されている。
Further, each source electrode of the J type field effect transistor (1, 2) is connected to the positive terminal (9) of the DC power supply,
Each source electrode of the K-type field effect transistor (3, 4) is connected to the negative side (ground side) terminal of the DC power supply 10).
It is connected to the.

さらに、電界効果形トランジスタ(1,3)のゲート電
極はドライブ用のバッファーアンプ(11゜13)を介
して入力端子(15)に接続され、電界効果形トランジ
スタ(2,4)のゲート電極はインバータを兼ねたドラ
イブ用のバッファーアンプ(12,14)を介して前記
入力端子(15)に接続されている。
Further, the gate electrodes of the field effect transistors (1, 3) are connected to the input terminal (15) via a drive buffer amplifier (11°13), and the gate electrodes of the field effect transistors (2, 4) are It is connected to the input terminal (15) via a drive buffer amplifier (12, 14) which also serves as an inverter.

入力端子(15)に入力する信号は、所定の周波数の変
調波により、所定の周波数の搬送波のパルス幅を変調し
た第2図に示すようなパルス幅変調波である。
The signal input to the input terminal (15) is a pulse width modulated wave as shown in FIG. 2 in which the pulse width of a carrier wave of a predetermined frequency is modulated by a modulated wave of a predetermined frequency.

共振回路(5)は、インピーダンスが、前記パルス幅変
調波の成分中、変調波に対しては低下し、スプリアス、
特に変調波の高調波及び搬送波に対しては増大する値に
選ばれている。
The resonant circuit (5) has an impedance that decreases with respect to the modulated wave among the components of the pulse width modulated wave, and suppresses spurious and
In particular, increasing values are chosen for the harmonics of the modulated wave and the carrier wave.

出カドランス(8)の2次コイルは、出力端子(16,
16)に接続されている。
The secondary coil of the output transformer (8) is connected to the output terminal (16,
16).

この処理回路において、端子(15)への入力信号の電
圧が正であるときは電界効果形トランジスタ(2)と(
3)がオンして正側端子(9)から、3− 電界効果形トランジスタ(2)、出カドランス(8)、
直列共振回路(5)及び電界効果形トランジスタ(3)
を介して負側端子(10)に電流が流れる。また前記入
力信号の電圧が負であると、電界効果形トランジスタ(
1)と(4)がオンして正側端子(9)から、電界効果
形トランジスタ(1)、直列共振回路(5)、出カドラ
ンス(8)及び電界効果形トランジスタ(4)を介して
負側端子(10)に電流が流れる。従って、出カドラン
ス(8)に流れる電流は前記入力信号の電圧が正のとき
と負のときとで逆向きになる。
In this processing circuit, when the voltage of the input signal to the terminal (15) is positive, the field effect transistor (2) and (
3) is turned on and from the positive terminal (9), 3- field effect transistor (2), output transformer (8),
Series resonant circuit (5) and field effect transistor (3)
A current flows through the negative terminal (10). Further, if the voltage of the input signal is negative, the field effect transistor (
1) and (4) are turned on, and the negative voltage is transmitted from the positive terminal (9) through the field effect transistor (1), the series resonant circuit (5), the output transformer (8), and the field effect transistor (4). Current flows through the side terminal (10). Therefore, the current flowing through the output transformer (8) is in opposite directions when the voltage of the input signal is positive and when it is negative.

この処理回路は、出カドランス(8)の1次コイルに流
れる電流が入力信号の電圧極性に応じて逆になり、かつ
直列共振回路(5)のインピーダンスが変調波に対して
は低下し、搬送波に対しては増大するから、出力端子(
16,16)に電力増幅された変調波を得ることができ
る。
In this processing circuit, the current flowing through the primary coil of the output transformer (8) is reversed depending on the voltage polarity of the input signal, and the impedance of the series resonant circuit (5) is lowered for the modulated wave, and the carrier Since it increases for , the output terminal (
16, 16), a modulated wave whose power is amplified can be obtained.

第3図はパルス幅変調波として、19.5KH2の正弦
波により235KHzの搬送波を撮幅変調した信号を用
い、かつ、処理回路における直列4− 共振回路(5)のインピーダンスを周波数が19゜5K
Hzの成分に対してだけ低くなるようにしたときに出力
端子(16,16)に得られた出力波形とその周波数成
分を示し、第4図は直列共振回路(5)を短絡したとき
に出力端子(16,16)に得られた出力波形とその周
波数成分を示す。
Figure 3 uses a signal obtained by width-modulating a 235 KHz carrier wave with a 19.5 KH2 sine wave as a pulse width modulated wave, and also sets the impedance of the series 4-resonant circuit (5) in the processing circuit to a frequency of 19°5K.
The output waveform obtained at the output terminals (16, 16) and its frequency components are shown when the frequency component is set to be low only for the Hz component. Figure 4 shows the output waveform obtained when the series resonant circuit (5) is short-circuited. The output waveform obtained at the terminals (16, 16) and its frequency components are shown.

第3図及び第4図において、第3図(A)と第4図(A
)は出力波形を示し、第3図(B)と第4図(B)は周
波数成分を示す。また、(2o)は19.5K)(Zの
変調波を示し、(21)は235KHzの搬送波を示す
In Figures 3 and 4, Figure 3 (A) and Figure 4 (A)
) shows the output waveform, and FIGS. 3(B) and 4(B) show the frequency components. Further, (2o) indicates a modulated wave of 19.5 KHz (Z), and (21) indicates a carrier wave of 235 KHz.

第3図及び第4図から明らかなように、直列共振回路(
5)が挿入されていると、変調波はきれいな正弦波に復
調され、しがもパルス幅変調波中の19.5KH2(7
)成分、すなわち変調波(2o)は主として電力増幅さ
れるのに対し、スプリアス成分特に235K)−12の
搬送波は殆んど電力増幅されず、従って直列共振回路(
5)が挿入されていると消費゛電力効率が著しく高くな
る。これに対し、直列共振回路(5)を短絡すると、同
じパルス幅変調波を用いているにもかかわらず、出力波
形は変調波が復調されず、またパルス幅変調波中の変調
波(20)とスプリアス成分はともに電力増幅される消
費電力効率が著しく悪い。
As is clear from Figures 3 and 4, the series resonant circuit (
5), the modulated wave is demodulated into a clean sine wave, and the 19.5KH2 (7
) component, that is, the modulated wave (2o), is mainly power amplified, whereas the spurious component, especially the carrier wave of 235K)-12, is hardly power amplified, and therefore the series resonant circuit (
5), the power consumption efficiency will be significantly increased. On the other hand, if the series resonant circuit (5) is short-circuited, the output waveform will not demodulate the modulated wave even though the same pulse width modulated wave is used, and the modulated wave (20) in the pulse width modulated wave will not be demodulated. The power consumption efficiency of both the power amplification and spurious components is extremely poor.

第5図は、パルス幅変調波として、19.5KHZの正
弦波を721−1zの台形波で振幅変調した信号を変調
波とし、この変調波で235KHzの搬送波をパルス幅
変調した信号を用い、かつ、直列共振回路(5)を挿入
したとぎに出力端子(16,16)に得られた出力波形
と周波数成分を示す。
In FIG. 5, a signal obtained by amplitude modulating a 19.5 KHz sine wave with a 721-1 z trapezoidal wave is used as a pulse width modulated wave, and a signal obtained by pulse width modulating a 235 KHz carrier wave with this modulated wave is used. In addition, the output waveform and frequency components obtained at the output terminals (16, 16) after inserting the series resonant circuit (5) are shown.

第5図において、第5図(A)は出力波形を示し、第5
図(B)は周波数成分を示す。また(20)は19.5
KHzの変調波を示し、(21)ハ235KH2の搬送
波を示す。
In Fig. 5, Fig. 5(A) shows the output waveform;
Figure (B) shows frequency components. Also, (20) is 19.5
It shows a modulated wave of KHz, and (21) shows a carrier wave of 235KH2.

第5図から明らかなように、正弦波を他の信号で振幅変
調した信号を変調波として用い、この変調波でさらにパ
ルス幅変調したパルス幅変調波の場合も、変調波はきれ
いに復調され、また変調波が主として電力増幅されて復
調されるのに対し、スプリアス成分は殆んど電力増幅さ
れず、消費電力効率が著しく高い。
As is clear from FIG. 5, even in the case of a pulse width modulated wave in which a signal obtained by amplitude modulating a sine wave with another signal is used as a modulating wave, and this modulated wave is further pulse width modulated, the modulated wave is demodulated cleanly. Furthermore, while the modulated wave is mainly power amplified and demodulated, spurious components are hardly power amplified, resulting in extremely high power consumption efficiency.

なお、共振回路は直列共振回路である必要はなく、たえ
ば並列共振回路等信の共振回路を用いることができる。
Note that the resonant circuit does not need to be a series resonant circuit; for example, a resonant circuit such as a parallel resonant circuit can be used.

また、本発明は、電界効果形トランジスタを用いたパワ
ースイッチングアンプのみならず、他の形のトランジス
タ等地のスイッチング素子を用いたパワースイッチング
アンプを用いることもできる。
Furthermore, the present invention can be applied not only to power switching amplifiers using field effect transistors, but also to power switching amplifiers using switching elements such as other types of transistors.

発明の効果 以上のように本発明は、スイッチング素子を複数用いて
構成されたパワースイッチングアンプのスイッチング部
に、インピーダンスが変調波に対しては低下し、搬送波
に対しては増大する共振回路を設けたから、パルス幅変
調波中の変調波は電力増幅されて復調され、しかも搬送
波は電力増幅を抑制され、従って消費電力効率が著しく
高くなる。
Effects of the Invention As described above, the present invention provides a resonant circuit in which the impedance decreases with respect to a modulated wave and increases with respect to a carrier wave, in the switching section of a power switching amplifier configured using a plurality of switching elements. Therefore, the modulated wave in the pulse width modulated wave is power amplified and demodulated, and the power amplification of the carrier wave is suppressed, so that the power consumption efficiency is significantly increased.

【図面の簡単な説明】[Brief explanation of drawings]

第1図−は本発明にかかるパルス幅変調波の処理回路の
一実施例を示す図、 7− 第2図はパルス幅変調波の一例を示す図、′第3図、第
4図及び第5図は電気信号の説明図である。 (1,2,3,4) :電界効果形トランジスタ、(5
):直列共振回路、(8):出カドランス、(9):正
側端子、(10) :負側端子、(15):入力端子、
(16) :出力端子。 特許出願人 日本信号株式会社 8− 第1図 0 第2図
Figure 1- is a diagram showing an embodiment of a pulse width modulated wave processing circuit according to the present invention; 7- Figure 2 is a diagram showing an example of a pulse width modulated wave; FIG. 5 is an explanatory diagram of electrical signals. (1, 2, 3, 4): Field effect transistor, (5
): Series resonant circuit, (8): Output transformer, (9): Positive side terminal, (10): Negative side terminal, (15): Input terminal,
(16): Output terminal. Patent applicant Nippon Signal Co., Ltd. 8- Figure 1 0 Figure 2

Claims (1)

【特許請求の範囲】[Claims] 1)スイッチング素子を複数用いてパワースイッチング
アンプを構成し、そのスイッチング部にインピーダンス
が変調波に対しては低下し、搬送波に対しては増大する
共振回路を設けてなるパルス幅変調波用処理回路。
1) A processing circuit for pulse width modulated waves, in which a power switching amplifier is configured using a plurality of switching elements, and a resonant circuit whose impedance decreases for modulated waves and increases for carrier waves is provided in the switching section. .
JP58123753A 1983-07-07 1983-07-07 Processing circuit for pulse width modulating wave Pending JPS6016005A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58123753A JPS6016005A (en) 1983-07-07 1983-07-07 Processing circuit for pulse width modulating wave

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58123753A JPS6016005A (en) 1983-07-07 1983-07-07 Processing circuit for pulse width modulating wave

Publications (1)

Publication Number Publication Date
JPS6016005A true JPS6016005A (en) 1985-01-26

Family

ID=14868452

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58123753A Pending JPS6016005A (en) 1983-07-07 1983-07-07 Processing circuit for pulse width modulating wave

Country Status (1)

Country Link
JP (1) JPS6016005A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63168836A (en) * 1986-12-31 1988-07-12 バスフ アクチェンゲゼルシャフト Manufacture of disc-shaped magnetic recording carrier

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4429766Y1 (en) * 1966-11-16 1969-12-09

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4429766Y1 (en) * 1966-11-16 1969-12-09

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63168836A (en) * 1986-12-31 1988-07-12 バスフ アクチェンゲゼルシャフト Manufacture of disc-shaped magnetic recording carrier

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