JPS60159386U - Pulse interval measurement circuit - Google Patents
Pulse interval measurement circuitInfo
- Publication number
- JPS60159386U JPS60159386U JP4668984U JP4668984U JPS60159386U JP S60159386 U JPS60159386 U JP S60159386U JP 4668984 U JP4668984 U JP 4668984U JP 4668984 U JP4668984 U JP 4668984U JP S60159386 U JPS60159386 U JP S60159386U
- Authority
- JP
- Japan
- Prior art keywords
- clock signal
- circuit
- clock
- pulse
- generation circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Measuring Frequencies, Analyzing Spectra (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図と第２図は、従来のパルス間隔測定回路 ′の
構成例を示す図、第３図は本考案の構成を示すブロック
図、第４図は本考案の各信号の時間関係を示す図である
。
１・・・・・・ゲート回路ミ２・・・・・・時間間隔測
定回路、３・・・・・・クロック信号発生回路、４・・
・・・・制御回路、３１・・・・・・クロック信号発生
回路。Figures 1 and 2 are diagrams showing an example of the configuration of a conventional pulse interval measuring circuit, Figure 3 is a block diagram showing the configuration of the present invention, and Figure 4 is a diagram showing the time relationship of each signal of the present invention. It is a diagram. 1... Gate circuit 2... Time interval measurement circuit, 3... Clock signal generation circuit, 4...
. . . Control circuit, 31 . . . Clock signal generation circuit.
Claims (1)
とのできるクロック信号発生回路と、データレコーダで
再生された再生基準クロック信号と前記クロック信号発
生回路からのクロック信号を受けて再生基準クロック信
号のクロックパルス間隔時間中に受けた前記クロック信
号のクロックパルス数を計数しその計数値と予め設定さ
れた整数値とを比較し両者が一致するようにクロック信
号の周波数を制御する制御信号をクロック信号発生回路
へ送出する制御回路と、加えられたパルス信号列から連
続した２個のパルス信号を取り出すゲート回路と、該ゲ
ート回路からの前記２個のパルス信号と前記クロック信
号発生回路からのクロック信号を受は前記２個のパルス
信号のパルス間隔時間中に受けたクロック信号のクロッ
クパルス数を計数することにより前記２個のパルス信号
の時間間隔を測定する時間間隔測定回路とからなるパル
ス間隔測定回路。A clock signal generation circuit that can change the frequency of the clock signal according to a control signal, and a clock pulse interval of the reproduction reference clock signal that receives the reproduction reference clock signal reproduced by the data recorder and the clock signal from the clock signal generation circuit. Counts the number of clock pulses of the clock signal received during the time, compares the counted value with a preset integer value, and sends a control signal to the clock signal generation circuit to control the frequency of the clock signal so that the two match. A control circuit for transmitting a signal, a gate circuit for extracting two consecutive pulse signals from an applied pulse signal train, and a gate circuit for receiving the two pulse signals from the gate circuit and a clock signal from the clock signal generation circuit. and a time interval measuring circuit for measuring the time interval between the two pulse signals by counting the number of clock pulses of the clock signal received during the pulse interval time of the two pulse signals.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4668984U JPS60159386U (en) | 1984-04-02 | 1984-04-02 | Pulse interval measurement circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4668984U JPS60159386U (en) | 1984-04-02 | 1984-04-02 | Pulse interval measurement circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS60159386U true JPS60159386U (en) | 1985-10-23 |
Family
ID=30561324
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4668984U Pending JPS60159386U (en) | 1984-04-02 | 1984-04-02 | Pulse interval measurement circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60159386U (en) |
-
1984
- 1984-04-02 JP JP4668984U patent/JPS60159386U/en active Pending
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