JPS60157325A - Frequency clamping circuit - Google Patents

Abstract

PURPOSE:To reduce a sense error by delivering the primary pulse in response to an input from the 1st monostale multivibrator and adding the output of said pulse to the output of the long pulse width obtained by triggering the 2nd monostable multivibrator. CONSTITUTION:When the 1st pulse is supplied to an input terminal, a primary output pulse PQ1 is delivered from the 1st monostable multivibrator M1. Then the 2nd monostable multivibrator M2 is triggered to deliver an output pulse PQ2 having the pulse width equal to or larger than the output of the M1. Then an AND is obtained between an input pulse and the pulse PQ2. Therefore the output of an IC1 for decision of frequency is set at a low level. When the frequencies of the n-th and its subsequent input pulses exceed the clamping frequency, the output of the IC1 is set at an H level.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to improvements in λ frequency clamp circuits.

In a conventional frequency clamp circuit, as shown in Figure 1, when a pulse (p) of a certain frequency is input to the input terminal (i), the capacitor ((Ii)
A whisker-like signal synchronized with the period of the input pulse (P) is cut out at the point. This whisker-like signal passes through a diode (Dr), the alternating current component of the sinker-like signal flows through a smoothing capacitor (Ci), and the direct current component flows through a variable resistor (vR1') and a resistor (R6) connected in series with it. The level of the smoothed signal at point (d) is controlled by the values of the variable resistor (vRr) and the resistor (R;).

This means that if you want to sense that a pulse (P') higher than a certain clamp frequency (f2) is input, the variable resistor (
The level of the output terminal (3') can be determined by changing the value of vRr) and adjusting the level of the smoothed signal at that frequency to the threshold level of the determination l0(1'). Note that the diode (DI) is connected to the input pulse (
P') At the cam level, the capacitor (C+-) suddenly discharges (V-% at C7 point /&/ 7J' IJIIIJ
This is what prevents L'Pel from being transferred to Siminas. ) The problem with such a conventional example is that there is variation in the quality of the component elements.1 This is superimposed and has a large effect on frequency sensing accuracy.1 Adjustment is performed using a variable resistor (VRI'') K, but as mentioned above, The adjustment work is complicated and difficult due to the superimposition of errors such as
Especially around the clamp frequency that you want to sense, input
) If the frequency of ) changes, the judgment IC (1') uses a Siemi gate and has 1 hysteresis, but the judgment IC (1') does not have a large effect on the output terminal (a). f) There was a problem with accuracy because the threshold hold level itself varied widely. Furthermore, in the conventional example, there are many discrete parts, so the mounting density per part is low), and the disadvantages are that the device cannot be made smaller, and as mentioned above, errors in component elements are superimposed, making it impossible to improve reliability. was there.

The present invention has been made in view of the drawbacks of the conventional example, and its purpose is to provide a frequency clamp circuit that can achieve high accuracy and reliability, and is also smaller than the conventional example. There is something to do.

(Below) The present invention will be described in detail according to illustrated embodiments.

Input terminal (2) When the tc first pulse (P, ) is input, the first monostable multivibrator (A terminal (A, ) of MO
The pulse width (1 of PWυ) is triggered by the edge of Outputs the next output pulse (PQI).

This primary output pulse (PQI) becomes the input signal of the next 21st constant multivibrator (Ml).l+sA terminal (A,
), and the external circuit is the second OR circuit (OR
Output pulse (of the pulse width (PW snow) determined in 1)
p tun) is output more than the output terminal (tun). At this time, the output pulse (PQI) of the first monostable multivibrator (M,)
The pulse m (pwt) of the output pulse motor of the second monostable multivibrator (Ml)>L:D pulse width (p
It is set equal to or much shorter than wt>. Then, by ANDing the output (Q,) and the output (ton), a frequency clamp judgment IC (1) is obtained (hereinafter referred to as judgment IC).

) output terminal (3) becomes L level. Input pulse <p
) is less than the 2-amp frequency, the output of the determination IC (1) will maintain the L level.

Then, if the frequency (fi:) of the n-th and subsequent input pulses (Pn-, Pr-) is not higher than the clamp frequency, the first n-th input pulse (Pn) is input to the first monostable multivibrator (MO). , when the n+li-th input pulse (Pn+1) is input, the pulse width (PW, ) of the output pulse As long as the frequency (f, ) higher than the 2-amp frequency continues, the output (Ql) of the first monostable multivibrator (M,) will maintain the H level.Then, the output (Ql) of the first monostable multivibrator (M,
) becomes a no-signal state after the input pulse (Pn), so when the pulse width (PW, ) of the output pulse (PQ, ) has elapsed after inputting the input pulse (Pn), the output (C1,) switches to H level. , when the output (Q,) and the output (ton) are ANDed, the output of the judgment IC (1) becomes H level, and from the pXnth onwards, the input pulse (P) is input at a frequency higher than the clamp frequency. is sensed. Next, after the first input pulse (Pr) becomes below the clamp frequency again, the input pulse (Pr) is input to the first monostable multivibrator (Ml), and then the pulse width (PWO) is input to the first monostable multivibrator (Ml). Stable multivibrator (Ml
) output (Q'i) is shifted to L level and output (Q'i) is shifted to L level.
, ) (ζ, ), the output (3) of the determination IC (1) is also simultaneously switched to 11/bell. Then the third (ir
+1)th pulse (pr+υ) is input, an output pulse (PQ, .) is output from the output (Ql) of the seventh monostable multivibrator (M,), and the second monostable multivibrator (M,) This output pulse (PQ,...) triggers the output (Tun) to switch to the L level.
, ) and the output (cit) and the judgment IC (1)
The output (3) will continue to maintain the L level. In this way, it is sensed that the frequency (f,) of the input pulse (P) has become equal to or less than the valve clamp frequency from the first r-th pulse onwards.

Fig. 3 shows an example in which the present invention is applied to a pulse motor driver. Currently, pulse motor drivers require a function to switch the current so that the power is increased when one pulse is input, and the power is down when no pulse is input, in order to suppress heat generation in the main unit and the motor. Also, in the case of a bipolar driver, if a certain high-frequency input signal is input, there is a risk that the output stage transistor will short-circuit, leading to damage to the transistor. Conventional circuits have dealt with these problems by providing nine independent functions. When the present invention is applied to the pulse motor driver, it can be used for both hold/drive current switching and frequency clamping.
By effectively using the C gate, one discrete heart can be reduced by one, providing a means for high reliability and miniaturization.

Since the present invention has a vaporized structure, it has the advantage that the number of discrete parts can be reduced, the packaging density of each part can be increased, and the device can be made smaller and its reliability can be improved.

[Brief explanation of drawings]

Figure 1 is a circuit diagram of a conventional example, Figure 1 is a circuit diagram of the present invention, Figure 3 is a time chart of the present invention, Figure 1 (q) is a circuit diagram in which the present invention is applied to a pulse motor driver circuit) (P ) is the input caballus s (CRi) is the first OR circuit Asahi (PQI)
is/next output pulse N (M+) is the first monostable multivibrator, (CRY) is the M-CR circuit N (Pton) is the secondary output pulse, (M, ) is the first monostable multivibrator, judgment This is an IC (1) for use.

Claims (1)

[Claims] (1) External 1st C triggered by input pulse signal
Triggered by the first monostable multivibrator whose 7th output pulse width is determined by the R circuit and the X1st output pulse,
a first monostable multivibrator whose secondary output pulse width is at least equal to or longer than the primary output pulse width determined by an external 2CR circuit;
1. A frequency clamp circuit comprising a determination IC that ANDs a next output and determines a frequency clamp level based on the level of the output.