JPS60150416U - logic recorder - Google Patents
logic recorderInfo
- Publication number
- JPS60150416U JPS60150416U JP3870384U JP3870384U JPS60150416U JP S60150416 U JPS60150416 U JP S60150416U JP 3870384 U JP3870384 U JP 3870384U JP 3870384 U JP3870384 U JP 3870384U JP S60150416 U JPS60150416 U JP S60150416U
- Authority
- JP
- Japan
- Prior art keywords
- logic
- channel
- input
- bit
- analog input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Recording Measured Values (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は、本考案を萌示する全体構成図である。第2図
は、本考案の一実施例を示すブロック図である。第3図
、第4図および第5図は、ロジック入力書込処理プログ
ラムのフローチャートである。第6図は、アナログ入力
書込処理プログラムのフローチャートである:第7図は
、記録紙1目盛(1行)分に相当するバッファメモリへ
のドツトデータ記憶例図である。第8図は、ロジック
・入力とアナログ入力との記録例図である。
10・・・A/D変換器、22・・・演算装置、23・
・・ロジック入力書込手段、25・・・アナログ入力書
込手段、28・・・メモリ、36・・・グラフィックφ
ドツトプリンタ。 、
:(虱 、−
七
一°°υ υ υ −v XJ
゛−−
M=」−コー−−1=」−]−一一FIG. 1 is an overall configuration diagram illustrating the present invention. FIG. 2 is a block diagram showing an embodiment of the present invention. 3, 4, and 5 are flowcharts of the logic input write processing program. FIG. 6 is a flowchart of the analog input writing processing program; FIG. 7 is an example of dot data storage in the buffer memory corresponding to one division (one line) of recording paper. Figure 8 shows the logic
- It is a record example diagram of input and analog input. 10... A/D converter, 22... Arithmetic device, 23.
...Logic input writing means, 25...Analog input writing means, 28...Memory, 36...Graphic φ
dot printer. , :(Lice ,-71°°υ υ υ −v
Claims (1)
ャンネルとを有するロジックレコーダにおいて、チャン
ネルとそのチャンネルに入るロジック入力のレベルとに
よって決定されるメモリ位′ 置にあるメモリセル1
ビツトに、時系列的にロジック入力を1ビツト構成のド
ツトデータとして書込むロジック入力書込手段と、チャ
ンネルに入るアナログ入力をデジタル変換して出力する
アナ口゛ グ・デジタル変換器と、チャンネルとその
デジタル変換し、さらに1ワ一ド1ビツト方式で構成し
たデータとによって決定されるメモリ位置のメモリセル
1ビツトに、時系列的にアナログ入力を1ビツト構成の
ドツトデータとして書込むアナログ入力書込手段と、メ
モリに記憶された、1ビツトのドツトデータを時系列的
に対応するドツトとして印すグラフィック・ドツトプリ
ンタとを備えることを特徴とするロジックレコーダ。In a logic recorder having a channel that receives a logic input and a channel that receives an analog input, a memory cell 1 is located at a memory location determined by the channel and the level of the logic input that enters the channel.
A logic input writing means for writing logic input as one-bit dot data in time series, an analog-to-digital converter for digitally converting the analog input that enters the channel and outputting it, An analog input write method in which the analog input is converted into digital data and then written in chronological order as 1-bit dot data to 1 bit of a memory cell at a memory location determined by the data configured in a 1-word-1-bit format. 1. A logic recorder comprising: a graphics dot printer that prints 1-bit dot data stored in a memory as chronologically corresponding dots.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3870384U JPS60150416U (en) | 1984-03-17 | 1984-03-17 | logic recorder |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3870384U JPS60150416U (en) | 1984-03-17 | 1984-03-17 | logic recorder |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS60150416U true JPS60150416U (en) | 1985-10-05 |
JPH0217289Y2 JPH0217289Y2 (en) | 1990-05-15 |
Family
ID=30545956
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3870384U Granted JPS60150416U (en) | 1984-03-17 | 1984-03-17 | logic recorder |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS60150416U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63269065A (en) * | 1987-04-27 | 1988-11-07 | Hioki Denki Kk | Trigger generating circuit |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5231178A (en) * | 1975-05-21 | 1977-03-09 | Dawson Int | Method of and apparatus for fixing dye and other chemical products on spun fiber |
JPS5360262A (en) * | 1976-10-26 | 1978-05-30 | Edo Western Corp | Graphic recording system |
JPS57133312A (en) * | 1981-02-12 | 1982-08-18 | Advantest Corp | Multi-point recording device |
-
1984
- 1984-03-17 JP JP3870384U patent/JPS60150416U/en active Granted
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5231178A (en) * | 1975-05-21 | 1977-03-09 | Dawson Int | Method of and apparatus for fixing dye and other chemical products on spun fiber |
JPS5360262A (en) * | 1976-10-26 | 1978-05-30 | Edo Western Corp | Graphic recording system |
JPS57133312A (en) * | 1981-02-12 | 1982-08-18 | Advantest Corp | Multi-point recording device |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63269065A (en) * | 1987-04-27 | 1988-11-07 | Hioki Denki Kk | Trigger generating circuit |
Also Published As
Publication number | Publication date |
---|---|
JPH0217289Y2 (en) | 1990-05-15 |
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