JPS601198U

JPS601198U - Recording and playback device

Info

Publication number: JPS601198U
Application number: JP1983085072U
Authority: JP
Inventors: 山田　恒雄; 左高　正和; 芝田　泉; 武松塚
Original assignee: 株式会社ケンウッド
Priority date: 1983-06-06
Filing date: 1983-06-06
Publication date: 1985-01-07
Also published as: JPS6028983Y2

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of the drawing]

第１図は本考案の機能を示すブロック図。第２図は本考
案の一実施例の構成を示すブロック図。第３図ａは音声信号検出回路の一例を示す回路図。第３図すおよびＣは第３図ａに示した音声信号検出回路
の作用の説明に供する波形図。第４図および第５図は本
考案の一実施例の作用の説明に供するフローチャート。第６図は本考案の一実施例の作用の説明に供する模式図
。１・・・マイクロホン、２・・・Ａ／Ｄ変換手段、３・
・・ＲＡＭ、４・・・Ｄ／Ａ変換手段、６・・・音声信
号検出回路、７および８・・・第１および第２の書き込
み制御手段、９・・・転送制御手段、１０・・・選択手
段、１１・・・読み出し制御手段。第６図ｓ　　　ＭＩＥＭ２Ｓ　　Ｍｊ！ＥＭｓｓ　　−Ｍ５Ｅ
鬼ｔｌ　（ｄ＋１３ −　（ｔＡ）FIG. 1 is a block diagram showing the functions of the present invention. FIG. 2 is a block diagram showing the configuration of an embodiment of the present invention. FIG. 3a is a circuit diagram showing an example of an audio signal detection circuit. FIGS. 3A and 3C are waveform diagrams for explaining the operation of the audio signal detection circuit shown in FIG. 3A. 4 and 5 are flowcharts for explaining the operation of one embodiment of the present invention. FIG. 6 is a schematic diagram for explaining the operation of an embodiment of the present invention. 1...Microphone, 2...A/D conversion means, 3.
...RAM, 4...D/A conversion means, 6...audio signal detection circuit, 7 and 8...first and second write control means, 9...transfer control means, 10... - Selection means, 11... readout control means. Figure 6 s MIEM2S Mj! EMss-M5E
Oni tl (d+13 - (tA)

Claims

[Scope of utility model registration request]

A/D conversion means for converting an analog audio signal into a digital signal; a readable/writable storage means that is divided into first to third areas and stores the output of the A/D conversion means; A D/A conversion means for converting the digital signal into an analog signal, a recording instruction means for instructing recording, an audio signal detection circuit for detecting the presence of an analog audio signal, an output of the recording instruction means and an audio signal detection circuit. selection means for selecting the first write control means and the second write control means from the output of the recording means; and a selection means for selecting the first write control means and the second write control means from the output of the recording means; A first write control means for cyclically writing the output of the A/D conversion means into the first area; and an audio signal detection circuit for an audio signal detection circuit after the writing by the first write control means is completed;
a second write control means for instructing to sequentially write the output of the D conversion means into a third area of the storage means;
After completion of writing by the second write control means to the area, the entire storage contents of the first area of the storage means are stored at the address next to the last address specified by the first write control means. Transfer control means for sequentially instructing data to be transferred from the second area to the second area of the storage unit; and read control unit for instructing sequential reading from the second area to the third area of the storage unit after the transfer by the transfer control unit. A recording/playback device featuring: