JPS60150385A - Signal processing device of television receiver - Google Patents

Signal processing device of television receiver

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Publication number
JPS60150385A
JPS60150385A JP654084A JP654084A JPS60150385A JP S60150385 A JPS60150385 A JP S60150385A JP 654084 A JP654084 A JP 654084A JP 654084 A JP654084 A JP 654084A JP S60150385 A JPS60150385 A JP S60150385A
Authority
JP
Japan
Prior art keywords
circuit
signal
level
gain control
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP654084A
Other languages
Japanese (ja)
Inventor
Yutaka Miki
豊 三木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP654084A priority Critical patent/JPS60150385A/en
Publication of JPS60150385A publication Critical patent/JPS60150385A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To obtain gradation with a suitable display in response to a level of a video signal by combining a video detection circuit, a level detecting circuit, a gain control circuit, a clamp circuit and an A/D converting circuit. CONSTITUTION:An output of the video detection circuit 1 is inputted to the gain control circuit 6 and the level detection circuit 7, which detects the head value of the video signal in one field and inputs a control signal in response to the value to the gain control circuit 6. The gain control circuit 6 compresses or expands the video signal by using the control signal inputted from the level detection circuit 7 so as to process the video signal as a suitable signal for the A/D conversion in one field. When the peak value of the input signal level is smaller than 100%, for example, the input/output characteristic of the gain control circuit 6 is set as shown in Fig. (a) and when the peak of the input signal level is close to 100%, the input/output characteristic of the gain control circuit 6 is set as shown in Fig. (b), and when the peak is an intermediate value as above, the input/output characteristic of the gain control circuit 6 is set to the linear (1:1) input/output characteristic.

Description

【発明の詳細な説明】 産業上の利用分野 本発明ハテレヒジョン受像機の中で、特にテレビジョン
信号をアナログ−ディジタル変換してディジタル信号で
表示素子を駆動する装置にお−て用いらルる信号処理装
置に関するものである。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a signal used in a stereoscopic television receiver, particularly in a device that converts a television signal from analog to digital and drives a display element with the digital signal. It relates to a processing device.

従来例の構成とその問題点 近年、テレビジョン受像機を小型、軽量化するために平
面ディスプレイをブラウン管の代りに用いて受像機を構
成しようとする動きが活発である。
Conventional Structures and Their Problems In recent years, in order to make television receivers smaller and lighter, there has been an active movement to construct television receivers using flat displays instead of cathode ray tubes.

例えば、液晶や9発光ダイオード、プラズマディスプレ
イ、螢光表示管などが平面ディスプレイとして使われて
いる。これらの平面ディスプレイでは、テレビジョン信
号をディジタル化して表示素子を駆動子る方式が大半を
占めているが、ディジタル信号で階調を表示する場合、
階調の数が増加するに従い表示品質は向上する反面9回
路の規模が大きく複雑になる傾向がある。例えば、液晶
の単純マトリクスパネルを用いてテレビジョンm像を表
示する場合を考えると、信号に応じて液晶に印加される
電圧の時間幅を制御するパルス幅変調方式がよく用いら
れる。この場合、階調のピノ下数のラインメモリが必要
であり、階調のビット数が増加するに従いラインメモリ
の数も増加する。
For example, liquid crystals, light emitting diodes, plasma displays, fluorescent display tubes, etc. are used as flat displays. Most of these flat displays use digital television signals to drive display elements, but when displaying gray scales using digital signals,
As the number of gradations increases, display quality improves, but on the other hand, the scale of the nine circuits tends to become larger and more complex. For example, when considering the case where a television m image is displayed using a simple matrix panel of liquid crystal, a pulse width modulation method is often used to control the time width of the voltage applied to the liquid crystal according to a signal. In this case, line memories for the number of gray scales below Pinot are required, and as the number of gray scale bits increases, the number of line memories also increases.

従って階調を増やすと回路規模も大きく複雑になる。Therefore, increasing the number of gradations also increases the circuit size and complexity.

以下、図面を参照して従来例を説明する。第1図は従来
例のテレビジョン受像機の要部をブロック図で示したも
のである。
A conventional example will be described below with reference to the drawings. FIG. 1 is a block diagram showing the main parts of a conventional television receiver.

第1図において、1は映像検波回路、2はクランプ回路
、3はアナログ−ディジタル(以下、ADと略称する)
変換回路、4は駆動回路、5は表示素子である。
In Fig. 1, 1 is a video detection circuit, 2 is a clamp circuit, and 3 is an analog-digital (hereinafter abbreviated as AD).
4 is a conversion circuit, 4 is a drive circuit, and 5 is a display element.

映像検波回路1ではテレビジョン信号の映像信号が検波
により得られる。映像信号はクランプ回路2でクランプ
され、直流分が再生される。その後、映像信号はAD変
換回路3でアナログ値がらディジタル値に変換されて、
駆動回路4に入力され、駆動回路4では表示素子5を駆
動する電圧を発生する。
In the video detection circuit 1, a video signal of a television signal is obtained by detection. The video signal is clamped by a clamp circuit 2, and the DC component is reproduced. After that, the video signal is converted from an analog value to a digital value by the AD conversion circuit 3.
The voltage is input to the drive circuit 4, and the drive circuit 4 generates a voltage for driving the display element 5.

第1図の従来例に示すように、テレビジョン信号をディ
ジタル化して表示する場合、表示の階調はAD変換回路
−3におけるビット数で決定される。
As shown in the conventional example of FIG. 1, when a television signal is digitized and displayed, the display gradation is determined by the number of bits in the AD conversion circuit-3.

ところが表示の階調を多くとって高品質の画像を表示す
るためには、AD変換回路3におけるビット数を増やさ
ねばならず、ビ・、)数の増加はそのまま駆動回路4に
おける回路1例えば前述の液晶の場合にはラインメモリ
の増加につながるため。
However, in order to display a high-quality image with many gradations, it is necessary to increase the number of bits in the AD conversion circuit 3. In the case of LCDs, this leads to an increase in line memory.

回路が大規模で複雑となり、コスト高になると共に、テ
レビジョン受像機自体も大型になってしまう。仮に駆動
回路をIC化しても2回路の増加はチップサイズやピン
数の増加になり、コスト高の問題は同様である。
The circuit becomes large-scale and complicated, resulting in high costs and the television receiver itself also becomes large. Even if the drive circuit were to be integrated into an IC, the addition of two circuits would increase the chip size and the number of pins, and the problem of high cost would still be the same.

発明の目的 本発明は、上記の様な欠点を解消して9回路規模を増加
せず9階調が無駄なく合理的に用いられているため見や
すいテレビジョン受像機を構成することのできる信号処
理装置を提供することを目的とするものである。
Purpose of the Invention The present invention provides signal processing that eliminates the above-mentioned drawbacks and makes it possible to configure a television receiver that is easy to view because the 9 gradations are used rationally and without waste without increasing the scale of the 9 circuits. The purpose is to provide a device.

発明の構成 本発明のテレビジョン受像機の信号処理装置は、映像検
波回路と、前記映像検波回路の出力レベルを検出するレ
ベル検出回路と、入力端子に前記映像検波回路の出力が
与えられ、制御端子に前記レベル検出回路の出力が与え
られる利得制御回路と、前記利得制御回路の出力信号を
クランプするクランプ回路と、前記クランプ回路の出力
アナログ信号をディジタル信号に変換子るアナログ−デ
ィジタル変換回路を具備して構成されたものであり、こ
れにケリ回路規模を増加することなく1階調が無駄なく
合理的に用いられているだめ見やすいテレビジョン受像
機を構成することができる。
Structure of the Invention A signal processing device for a television receiver according to the present invention includes a video detection circuit, a level detection circuit that detects an output level of the video detection circuit, and an input terminal to which the output of the video detection circuit is applied, and a control device. a gain control circuit to which the output of the level detection circuit is applied to a terminal; a clamp circuit that clamps the output signal of the gain control circuit; and an analog-to-digital conversion circuit that converts the output analog signal of the clamp circuit into a digital signal. Accordingly, it is possible to construct an easy-to-view television receiver in which one gradation is used rationally and without waste without increasing the circuit scale.

実施例の説明 以下、本発明の実施例について図面を参照して説明する
。第2図は本発明の一実施例を示す要部プロ、り図であ
る。第2図において、1〜3は第1図と同様のものであ
り、6は利得制御回路、7はレベル検出回路である。映
像検波回路1の出力は、利得制御回路6とレベル検出回
路7に入力され、レベル検出回路7では、1フイールド
内における映像信号の先頭値を検出し、その値に応じた
制御信号を利得制御回路6に入力する。利得制御回路6
では、レベル検出回路7から入力された制御信号によっ
て、映像信号を圧縮もしくは伸長し、1フイールド内に
おいて、映像信号をAD変換に最適となるように処理す
る。
DESCRIPTION OF EMBODIMENTS Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 2 is a schematic diagram of main parts showing an embodiment of the present invention. In FIG. 2, 1 to 3 are the same as those in FIG. 1, 6 is a gain control circuit, and 7 is a level detection circuit. The output of the video detection circuit 1 is input to a gain control circuit 6 and a level detection circuit 7, and the level detection circuit 7 detects the leading value of the video signal within one field and performs gain control on a control signal according to that value. Input to circuit 6. Gain control circuit 6
Then, the video signal is compressed or expanded according to the control signal input from the level detection circuit 7, and the video signal is processed to be optimal for AD conversion within one field.

次に、利得制御回路6の特性について、もう少し詳細に
述べる。
Next, the characteristics of the gain control circuit 6 will be described in more detail.

利得制御回路6の特性は、上に述べたように、1フイー
ルド内において、先頭値に応じたレベルだ映像信号を圧
縮もしくは伸長するものであって、一般に用いられてい
るAGC(自動利得制御)回路とは異なる。即ち、一般
のAGC回路では入力信号のレベルに対応して一定出力
を得るように。
As mentioned above, the characteristics of the gain control circuit 6 are to compress or expand the video signal within one field to a level corresponding to the leading value, and to use the commonly used AGC (automatic gain control). It is different from a circuit. That is, in a general AGC circuit, a constant output is obtained depending on the level of the input signal.

リニアな増幅器の増幅率を変化させるものであるが、本
発明において使用する利得制御回路6ではリニアな増幅
を行なう必要はなく、AD変換回路3の出力が階調の表
示に最適となるように映像信号を圧縮もしくは伸長する
。言い換えれば、利得制御回路6は信号を非直線に処理
する回路である。
Although the amplification factor of a linear amplifier is changed, the gain control circuit 6 used in the present invention does not need to perform linear amplification, and the output of the AD conversion circuit 3 is adjusted so that it is optimal for displaying gradations. Compress or expand video signals. In other words, the gain control circuit 6 is a circuit that processes signals non-linearly.

利イI)制御回路6の入出力特性の一例を第3図に示す
。第3図の例で7は、折れ線特性を持たせている。この
ようにすることにより、例えば第3図(a)の様な特性
を持たせると、レベルが低い信号は階調が細かく、レベ
ルの高い信号は階調が粗くなる。
Advantages I) An example of the input/output characteristics of the control circuit 6 is shown in FIG. In the example of FIG. 3, 7 has a polygonal line characteristic. By doing this, for example, if the characteristics shown in FIG. 3(a) are provided, a signal with a low level will have a fine gradation, and a signal with a high level will have a coarse gradation.

一般的に、テレビジョン画像を表示した場合、通常の画
像では信号レベルのピーク値は100%になることはほ
とんどなく、50゛〜7o%のレベルが最高レベルとな
ることが多い。従って、通常の画像を受信している時に
は利得制御回路6の入出力特性を第3図(a)のように
することにより、低い信号レベルに対して階調の数を多
くとることができ、少ない階調数でも見やすい表示がで
きる。
Generally, when a television image is displayed, the peak value of the signal level of a normal image is almost never 100%, and the highest level is often between 50% and 7%. Therefore, when receiving a normal image, by setting the input/output characteristics of the gain control circuit 6 as shown in FIG. 3(a), it is possible to increase the number of gradations for a low signal level. Easy-to-read display is possible even with a small number of gradations.

−4だ第3図cb)の様な特性を用いると、レベルが低
い信−”、; h:F、階調が粗く、レベルの高い信号
は階調がA11llかくなる。寸だ、人間の視覚特性と
して、ルIZ度が高くなるにつれて解像度が良くなる(
ガンマ時性)性質を1.繁っているため、出力の信号レ
ベルが表示素子の輝度と比例関係を持つ場合には、第3
図(1))の入出力特性(・1視覚特性に近似さするこ
とができる。tた、この場合は100 !n レベル−
1tで信号が入っている場合にf吏うことかできる。
If you use the characteristics as shown in Figure 3cb), the gradation will be rough, and the gradation will be A11ll for a signal with a high level. As a visual characteristic, the higher the IZ degree, the better the resolution (
Gamma temporal) property 1. Therefore, if the output signal level has a proportional relationship with the brightness of the display element, the third
Figure (1)) can be approximated to the input/output characteristic (・1 visual characteristic. In this case, 100!n level-
If there is a signal at 1t, it is possible to perform an f-operation.

以上の様な特性を用いて9例えば入力の(ij号レベル
のピーク値が100+H,(、よりも小の時υC(寸、
利得制御回路60入出力特性を第3図(a)の様に設定
し、入力信号レベルのピークが100%に近い時には利
得制御回路6の入出力!1、v性を第3図0))の様に
設定し7.それぞ凡の中間の場合に(rl:、利?!)
 1till IM1回路6の入出力持(イには1対1
のリニアな入出力′1、r性に設定することができる。
Using the above characteristics,9 For example, when the peak value of the input (ij level is smaller than 100+H,(,), υC(size,
The input/output characteristics of the gain control circuit 60 are set as shown in FIG. 3(a), and when the peak of the input signal level is close to 100%, the input/output characteristics of the gain control circuit 6! 1. Set the v characteristics as shown in Figure 3 0))7. In each case (rl:, profit?!)
1till IM1 circuit 6 input/output (one to one
It is possible to set the linear input/output '1, r-characteristic.

例えば入力信号レベルが75%以下の時は第3図(a)
の特性、95%以−にの時は第3図(b)の特性、75
〜95 ’:4の時(riミリニア特性に設定すること
ができる。
For example, when the input signal level is 75% or less, Figure 3 (a)
When the characteristic is 95% or more, the characteristic shown in Fig. 3(b) is 75
~95': When 4 (ri can be set to millinear characteristics.

この、1:うにすると、入力信号レベルが小さい場合V
CId:階調の数の多くを低レベルの信号部分に当てる
ことができ、見かけ上階調を増やしたのと同じ効果が1
11らhる。寸だ、入力信号レベルが大きい場合には、
人間の視覚特性に合わせた階調表示ができるため、見や
すい表示が得られる。
If this is set to 1:, when the input signal level is small, V
CId: A large number of gradations can be applied to low-level signal parts, and the same effect as increasing the number of gradations is obtained by increasing the number of gradations by 1.
11 hours. If the input signal level is large,
Since gradation can be displayed in accordance with human visual characteristics, an easy-to-read display can be obtained.

寸だ、第3図では、2段の折れ線特性を例として図示し
だが、2段の折れ線特性に限らず、3段。
In Figure 3, a two-stage polygonal line characteristic is shown as an example, but it is not limited to a two-stage polygonal line characteristic, but a three-stage polygonal line characteristic.

4段・ の折れ線特性や、2乗特性、対数・指数特性な
どを利得制御回路6の入出力特性として設定することが
できる。
The input/output characteristics of the gain control circuit 6 can be set as a four-stage polygonal characteristic, a square characteristic, a logarithmic/exponential characteristic, or the like.

発明の効果 以上の説明から明らかなように9本発明は映像検波回路
と、レベル検出回路と、利得制御回路と、クランプ回路
と、AD変換回路を巧みに組み合わせることにより、映
像信号のレベルに応じて最適な表示の階調を得るととが
できるという効果が得られる。
Effects of the InventionAs is clear from the above explanation, the present invention skillfully combines a video detection circuit, a level detection circuit, a gain control circuit, a clamp circuit, and an AD conversion circuit to generate a signal that responds to the level of a video signal. The effect of obtaining the optimum display gradation can be obtained.

サラに、1フイールド内において、ピーク値を検出する
レベル検出回路を持つように構成した場合には、1両面
の最高輝度レベルを基準として映像信号のレベルに応じ
て最適な表示の階調を得ることができるという効果が得
られる。
If the structure is configured to have a level detection circuit that detects the peak value within one field, the optimum display gradation can be obtained according to the level of the video signal using the highest brightness level of one side as a reference. You can get the effect that you can.

さらに、利得制御回路の入出力特性が、非直線である」
:うに構成した場合には、少ない階調数であっても、見
やすい表示ができるという効果が得られる。
Furthermore, the input/output characteristics of the gain control circuit are nonlinear.
: In the case of this configuration, an effect that an easy-to-read display can be obtained even with a small number of gradations can be obtained.

なお、以上は白黒テレビジョン受1′4;磯について説
明したが、カラーテレビジョン受(象限についても同様
の効果が得られることは言う′土でもない。
Although the above description has been made for a black and white television receiver (1'4), it is needless to say that the same effect can be obtained for a color television receiver (quadrant).

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来例の要部プロ、り図、第2図(吐水発明の
一実施例のプロンク図、第3図r1.本発明で使用する
利得制御回路の入出力!IM′性の一例6:示す特性図
である。 1−・−・映像検波回路、2・・ クランプ回路、3−
・・・AD変換回路、6−・・利得側−11回路、7−
・レベル検出回路。
Figure 1 shows the main parts of the conventional example. Figure 2 (Pronk diagram of an embodiment of the water spouting invention), Figure 3 r1. An example of the input/output! IM' characteristics of the gain control circuit used in the present invention. 6: Characteristic diagram shown. 1---Video detection circuit, 2--Clamp circuit, 3-
...AD conversion circuit, 6-...Gain side-11 circuit, 7-
・Level detection circuit.

Claims (3)

【特許請求の範囲】[Claims] (1)映像検波回路と、前記映像検波回路の出力レベル
を検出→−るレベル検出回路と、入力端子に前記映像検
波回路の出力が与えられ、制御端子に前記レベル検出回
路の出力が与えられる利得制御回路と、前記利得制御回
路の出力信号をクランプするクランプ回路と、前記クラ
ンプ回路の出力アナログ信号をデジタル信号に変換する
アナログ−デジタル変換回路を具備してなることを特徴
とするテレビジョン受像機の信号処理装置。
(1) A video detection circuit, a level detection circuit that detects the output level of the video detection circuit, an input terminal of which is given the output of the video detection circuit, and a control terminal of which is given the output of the level detection circuit. A television receiver comprising a gain control circuit, a clamp circuit that clamps an output signal of the gain control circuit, and an analog-to-digital conversion circuit that converts an output analog signal of the clamp circuit into a digital signal. The signal processing device of the machine.
(2) レベル検出回路は、1フイールド内においてピ
ーク値を検出するように構成されていることを、’l;
y徴吉する特許請求の範囲第(1)項記載のテレビジョ
ン受像機の信号処理装置。
(2) The level detection circuit is configured to detect a peak value within one field;
A signal processing device for a television receiver according to claim (1).
(3)利イξI制側1回路は、入出力特性が非直線であ
ることを特徴とする特許請求の範囲第(1)項記diす
のテレビジョン受像機の信号処理装置。
(3) The signal processing device for a television receiver as set forth in claim (1), wherein the gain ξI control side 1 circuit has non-linear input/output characteristics.
JP654084A 1984-01-18 1984-01-18 Signal processing device of television receiver Pending JPS60150385A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP654084A JPS60150385A (en) 1984-01-18 1984-01-18 Signal processing device of television receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP654084A JPS60150385A (en) 1984-01-18 1984-01-18 Signal processing device of television receiver

Publications (1)

Publication Number Publication Date
JPS60150385A true JPS60150385A (en) 1985-08-08

Family

ID=11641173

Family Applications (1)

Application Number Title Priority Date Filing Date
JP654084A Pending JPS60150385A (en) 1984-01-18 1984-01-18 Signal processing device of television receiver

Country Status (1)

Country Link
JP (1) JPS60150385A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6370766U (en) * 1986-10-27 1988-05-12
JPH0442678A (en) * 1990-06-07 1992-02-13 Sharp Corp Liquid crystal display device
JP2001034226A (en) * 1999-07-08 2001-02-09 Lg Electronics Inc Gradation display processing device of plasma display panel and its processing method

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6370766U (en) * 1986-10-27 1988-05-12
JPH0510469Y2 (en) * 1986-10-27 1993-03-15
JPH0442678A (en) * 1990-06-07 1992-02-13 Sharp Corp Liquid crystal display device
JP2001034226A (en) * 1999-07-08 2001-02-09 Lg Electronics Inc Gradation display processing device of plasma display panel and its processing method

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