JPS60150307A - Transistor circuit - Google Patents

Abstract

PURPOSE:To obtain an output polarity inverting circuit with low power consumption and excellent symmetricity in non-inverting and inverting outputs by providing an input circuit, an output circuit from an output terminal of which a current flows out or in, a supply circuit of said current and a control circuit. CONSTITUTION:When the level of a switching terminal goes to a ground potential, the 1st and 2nd current mirror circuits comprising transistors (TR) 14, 15 and 16, 17 are operated, and since the emitter area of the TRQ16 is made twice that of the TRQ17, a current equal to the current flowing to the TRs Q15, Q17 and a resistor R13 flows from an output terminal 12. Since only a base current of a TRQ12 flows to a TRQ11, the collector potential reaches a voltage near that of a power supply 13. Then the signal in phase with the input signal is outputted from the output terminal 12. When an input conducting TRs Q18, Q19 enters the switching terminal 15, the TRQ12 and the 2nd current mirror circuit are not conductive and a current is applied to a TRQ13 from the 1st current mirror circuit. Thus, in making the resistance value of the resistors R11, R12 equal, the signal being the inversion of the input signal is outputted from the output terminal 12.

Description

DETAILED DESCRIPTION OF THE INVENTION (Technical Field) The present invention relates to a transistor circuit that inverts an output signal by inputting a switching terminal.

(Prior Art) FIG. 1 is a circuit diagram showing an example of a conventional transistor circuit that inverts an output signal by inputting a switching terminal.

In FIG. 1, the emitter of a transistor Q, whose base is connected to the input terminal 1, is connected to the ground potential 4 through a resistor R1.
The collector is connected to the power supply 3 via a resistor R3. Further, the collector and emitter of the transistor Q1 are connected to the input of the analog switch 5, and the output of the analog switch 5 is connected to the output terminal 2. Note that 6 is a switching terminal.

Next, the operation of this conventional example will be explained. The signal input to the input terminal 1 is outputted from the emitter of the transistor Q1 with the same polarity, and if the values of the resistors R1 and R2 are made equal, a signal with the same amplitude and opposite phase is outputted from the collector of the transistor Q1. Two signals with different polarities are input to the analog switch 5, and one of the two signals is output from the output terminal 2 depending on the input to the switching terminal 7.

In this way, in the conventional example, the analog switch 5 is required, and it is also necessary to lower the impedance when connecting the collector of the transistor Q□ and the analog switch. The drawback is that the flowing current increases, power consumption increases, and it is difficult to integrate into an integrated circuit because a buffer must be connected between the collector of the transistor Q1 and the analog switch 5 unless the value of the resistor R2 is reduced. be.

(Object of the Invention) An object of the present invention is to provide a transistor circuit suitable for semiconductor integrated circuits, which inverts an output signal by inputting a switching terminal, by eliminating the above-mentioned drawbacks.

(Structure of the Invention) The transistor circuit of the present invention includes a first transistor of one conductivity type whose base is connected to the input, the emitter is connected to the first node via the first resistor, and the collector is connected to the second node. is an input circuit consisting of the second node and a second resistor whose other end is connected to a power supply, the first node and the second node are input terminals, and a current flows out from the same output terminal. an output circuit that outputs outputs with opposite phases from the same output terminal by switching whether the current flows in or out from the same output terminal; a current supply circuit that causes current to flow into and out of the same output terminal; and a control circuit that controls the operation of the current supply circuit.

(Example) Hereinafter, an example of the present invention will be described with reference to the drawings.

FIG. 2 is a circuit diagram showing a first embodiment of the present invention.

In this embodiment, the base is the input and the emitter is the first resistor R1.
A first transistor Q of NPN type whose collector is connected to a second node N1□ to a first node 1'Jtt via a
□1 and a second resistor R1□ whose one end is connected to the node N2 and the other end is connected to the power supply 13;
□ and node N1□ as input terminals, and an output circuit 17 that switches whether current flows out or flows in from the same output terminal 12 and outputs outputs with opposite phases from the output terminal 12, and to the output terminal 12. The current supply circuit 18 includes a current supply circuit 18 that causes current to flow in and out, and a control circuit 19 that controls the operations of the output circuit 17 and the current supply circuit 18.

In this embodiment, the output circuit 17 has a base at the node N1.
, a second NPN transistor Q1□ whose emitter is connected to the output terminal 12 and whose collector is connected to the power supply 13, and a PNP transistor whose base is connected to the node N1□, whose emitter is connected to the output terminal 12, and whose collector is connected to the ground potential 14. The current supply circuit 18 consists of a third transistor Q13 of the type
is a PNP type fourth transistor Q14 whose emitter is connected to the power supply 13 and whose collector is connected to the output terminal 12.
The base is the base of the transistor Q14, the emitter is the power supply 13, the collector is the base and the third resistor R13.
A fifth PNP transistor (hs) is connected to one end of each transistor, a sixth NPN transistor Q16 has an emitter connected to the ground potential 14 and a collector connected to the output terminal 12, and a transistor Q□6 has a base. The control circuit 19 consists of a seventh NPN transistor Q17 whose emitter is connected to the ground potential 14 and whose collector is connected to the base and the other end of the resistor R3.
An eighth NPN transistor Qts whose base is connected to the switching terminal 15 through a fourth resistor R14, whose emitter is connected to the ground potential 14 and whose collector is connected to the node N, and whose base is connected to the fifth resistor R, The NPN type ninth transistor Q19 has its emitter connected to the ground potential 14 and its collector connected to the base of the transistor Q16, respectively, via the switching terminal 15.

Note that here, transistor Q14 * (hs is the first current mirror circuit, transistors Q1a, Q17
forms a second current mirror circuit.

Next, the operation of this embodiment will be explained.

When the switching terminal 15 becomes the ground potential, the transistor Q
□B1Q19 is not conductive and the first and second current mirror circuits operate, but since the emitter area of transistor Q□6 is twice that of transistor Q□7, transistors Q1□ and Q□ From the common emitter connection point of 3, that is, the output terminal 12, the transistor Qts,
A current equal to the current flowing through the Qt□ resistor R13 is caused to flow into the resistor R13. Therefore, the transistor Q13 is not conductive, the transistor Q1□ is conductive, and only the pace current of the transistor Q1□ flows through the transistor Q, so that the potential of its collector becomes approximately close to the voltage of the power supply 13. Therefore, the transistor Q□11Q12 has a Darlington-connected emitter-follower configuration, and a signal in phase with the input signal is output from the output terminal 12.

Next, when the switching terminal 15 receives an input that makes the transistor Q□s+Q1e conductive, the second current mirror circuit consisting of the transistor Q2 and the transistor Q1s + Q17 does not conduct, and the second current mirror circuit consisting of the transistor Q14゜(hs) 1 current mirror circuit to transistor Q1
Supply current to 3. Therefore, if the values of the resistors R□□ and R2 are made equal, the transistor Q11 works as a common emitter amplifier with a gain of 1, the transistor Q1g works as an emitter follower, and the output terminal 12 outputs a signal having the opposite phase to the input signal. is output.

As described above, when the switching terminal 15 is set to the ground potential, a signal in phase with the signal input to the input terminal 11 is output from the output terminal 12, and the transistor (h
When an input that makes conductive is input to a and Q19', a signal having the opposite phase to the input signal is output.

Furthermore, even when output is inverted, it is possible to output with low impedance.

FIG. 3 is a circuit diagram showing a second embodiment of the present invention.

The difference between this embodiment and the first embodiment shown in FIG. 2 is as follows.
A twelfth NPN transistor Q2□ for constant current source and a transistor Q1□ are connected to the emitter of the transistor (hl).
and transistor Q□2. A PNP type tenth transistor 20 and an NPN type eleventh transistor Q2□ are respectively added between Q□3, and the emitters of transistors 20 and 21 are connected through a sixth resistor R6.

As a result, when the switching terminal 15 is set to the ground potential, the constant current source transistor Q2□ becomes conductive, and the transistor Q2
If only a small current is allowed to flow through the transistor Q2, the collector potential of the transistor Q□□ rises to the potential of the power supply 13, so the transistor Q21° resistor R16 becomes a load for the transistor Q2G, and the transistor Qzo operates as an emitter follower. Therefore, as in FIG. 2, the transistor Q1□ becomes conductive, and a signal in phase with the input signal is output.

Next, transistors Qis and Qte' are connected to the switching terminal 15.
fr: When input to conduct is input, transistor Q2
□ is not conductive, and the transistor Q2□ operates as an emitter follower, contrary to the case where the switching terminal 15 is set to the ground potential.
As in the case of FIG. 2, a signal of opposite phase is output from the emitter of transistor Q1g. That is, according to the second embodiment, a signal can be output at the same potential as the operating point of the collector and emitter of the transistor Q1□, and the output amplitude can be maximized.

(Effects of the Invention) As described in detail above, according to the present invention, with the above configuration, the output can be inverted by inputting the switching terminal without the need for an analog switch, and can be output with low impedance. However, a transistor circuit is obtained.

Therefore, it is possible to obtain a transistor circuit as an output polarity inversion circuit that is suitable for semiconductor integrated circuits, has low power consumption, and has good symmetry between in-phase and anti-phase outputs.

[Brief explanation of the drawing]

Figure 1 is a circuit diagram showing an example of a conventional transistor circuit.
FIGS. 2 and 3 are circuit diagrams showing a first embodiment and a second embodiment of the present invention, respectively. 1...Input terminal, 2...Output terminal, 3
...Power supply, 4...Ground potential, 5...
...Analog switch, 6...Switching terminal, 1
1...Input terminal, 12...Output terminal,
13...Power supply, 14...Ground potential, 1
5...Switching terminal, 16...Input circuit,
17.17'・Old...Output circuit, 18...Current supply circuit, 19.19'...Song/control circuit, N11 *
N12...Node, Q□1Q111Q121Q
□6゜Q! ? + Qts + Qtor Q21
+ Q2□・・・・・・NPN transistor% Q1
3 + Qt4 + Qt5, Q10-- PNP
type transistor, R1-R2r R11-Rta...
···resistance.

Claims (3)

[Claims] (1) A first transistor of one conductivity type, the pace of which is connected to the input terminal, the emitter connected to the node fjIcl via the first resistor, and the collector connected to the second node, and one end connected to the second node; and a second resistor connected to a power source, the first node and the second node are input terminals, and the current is switched between flowing out or flowing in from the same output terminal. An output circuit that outputs outputs with opposite phases from output terminals, a current supply circuit that causes current to flow into and out of the output terminal, and a control circuit that controls operations of the output circuit and the current supply circuit. A transistor circuit characterized by: (2) The output circuit includes a second transistor of one conductivity type, in which the pace is connected to the first node, the emitter is connected to the output terminal, and the collector is connected to the power supply, and the pace is connected to the second node, the emitter is connected to the output terminal, and the collector is connected to the power supply. are connected to a third transistor of opposite conductivity type, each connected to the ground potential, and a fourth transistor of opposite conductivity type, whose emitter is connected to the power supply and whose collector is connected to the output terminal, respectively. a fifth transistor of an opposite conductivity type, the emitter of which is connected to the ground potential and the collector of which is connected to the output terminal; a sixth transistor of one conductivity type, the base emitter of the sixth transistor being connected to the ground potential, and the collector of the sixth transistor being connected to the ground potential and the other end of the third resistor, respectively; The control circuit includes an eighth transistor of one conductivity type, the emitter of which is connected to the switching terminal via a fourth resistor, the emitter of which is connected to the ground potential, and the collector of which is connected to the first node. and a ninth transistor of one conductivity type, the base of which is connected to the switching terminal via a fifth resistor, the emitter of which is connected to the ground potential, and the collector of which is connected to the base of the sixth transistor. ) Transistor circuit described in section. (3) The output circuit includes a tenth transistor of opposite conductivity type, the base of which is connected to the first node, and the collector of which is connected to one end of the sixth resistor and the ground potential, and the base is connected to the second node. an eleventh transistor of one conductivity type, the emitter of which is connected to the other end of the sixth resistor and the collector of which is connected to the power supply; the emitter of which is connected to the emitter of the tenth transistor; a second transistor of one conductivity type, the base of which is connected to the first conductivity type;
The emitter of the first transistor is connected to a third transistor of an opposite conductivity type, the emitter of which is connected to the output terminal, and the collector of which is connected to the ground potential, and a current supply circuit is connected to the emitter of the first transistor, the emitter of which is connected to the power supply, and the collector of which is connected to the output terminal. a fifth transistor of an opposite conductivity type, whose base is connected to a fourth transistor of an opposite conductivity type; the base of the fourth transistor is connected to the power supply; the collector of the fourth transistor is connected to the base of the fourth transistor; and a sixth transistor of one conductivity type whose emitter is connected to the ground potential and whose collector is connected to the output terminal, and whose base is connected to the sixth transistor.
a seventh transistor of one conductivity type, the emitter of which is connected to the ground potential, and the collector of which is connected to the base of the transistor and the other end of the third resistor; an eighth transistor of one conductivity type, the emitter of which is connected to the switching terminal via the switching terminal and the collector of which is connected to the first node, and the base of which is connected to the switching terminal via the fifth resistor, and the emitter of which is connected to the ground potential; a ninth transistor of one conductivity type whose collector is connected to the base of the sixth transistor, and a first transistor whose base is connected to the base of the sixth transistor and whose emitter is connected to ground potential and whose collector forms an input circuit. 12. The transistor circuit according to claim 1, comprising: twelfth transistors of one conductivity type each connected to an emitter.