JPS60149276U - Television signal processing circuit - Google Patents

Television signal processing circuit

Info

Publication number
JPS60149276U
JPS60149276U JP3571084U JP3571084U JPS60149276U JP S60149276 U JPS60149276 U JP S60149276U JP 3571084 U JP3571084 U JP 3571084U JP 3571084 U JP3571084 U JP 3571084U JP S60149276 U JPS60149276 U JP S60149276U
Authority
JP
Japan
Prior art keywords
circuit
pulse
television signal
component
control signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3571084U
Other languages
Japanese (ja)
Inventor
恩田 哲朗
Original Assignee
株式会社東芝
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社東芝 filed Critical 株式会社東芝
Priority to JP3571084U priority Critical patent/JPS60149276U/en
Publication of JPS60149276U publication Critical patent/JPS60149276U/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のテレビジョン信号処理回路を示す回路図
、第2図は従来回路の動作を説明するた     。 めの各部動作波形図、第3図は本考案に係るテレビジョ
ン信号処理回路の構成を示す回路図、第4図は本考案の
動作を説明するための各部動作波形図、第5図は本考案
の具体的一実施例を示す回路図である。 ↓・・・集積回路、5・・・端子、7・・・第1の回路
(映像増幅回路)、9・・・制御電圧源、10・・・第
2の回路(同期分離回路)、11・・・第3の回路(マ
スキ  ゛ング回路)、18・・・利用回路。
FIG. 1 is a circuit diagram showing a conventional television signal processing circuit, and FIG. 2 is for explaining the operation of the conventional circuit. Figure 3 is a circuit diagram showing the configuration of the television signal processing circuit according to the present invention, Figure 4 is a waveform diagram of the operation of each part to explain the operation of the present invention, and Figure 5 is a diagram showing the operation waveforms of each part of the present invention. FIG. 2 is a circuit diagram showing a specific embodiment of the invention. ↓...Integrated circuit, 5...Terminal, 7...First circuit (video amplification circuit), 9...Control voltage source, 10...Second circuit (synchronous separation circuit), 11 ...Third circuit (masking circuit), 18... Utilization circuit.

Claims (2)

【実用新案登録請求の範囲】[Scope of utility model registration request] (1)映像期筒中に生じる絵柄信号成分と、映像ブラン
キング期間中に生じる同期信号成分とを持ったテレビジ
ョン信号を処理するための回路であって、 前記テレビジョン信号に含まれる絵柄信号成分を処理す
る第1の回路と、 この第1の回路に接続され、第1の回路に制御信号を供
給せしめる制御信号源と、 前記テレビジョン信号中の同期信号成分と周期を同じに
するパルス成分を前記ブランキング期間内において発生
する第2の回路と、2前記ブランキング期間と実質的に
一黙したキーイングパルスを用いて、このキーイングパ
ルスと前記第2の回路から得たパルス成分との論理積を
とったパルスを出力せしめる第3の回路。 と、 この第3の回路からの出力パルスを利用する利用手段と
を備え、 前記第1、第2、第3の回路を単一の集積回路内に構成
せしめ、前記第3の回路からの出力パルスを上記集積回
路外に取出すための端子を、前記制御信号源からの制御
信号を第2の回路へ供給せしめるための端子として共用
せしめて成るテレビジョン信号処理回路。
(1) A circuit for processing a television signal having a picture signal component occurring during a video period and a synchronization signal component occurring during a video blanking period, the picture signal component included in the television signal. a control signal source connected to the first circuit and configured to supply a control signal to the first circuit; and a pulse component having the same period as the synchronization signal component in the television signal. a second circuit that generates within the blanking period, and a keying pulse that is substantially silent with the blanking period, and a logic between the keying pulse and the pulse component obtained from the second circuit. A third circuit outputs a pulse obtained by taking the product. and utilization means for utilizing the output pulse from the third circuit, the first, second, and third circuits are configured in a single integrated circuit, and the output pulse from the third circuit is A television signal processing circuit comprising: a terminal for extracting pulses from the integrated circuit; and a terminal for supplying a control signal from the control signal source to a second circuit.
(2)前記利用手段は、前記端子に得られた出力パルス
の有無を検出し、出力パルスが所定の時間存在しなかっ
たときに電源をオフせしめる回路であることを特徴とす
る実用新案登録請求の範囲第1項に記載のテレビジョン
信号処理回路。
(2) A request for registration of a utility model characterized in that the utilization means is a circuit that detects the presence or absence of an output pulse obtained at the terminal and turns off the power when the output pulse is not present for a predetermined period of time. The television signal processing circuit according to item 1.
JP3571084U 1984-03-12 1984-03-12 Television signal processing circuit Pending JPS60149276U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3571084U JPS60149276U (en) 1984-03-12 1984-03-12 Television signal processing circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3571084U JPS60149276U (en) 1984-03-12 1984-03-12 Television signal processing circuit

Publications (1)

Publication Number Publication Date
JPS60149276U true JPS60149276U (en) 1985-10-03

Family

ID=30540235

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3571084U Pending JPS60149276U (en) 1984-03-12 1984-03-12 Television signal processing circuit

Country Status (1)

Country Link
JP (1) JPS60149276U (en)

Similar Documents

Publication Publication Date Title
JPS59182747U (en) interface circuit
JPS60149276U (en) Television signal processing circuit
JPS6031672U (en) Microcontroller frequency automatic discrimination circuit
JPS5914449U (en) Synchronous signal input circuit
JPS60160662U (en) pedestal clamp circuit
JPS5911567U (en) Muting circuit
JPS6055129U (en) Output circuit
JPS5986782U (en) Pseudo synchronous pulse correction device
JPS593612U (en) pulse width modulation circuit
JPS6040164U (en) Display clock generation circuit
JPS5911532U (en) frequency conversion circuit
JPS60167466U (en) Horizontal synchronization detection circuit
JPS60120499U (en) Variable duty ratio circuit for sound output circuit
JPS5956883U (en) Switching control signal generation circuit for input signal switching circuit in chroma circuit
JPS5870650U (en) relay control circuit
JPS60129722U (en) signal generation circuit
JPS60135091U (en) Inverter drive circuit
JPS5890720U (en) power amplifier for power supply
JPS6043024U (en) Square curve signal generation circuit
JPS60139376U (en) Vertical synchronization signal enhancement circuit
JPS6065951U (en) Relay drive circuit
JPS63187987A (en) Burst gate pulse forming circuit
JPS60189179U (en) signal generation circuit
JPS6057230U (en) Timer power supply voltage control circuit
JPS58123393U (en) electronic time switch