JPS60149249U - Pulse generation circuit - Google Patents

Pulse generation circuit

Info

Publication number
JPS60149249U
JPS60149249U JP3411384U JP3411384U JPS60149249U JP S60149249 U JPS60149249 U JP S60149249U JP 3411384 U JP3411384 U JP 3411384U JP 3411384 U JP3411384 U JP 3411384U JP S60149249 U JPS60149249 U JP S60149249U
Authority
JP
Japan
Prior art keywords
generation circuit
pulse generation
turned
output
capacitor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3411384U
Other languages
Japanese (ja)
Inventor
靖 竹内
梅津 昭英
Original Assignee
株式会社日立製作所
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社日立製作所 filed Critical 株式会社日立製作所
Priority to JP3411384U priority Critical patent/JPS60149249U/en
Publication of JPS60149249U publication Critical patent/JPS60149249U/en
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図及び第2図は従来のパルス発生回路のブロック図
及びその動作波形を示す図、第3図及び第4図は本考案
の一実施例のブロック図及びその動作波形を示す図であ
る、。 swl、sw2・・・スイッチ、C・・・コンデンサ、
D・・・ダイオード、r工〜r4・・・抵抗器、2・・
・コンパレータ、3・・・同期回路。 々
1 and 2 are block diagrams of a conventional pulse generating circuit and diagrams showing its operating waveforms, and FIGS. 3 and 4 are block diagrams of an embodiment of the present invention and diagrams showing its operating waveforms. ,. swl, sw2...switch, C...capacitor,
D...Diode, r-r4...Resistor, 2...
・Comparator, 3...Synchronous circuit. people

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 電源スィッチのオン時に予め設定された時定数でコンデ
ンサを充電することにより徐々に上昇する電圧を出力し
かつ電源スイツチオフ時には上記時定数より十分少さい
時点数でコンデンサを放電させてその出力を急速に低下
させるように構成した充放電回路と、電源スイツチオン
時点から上記充放電回路の出力電圧が予め設定された基
準値をこえる時点までの間にパルスを出力するパルス生
成回路とからなることを特徴とするパルス発生回路。
When the power switch is turned on, a voltage that gradually rises is output by charging the capacitor with a preset time constant, and when the power switch is turned off, the capacitor is discharged at a number of times sufficiently smaller than the above time constant to rapidly increase the output. and a pulse generation circuit that outputs pulses from the time when the power supply is turned on until the output voltage of the charge/discharge circuit exceeds a preset reference value. Pulse generation circuit.
JP3411384U 1984-03-12 1984-03-12 Pulse generation circuit Pending JPS60149249U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3411384U JPS60149249U (en) 1984-03-12 1984-03-12 Pulse generation circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3411384U JPS60149249U (en) 1984-03-12 1984-03-12 Pulse generation circuit

Publications (1)

Publication Number Publication Date
JPS60149249U true JPS60149249U (en) 1985-10-03

Family

ID=30537181

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3411384U Pending JPS60149249U (en) 1984-03-12 1984-03-12 Pulse generation circuit

Country Status (1)

Country Link
JP (1) JPS60149249U (en)

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