JPH0262837U - - Google Patents

Info

Publication number
JPH0262837U
JPH0262837U JP14137888U JP14137888U JPH0262837U JP H0262837 U JPH0262837 U JP H0262837U JP 14137888 U JP14137888 U JP 14137888U JP 14137888 U JP14137888 U JP 14137888U JP H0262837 U JPH0262837 U JP H0262837U
Authority
JP
Japan
Prior art keywords
power storage
storage means
response
charge circuit
analog
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14137888U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP14137888U priority Critical patent/JPH0262837U/ja
Publication of JPH0262837U publication Critical patent/JPH0262837U/ja
Pending legal-status Critical Current

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  • Measurement Of Current Or Voltage (AREA)
  • Analogue/Digital Conversion (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の原理を示すブロツク図であり
、第2図は本考案の一実施例を示す回路図であり
、第3図は第2図の動作を示すタイムチヤートで
あり、第4図は従来のアナログ信号のピーク値を
デジタル信号に変換する装置を示すブロツク図で
あり、第5図はA/D変換器4の構成を示すブロ
ツク図である。 図中、1:比較器、2:チヤージ回路、3:計
数手段、C:コンデンサ。
FIG. 1 is a block diagram showing the principle of the present invention, FIG. 2 is a circuit diagram showing an embodiment of the present invention, FIG. 3 is a time chart showing the operation of FIG. 2, and FIG. The figure is a block diagram showing a conventional device for converting the peak value of an analog signal into a digital signal, and FIG. 5 is a block diagram showing the configuration of the A/D converter 4. As shown in FIG. In the figure, 1: comparator, 2: charge circuit, 3: counting means, C: capacitor.

Claims (1)

【実用新案登録請求の範囲】 アナログ電圧のピーク値をデジタル値に変換す
るアナログ/デジタル変換器であつて、 蓄電手段と、 アナログ電圧と該蓄電手段に蓄電された電圧と
を比較する比較手段と、 比較手段の出力に応答して蓄電手段を所定電流
で充電または放電するチヤージ回路と、 該チヤージ回路の充電または放電動作に応答し
て計数を行う計数手段とからなることを特徴とす
るアナログ/デジタル変換器。
[Scope of Claim for Utility Model Registration] An analog/digital converter that converts the peak value of an analog voltage into a digital value, comprising: power storage means; and comparison means to compare the analog voltage and the voltage stored in the power storage means. , a charge circuit that charges or discharges the power storage means with a predetermined current in response to the output of the comparison means, and a counting means that performs counting in response to the charging or discharging operation of the charge circuit. Digital converter.
JP14137888U 1988-10-28 1988-10-28 Pending JPH0262837U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14137888U JPH0262837U (en) 1988-10-28 1988-10-28

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14137888U JPH0262837U (en) 1988-10-28 1988-10-28

Publications (1)

Publication Number Publication Date
JPH0262837U true JPH0262837U (en) 1990-05-10

Family

ID=31406381

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14137888U Pending JPH0262837U (en) 1988-10-28 1988-10-28

Country Status (1)

Country Link
JP (1) JPH0262837U (en)

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