JPS6014592B2 - Induction motor control device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a control device for an induction motor, and more particularly to a digital slip control device for an induction motor.

FIG. 1 shows an example of a conventional control device for an induction motor. In the figure, 1 is a forward converter to which an input from an AC power source is supplied, and 3 is a forward converter to which an output from the forward converter 1 is supplied via a DC reactor 2. 4 is an induction motor to which the output of the inverter 3 is supplied, and 5 is a speed detector for detecting the rotational speed of the induction motor. (abbreviated as P.P.)
is used.

6 is a frequency-voltage converter (hereinafter referred to as F/V converter) to which the speed detection pulse which is the output of the speed detector 5 is supplied.
, 7 is a matching circuit that matches the output of the F/V converter 6 and the speed setting signal and supplies the deviation signal to the slip amplifier 8, and 9 is the output of the F/V converter 6 and the slip amplifier. 8
The voltage-to-frequency converter (hereinafter referred to as V/F
1 is an absolute value conversion circuit that takes the absolute value of the slip frequency signal that is the output of the slip amplifier 8, and 12 is an addition circuit that supplies the current command signal from the absolute value conversion circuit 11. 13 is a gate circuit that controls the thyristor gate of the forward converter 1 based on the output of the current control amplifier 12; 14 is a frequency dividing circuit that divides the output of the V/F converter 10; 15 is a frequency dividing circuit; 15 is a gate circuit having a ring counter, the output of the frequency dividing circuit 14 is supplied to this ring counter, and the gate circuit 15 controls the thyristor of the inverter 3 based on the output of the frequency dividing circuit 14. controlling the gate.

With this configuration, since the circuit portion corresponding to block A is also an analog circuit, there is a drift in the F/V converter 6 and the V/F converter 10. Therefore, although the output of the speed detector 5 is converted into an analog signal by the F/V inverter 6, if an error of, for example, 10.1%/10 qo occurs, the yielding motor speed is changed to 0.1% by the automatic speed adjustment loop. Increase by 1%. That is, although the absolute value of the output of the speed detector 5 does not change, the inverter frequency increases by 0.1%.
This is because the output of the slip amplifier 8 has increased by 0.1%, but the rated value of this output is, for example, for a conductive motor with a slip of 1%, the frequency is only 1%, so it is 0.1%.
corresponds to 10% of the rating. However, since the output of the slip amplifier is a current command, when the above-mentioned drift occurs, the current is increased by 10% of the rated value, but in order to flow this current, it is necessary to In some cases, voltage fluctuations of 10% to 100% may occur, making operation impossible. When the drift force becomes larger than the slip frequency in this way, depending on the operating state, the voltage fluctuations are so severe that a state may arise where the operation cannot be continued. The present invention aims to solve these conventional problems.
This will be explained in detail below using examples.

FIG. 2 shows an embodiment of the control device for an induction motor according to the present invention, and the same reference numerals are used for the same components as those in FIG. 1 or those having the same functions.

In the figure, reference numeral 21 denotes a matching circuit to which the speed detection pulse signal from the speed detector 5 and the output of the frequency divider 22 are supplied, and this matching circuit 21 transfers the deviation signal to the phase difference detection circuit. 23, the signal is supplied to a voltage controlled oscillator 25 via a low-pass filter 24. Here, phase difference detection circuit 2
3, the low-pass filter 24, the voltage controlled oscillator 25, and the frequency divider 22 constitute a phase-locked loop D. Voltage controlled oscillator 25 provides an output to frequency divider 22 and first synchronous circuit 26 . 27 is a reference oscillator, 28 is a frequency divider that divides the output of the reference oscillator 27, and the synchronous circuit 26 operates the voltage controlled oscillator 25 based on the output of the frequency divider 28.
The output f is synchronized with the second synchronization circuit 31, and the output f
x is supplied to one input terminal of the OR circuit 29 as V.

Further, 30 is a voltage-controlled oscillator to which the output of the absolute value converter 11 is supplied, and 31 is a voltage-controlled oscillator that synchronizes the output of the voltage-controlled oscillator 30 with the first synchronization circuit 26 based on the output of the frequency dividing circuit 28 and ANDs the output. V is supplied to the circuit 32. 33 is a zero cross comparator to which the output of the slip amplifier 8 is supplied, and when the input to the zero cross comparator 33 is positive, it sends out a "theoretical" output, and when it is positive, it sends out a theoretical "0" output. The signal is supplied to the other input terminal of the AND circuit 32 via the NOT circuits 34 and 35.

The output fs of the AND circuit 32 is supplied to the OR circuit 29, and the output of the OR circuit 29 is supplied to the up (UP) side terminal of the up/down counter 36. Further, 37 is an AND circuit, and this AND circuit 37 includes a NOT circuit 34.
and the output of the synchronization circuit 31 are supplied, and the AND output fs2 is the down (
DOWN) side terminal. The output of the up/down counter 36 is supplied to the ring counter of the gate circuit 15, and the gate circuit 15 controls the thyristor gate of the inverter 3 based on the output of the up/down counter 36. The digital circuit section of block B includes a phase lock repeater D, a reference oscillator 27, a frequency divider 28, a first synchronous circuit 26, a second synchronous circuit 31, and a voltage controlled oscillator 3.
It is composed of a 0 and zero cross comparator 33, a switching circuit C, and an up/down counter 36. Here, the switching circuit C is composed of AND circuits 32 and 37, NOT circuits 34 and 35, and an OR circuit 29. With this configuration, when the output of the slip amplifier 8 is negative, the output of the zero cross comparator 33 becomes logic "1", and the AND circuit 3
2 is opened, and the pulse train output of the synchronous circuit 31 is combined and added to the up-side terminal of the up-down counter 36 via the OR circuit 29.

Further, when the output of the slip amplifier 8 is positive, the output of the plexus cross comparator 33 becomes logic "0", and the AND circuit 37
The pulse train output of the synchronous circuit 31 is supplied to the down side terminal of the up/down counter 36 and subtracted. On the other hand, the pulse train output fx from the synchronous circuit 26 to the induction motor 4 is sent to the up/down counter 3 via the OR circuit 29.
It is added to the up side terminal of 6. The addition/subtraction output of the up/down counter 36 is supplied to the ring counter of the gate circuit 15, and the gate circuit 15
The thyristor gate of the inverter 3 is controlled based on the output of the inverter 3. In the present invention, conventional block A in FIG.
The analog circuit section corresponding to block B in FIG.
By replacing the block B with a digital circuit section as shown in FIG. 1, since an F/V converter and a V/F converter are not used in the block B as in the conventional case, drift can be reduced to zero.

Therefore, there is no possibility that the above-mentioned inconvenience will occur. The present invention is not limited to this embodiment, and various applications and modifications are possible.

As described above, if the control device for a transfer motor according to the present invention is used, the following various effects can be achieved.

'1l Since no F/V converter or V/F converter is used in the digital circuit section, drift can occur. '21
Since the drift of the digital circuit section can be reduced to zero, there is no fluctuation in the output voltage that occurs in the analog case, and the control system does not become unstable, making it possible to stably control the speed of the induction motor.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an example of a conventional control device for an induction motor, and FIG. 2 is a block diagram showing an embodiment of a control device for an induction crab motor according to the present invention. 2 is a DC reactor, 3 is an inverter, 4 is an induction motor, 5
is a speed detector, 6 is an F/V converter, 7 is a matching circuit,
8 is a slip amplifier, 11 is an absolute value converter, 12 is a current control amplifier, 13 and 15 are gate circuits, 30 is a voltage control amplifier, 26 is a first synchronous circuit, 31 is a second synchronous circuit,
33 is a koto cross comparator, 36 is an up/down counter, B is a digital circuit section, C is a switching circuit, and D is a phase-locked loop. Figure 1 Figure 2

Claims (1)

[Claims] 1. In a device that controls an induction motor by converting AC power input into DC using a forward converter and supplying the converted DC to an inverter and supplying a desired AC output to the induction motor, the control unit of the inverter is configured to detect the speed of the induction motor. A frequency-voltage converter that converts a signal into a voltage signal, a speed setting signal, and this frequency.
A matching circuit that matches the output of a voltage converter and sends out a deviation signal, a slip amplifier to which the output of this matching circuit is supplied, and an absolute value converter that takes the absolute value of the output of this slip amplifier. a phase-lock loop to which the speed detection signal is supplied, and a first synchronous circuit to which the output of the phase-lock loop is supplied and sends out the output in synchronization with the second synchronous circuit described below. a comparator that compares the output of the slip amplifier with a reference value and sends out an output; a voltage controlled oscillator to which the output of the absolute value converter is supplied; a second synchronous circuit that outputs an output in synchronization with the synchronous circuit; an up-down counter that controls an ignition circuit that controls the inverter; and an up-down counter that controls the output of the second synchronous circuit based on the output of the comparator. A digital circuit unit having a switching circuit that inputs the input to a down counter and performs addition/subtraction, and inputs the output of the first synchronous circuit to an up-side terminal of the up-down counter for addition. Control device for induction motor.