JPS6014443A - Annealing method of semiconductor wafer - Google Patents

Abstract

PURPOSE:To activate a selective ion implantation layer as a metal having no heat resistance such as Al is left as it adheres by forming a film having specific relative permittivity and thickness on the ion implantation layer and annealing the film. CONSTITUTION:A film, relative permittivity thereof is 120pi/Zl and thickness thereof is lambda/4, is formed on the surface of a GaAs substrate 11. When planar electromagnetic waves 16 are projected, the energy of electromagnetic waves is transmitted efficiently over the lower section of the film 14, and an n<+> region 13 is heated and activated. Since the impedance of a section on which the film 14 is not attached is extremely low, impedance mismatching between said section and 120piOMEGA spatial impedance is large, the greater part of incident energy are reflected, and the temperatures of a gate metal 15 and the substrate surface 18 slightly rise. Zl represents the electromagnetic wave impedance of a semiconductor to which ions are implanted selectively and lambda a wavelength. The film 14 is effective when its relative permittivity epsilonr is kept within a range of the formula, and thickness may also be effective when it satisfies the formula of (2n+1)lambda/ 4(n=0,1...) without being limited to lambda/4.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention is a 13" method of annealing semiconductor wafers.

In recent years, research and development has been actively conducted on disk IJ-FETs, digital integrated circuits, and analog integrated circuits using compound semiconductors such as GaAs. This platform is connected to a Schottky barrier gate field effect transistor (RlEESFE), which is normally used as an active element.
The gate-source parasitic resistance and goo possessed by T)
-Reducing drain parasitic resistance is one of the important research topics. There are several approaches to reduce this parasitic resistance, but in general, the manufacturing process is relatively easy, and n"Fv, 1 is ion-implanted using a heat-resistant gate gold film as a mask using a self-alignment line. This method is widely used. In this method, after ion-implanting the n+ layer, it is necessary to perform annealing at a high temperature of around 800° C. with the gate metal attached to activate the ion-implanted layer. Therefore, heat resistance is required for full gate bending, and 1.TxW + TxW silicide, WAd,
W etc. (7) Endurance? A metal is used as the gate metal. However, there is a problem in that the FA resistance fJ= of these metals is not necessarily sufficient. Furthermore, these so-called heat-resistant metals have a problem in that they have higher resistance and lower reliability than Al, which is widely used as a gate metal (Al has no heat resistance).

The purpose of the present invention is to solve the above problems and to improve 1Ii by Ai.
1. An object of the present invention is to provide a method for annealing a semiconductor wafer, which can activate an ion-implanted layer even when a non-thermal metal is attached.

That is, in the present invention, when annealing the selective ion implantation layer using monochromatic light, the j: selective ion injection 120 (electromagnetic wave impedance), relative permittivity ε and thickness μ”Uλ (where n=0 +
112-..., λ. (where z7 is the electromagnetic wave impedance of the semiconductor into which selective ions are implanted) ) 13'l constant ε1° thickness 2n"l) 2. (However, n=0, 1, 2,
..., λ. is the wavelength) and the first film has an arbitrary dielectric constant and a thickness of 2° (n=o, i
12 +-) is provided, and furthermore, only the above-mentioned ts2 film is provided in a portion other than the selective ion implantation layer.

Embodiments of the present invention will be described in detail below with reference to the drawings.

1 and 2 are detailed illustrations of the present invention. In FIG. 1, media 1, 2.degree. 3, each having an electromagnetic wave impedance of Z0+Z+ZJ, are arranged in contact with each other. The thickness of medium 2 is medium 1f!
It is 1/4 of the wavelength of the electromagnetic wave incident from 8. −
In the power tube 2 diagram, the electromagnetic wave impedance is 2o,
2,2. The media 6, 7.8 are arranged in contact with each other. The thickness of the medium 2 is 1/2 of the incident wavelength. In Figure 1, the interface 4 to F7 between media 1 and 2;
′ can be expressed as . However, l(・S is the length of medium 2, λ is the length of medium 2
It is a medium wavelength. As is clear from equation (1), IJ==
becomes. If the relationship Zo=Zl(3), that is, 2=to1(4) holds, and so-called impedance matching occurs, all the energy incident on medium 1 will be transferred to medium 3.
transmitted. The relative permittivity of medium 2 is ε1,]j[the permittivity of air is ε. , the relative magnetic permeability of medium 2 is μm, and the magnetic permeability in vacuum is μ. Then, it becomes . μm) Ohdori'''8↑M1.In equation (4), if Zo is the electric 17''-FLi'-impedance in vacuum, then (4) e (5), (
It can be seen that impedance matching occurs when Equation G) is obtained.

The impedance Z'' when looking at the magnetic material 2 side from 9 is Z'=Z,
(Fl) becomes. In this case, impedance matching (no fuss).

Reflection on the ascending plane 9 F The electromagnetic waves are reflected towards the light source.

FIG. 3 is a diagram showing a first embodiment of the present invention.

In the figure, a GaAs substrate 11 has an n-layer 12 activated in advance by ion implantation. Sunda GaA31
There are 4 and 10. In the G a A e substrate 11 of small size, there is an n0 region in which gate gold J'=315 k is implanted throughout the film 14 as a mask. GaAs substrate 11
Planar electromagnetic waves 16 from a light source of monochromatic light are incident 17 on the surface.

The energy of electromagnetic waves is efficiently transmitted to the lower part of the film 14, heating the n+ region and activating the n+ region. On the other hand, since the impedance of the portion where the film 14 is not attached, that is, the gate metal 15 and the GaAs substrate surface 18 is very low, the substrate surface 18 and the spatial impedance 120π
Ω is large, most of the incident energy is reflected, and the gate metal 15 and G
The temperature of the aAs substrate surface 18 does not rise much.

FIG. 4 is a diagram showing a second embodiment of the present invention.

In the figure, a GaAs substrate 21 has an n-layer 22 that has been ion-implanted and activated in advance. A GaAs-based film 24 is also provided. Further, there is a male region in the GaAs substrate 21 into which ions are implanted using the gate metal 25 as a mask. A second film 29 having a thickness of λ/2 is attached to cover the entire film 24 and gate metal 25. Second
As explained in the figure, the impedance seen through the λ/2 thick dragon is equal to the impedance seen without tracing the membrane. Therefore, the first Ji',! Since the impedance matching condition is satisfied in the part where 2zi is attached even if there is a second film 29 thereon, the electromagnetic wave energy is absorbed 27 with an efficiency of <n''I5.On the other hand, the first 715τ24 The impedance of the gate metal 25 and the GaAs surface 30, which are not attached, is only the second film 29 and has a very low impedance, but even when viewed through the second film 29, the impedance is very low. Since most of the electromagnetic wave energy is reflected 28 on the surface of the second film 29 and returns to the light source side, the temperature rise in the gate metal 25 portion is extremely small.

In addition, in the embodiment shown in FIG. 813 and FIG.
This is also clear from equation (1).

As described above, according to the present invention, since the electromagnetic wave energy emitted from the light source can be efficiently absorbed only by the 7i7'XA selective ion implantation layer, there is an advantage that the energy emitted from the light source can be small. Further, according to the present invention, the electromagnetic wave energy emitted from the light source is efficiently absorbed only in the selective ion implantation layer, and the 1a magnetic wave energy is transferred to the semi-grooved wafer such as the gate metal in a portion other than the selective ion implantation layer. It can be reflected back to the light source before it reaches the component, and therefore] = Selective ion implantation 1. The 69 degree rise in other parts is small, and even if the gate metal, which is not heat resistant, is left exposed, the ions can be absorbed. This has the effect of annealing the injection layer.

[Brief explanation of drawings]

FIGS. 1 and 20 are illustrations of the principles of the invention, and FIGS. 3 and 4 are illustrations of a semi-quadruple wafer, respectively, illustrating an embodiment of the invention. It is a front view. 1.6, 7, and 3.8 are the electromagnetic wave impedances 2. ．．
2°Z, medium, 11.21 is QaAs substrate, 14,2
4, 29 are n-layer electric films, 12.22 are n-layers, 13.2
3 is an n layer, 15.25 is a gate metal, and 16 and 2G are illuminated with monochromatic light. Patent applicant: NEC Corporation

Claims (2)

[Claims] (1) On the 'T7d selective ion implantation report for semiconductor wafers, it is expressed in terms of the electromagnetic wave impedance of the semiconductor).
. (2) The electromagnetic wave impedance of one conductor on the selective ion implantation layer of the semiconductor wafer is expressed by the relationship (λ is the wavelength).
A second film having an arbitrary dielectric constant and a thickness of λ(n-0+1+2'...) is provided on the first film, and a second film other than the selective ion implantation layer is provided. A method of annealing half three-body wafers in which the selective ion implantation chamber is annealed by providing only the second film in the area above and irradiating the upper part with electromagnetic energy emitted from a monochromatic light source. .