JPS60140412A - Memory backup circuit - Google Patents

Abstract

PURPOSE:To eliminate the cause of malfunction of a memory by providing a large capacitance capacitor in parallel with a small power backup battery for long service life so as to reduce the battery load at backup. CONSTITUTION:An external power supply is connected to an external power supply terminal 1 and applied to a memory IC9 via diodes D1, D2. The backup battery (e.g., lithium battery) 6 is connected to the memory IC9 via a diode D3 and the circuit is constituted heat the power is supplied from the battery 6 when the external power is failed. In this case, the large capacitance capacitor 3 is provided in parallel with the battery 6 between the diodes D1 and D2. Thus, if the external power is stopped, the power failure processing of the IC9 or the like is performed by a voltage charged in the capacitor 3.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a memory backup circuit applied to memory cards and the like.

[Background technology]

2. Description of the Related Art Conventionally, many memory backup circuits have been known which switch from an external power supply to a backup battery for reading and writing to a memory, that is, for maintaining the operating state of the memory, thereby maintaining the memory in a data holding state.

This conventional memory backup circuit connects a rectifier diode and a rush current prevention diode in parallel to an external power supply, and connects a rectifier diode and a rush current prevention diode in the forward direction to the rush current prevention diode, and further in parallel to the external power supply. It was configured with a backup battery.

For example, if the operating voltage of a memory IC is 4.5V, a memory backup battery that is rated to maintain 4.5V is used.

However, in recent years, it has become necessary to back up batteries for long periods of time, which has required backup batteries to have low voltage.

For this reason, 3V lithium batteries, for example, have come to be used as long-life memory backup batteries.
This long-life memory backup battery has the drawback that it is difficult to draw a large current, and when a large load is temporarily applied during backup, the battery voltage drops below the memory backup guaranteed voltage.

Furthermore, if the power supply voltage suddenly stops during memory read/write operations without sufficient time to shut off the memory, there is a risk that the previous data will be erased.

That is, it was not possible to supply 4.5V (memory operating voltage), which must be maintained, while performing power outage processing such as holding read and written contents and transitioning to a data holding state.

[Purpose of the invention]

The present invention has been made in view of the drawbacks of the conventional examples, and an object of the present invention is to provide a highly reliable memory backup circuit with excellent load characteristics in a circuit using a long-life memory backup battery. .

[Summary of the invention]

To this end, the present invention has a backup power supply circuit configuration in which a long-life, low-power backup battery and a large-capacity capacitor equivalent to the short-life, high-power battery are connected in parallel to an external power source. .

〔Example〕

The following five embodiments of the present invention will be explained based on illustrated embodiments.

FIG. 1 shows a memory backup circuit according to an embodiment of the present invention.

In the figure, ■ is an external power supply terminal, from which external power is applied, and diode 2 (Dl), diode 4 (
D: From external circuit output terminal 7 to memory IC 9 through
is applied to Diode 5 (
A backup battery (for example, a lithium battery) 6 is connected in series with the diode D in the forward direction.
will be established.

Therefore, the diode D3 serves to prevent the external power source from flowing into the backup battery 6.

In the present invention, between the diodes D1 and DZ,
A large capacity capacitor 3 is provided in parallel with the backup battery 6. The capacitance of this capacitor 3 is approximately 0, about IF.

Further, the voltage of the backup battery 6 is about 3. Note that 8 is a GND (ground) terminal.

As is clear from the figure, the charging energy for this large-capacity capacitor 3 is supplied from an external power source, and the batteries 61) are not charged (in this case, D2 functions to prevent rush current). . Therefore, the backup battery 6 is prevented from being exhausted.

Next, the operation of the memory backup circuit configured in this manner will be explained.

First, during operation (reading and writing), the memory IC 9 receives an external power supply (4,5 V) from the external power input terminal 1.
(more than nine) held by nine.

In the data retention state, the data is backed up by the backup battery 6 and its contents are retained. That is, for example, with a 3-inch lithium battery, 2.
It supplies a lower limit voltage that can bring about 2.2 cm of backup memory into a data retention state.

By the way, the first function of the large capacity capacitor 3 is to prolong the power outage processing time in the event of a sudden stop of the external power supply.

That is, immediately after the external power supply suddenly stops, the large-capacity capacitor 3 is charged with, for example, 5V, which is equivalent to the external power supply, and this gradually decreases until, for example, 4.5V is the operating lower limit voltage of the memory TC9. It reaches 4.5v. However, naturally, a predetermined time period with one time constant will elapse during this time.

During this time, other parts of the circuit (not shown) can perform power outage processing, that is, retain the contents of the previously read and written data, and transition to a data retention state.

After this, the voltage value of large capacitor 3 becomes 4.5.
When the voltage drops below v, the memory stops, and when the voltage drops further below 3cm, it is switched to the backup battery 6, and the data retention state of the memory is maintained from then on.

Next, the function of the large capacity capacitor 3 is to eliminate the influence of load fluctuations in the data retention state.

That is, in one aspect of the present invention, the backup battery 6 that is a premise is one with a long life, and therefore has a low power consumption (for example, a 3V lithium battery).

As a result, there is a drawback that a large current cannot be extracted instantaneously due to the influence of internal resistance and the like.

However, a large load may drop during the data retention state, and a large current may be temporarily required.

Although the capacitor 3 has a large capacity, a large current can be taken out instantaneously, and in the end, this large-capacity capacitor 3 does not compensate for this, and a large current can be taken out from the external circuit output terminal 7.

Therefore, from this point of view, the large capacity capacitor 3 can be said to be equivalent to a high power battery, although it has a short lifespan.

In other words, the short life, high power battery 3 is provided in the circuit in parallel with the long life, low power backup battery 6, and this battery 3 compensates for the shortcomings in the battery characteristics.

FIG. 2 is a simplified front view showing a unitized version of this backup circuit, in which a circuit section 1o consisting of a backup battery 6, a large-capacity capacitor 3, and diodes D1, D3, and D a is laminated in order from the bottom. G from left to right
ND terminal8. External power input terminal 1, external circuit output terminal 7
is set up standing up.

〔Effect of the invention〕

As described above, in the present invention, a large-capacity capacitor is provided in parallel with a low-power backup battery for long life, so that the load applied to the battery during backup is reduced. Furthermore, when switching to the backup power source, the voltage supplied to the load side changes slowly, eliminating the cause of memory malfunction.

Also, for a 2.2V < IC, as a battery,
Since the nickel cadmira 11 battery is 1.2y,
Two of these are enough. Therefore, the conventional four used to pull up to 4.5V can be reduced to two, making the size smaller and reducing costs.

[Brief explanation of the drawing]

FIG. 1 is a backup memory circuit diagram according to an embodiment of the present invention, and FIG. 2 is a schematic front view of the unit. 2.4.5...Diode, 3...Large capacity capacitor, 6...Backup battery. Agent Patent Attorney Takeshi Junji Department (1 person) Figure 1 Figure 2

Claims (1)

[Claims] A rectifier diode and a rush current prevention diode are connected in parallel to the external power supply, and a backup battery is provided in the forward direction of the rush current prevention diode and parallel to the external power supply. A memory backup circuit characterized in that the backup battery has a rated value lower than the guaranteed operating voltage of the IC, and furthermore, a large capacity capacitor is provided in parallel with the backup battery between the backup battery and an external power source.