WO2019218882A1 - Super-capacitor application circuit of replaceable battery type smart electric energy meter power supply - Google Patents

Super-capacitor application circuit of replaceable battery type smart electric energy meter power supply Download PDF

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Publication number
WO2019218882A1
WO2019218882A1 PCT/CN2019/085600 CN2019085600W WO2019218882A1 WO 2019218882 A1 WO2019218882 A1 WO 2019218882A1 CN 2019085600 W CN2019085600 W CN 2019085600W WO 2019218882 A1 WO2019218882 A1 WO 2019218882A1
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Prior art keywords
resistor
capacitor
energy meter
diode
circuit
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PCT/CN2019/085600
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French (fr)
Chinese (zh)
Inventor
石荣
吴红英
徐振伟
李香
郎干勇
朱高凯
潘建华
刘静
杨永广
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扬州万泰电子科技有限公司
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Publication of WO2019218882A1 publication Critical patent/WO2019218882A1/en

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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02JCIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J9/00Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting
    • H02J9/04Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting in which the distribution system is disconnected from the normal source and connected to a standby source
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02JCIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/34Parallel operation in networks using both storage and other dc sources, e.g. providing buffering
    • H02J7/345Parallel operation in networks using both storage and other dc sources, e.g. providing buffering using capacitors as storage or buffering devices
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/30Systems integrating technologies related to power network operation and communication or information technologies for improving the carbon footprint of the management of residential or tertiary loads, i.e. smart grids as climate change mitigation technology in the buildings sector, including also the last stages of power distribution and the control, monitoring or operating management systems at local level
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y04INFORMATION OR COMMUNICATION TECHNOLOGIES HAVING AN IMPACT ON OTHER TECHNOLOGY AREAS
    • Y04SSYSTEMS INTEGRATING TECHNOLOGIES RELATED TO POWER NETWORK OPERATION, COMMUNICATION OR INFORMATION TECHNOLOGIES FOR IMPROVING THE ELECTRICAL POWER GENERATION, TRANSMISSION, DISTRIBUTION, MANAGEMENT OR USAGE, i.e. SMART GRIDS
    • Y04S20/00Management or operation of end-user stationary applications or the last stages of power distribution; Controlling, monitoring or operating thereof
    • Y04S20/20End-user application control systems

Definitions

  • the invention relates to a smart electric energy meter, in particular to a super capacitor application circuit of a battery replaceable smart electric energy meter power supply.
  • the timing function of the smart energy meter is very important, which will affect important functions such as billing and event recording. It is required that the clock module must work normally even in the event of power failure. For this reason, a lithium battery is used as a clock backup power source inside the smart energy meter to ensure The clock module works normally during a power outage. However, lithium batteries have a passivation effect for a long time, which shortens the battery life, so it needs to be replaced after a period of use. However, the original smart energy meter clock battery is soldered to the power meter circuit board, so the replacement is inconvenient, and the replacement battery must be in the power-off state.
  • the State Grid Metrology Center has taken the lead in formulating the technical requirements of the battery replaceable smart energy meter, which not only improves the battery installation structure for battery replacement, but also ensures battery replacement.
  • the clock module it is required to install a super capacitor in the electric energy meter, and in June 2016, it was publicized to the electric energy meter manufacturer. It is required that when the power meter is powered off and the battery is under voltage, the super capacitor only supplies power to the clock and keeps the clock clocked correctly for at least 2 days.
  • the detection process of the State Grid Metrology Center is: after the electric energy meter is loaded for 10 minutes under the reference voltage condition, the electric energy meter clock is compared with the standard time, and then the clock battery is taken out and the electric energy meter is powered off, and the ambient temperature is -40 ° C. , let stand for 2 days. Put the clock battery back into the battery compartment of the energy meter, power on the energy meter, and the error between the power meter clock and the standard time should not exceed 5s. Repeat the above operation with the same smart energy meter at an ambient temperature of 70 ° C and meet the same requirements.
  • the supercapacitor charging and discharging circuit is simple, and there is no need for a charging circuit like a rechargeable battery. Therefore, the clock standby power supply in the battery replaceable electric energy meter is generally realized by a series circuit in which a super capacitor and a charging and discharging resistor are externally connected to the power output end.
  • the advantage of using this method is that the circuit is simple to implement, but the disadvantages are:
  • the supercapacitor Since the electric energy meter is required to be de-energized after being loaded for a certain period of time under the reference voltage condition during the detection, the supercapacitor must be fully charged during this period, which requires that the charging resistor must be as much as possible under the premise of the supercapacitor. Small to speed up charging, and a big advantage of supercapacitors over lithium batteries is that they allow large currents to be charged and discharged without damage. However, since the charging resistor and the discharging resistor are the same resistor, this causes the discharging speed to be fast, so that the super capacitor holding time is reduced.
  • the present invention is directed to the above problem, and provides a super capacitor application circuit of a battery replaceable smart energy meter power supply with low power consumption and long super capacitor maintenance time.
  • the technical solution of the present invention comprises: a transformer T1, a rectifying circuit, a voltage stabilizing circuit and a sampling circuit; and a double super capacitor clock standby power supply circuit;
  • the dual super capacitor clock backup power supply circuit comprises a clock chip, an electric energy meter processing unit, an anti-reverse diode D5, a super capacitor C6 and a charging and discharging resistor R6;
  • the clock chip includes a main power terminal Vcc2, a backup power terminal Vcc1, a chip select signal terminal CE, a data signal terminal I/O, and a communication clock signal SCLK;
  • the main power terminal Vcc2 is connected to a voltage stabilizing circuit, and the backup power terminal Vcc1 is connected to the anode of the anti-reverse diode D5, and the chip select signal terminal CE, the data signal terminal I/O and the communication clock signal SCLK are respectively connected to corresponding ends of the electric energy meter processing unit;
  • the charging and discharging resistor R6 is connected in parallel with the sampling circuit, and is respectively connected to the negative electrode of the anti-reverse diode D5;
  • An input end of the super capacitor C6 is connected to an output end of the charging and discharging resistor R6, and an output end of the super capacitor C6 is grounded.
  • the clock chip uses a DS1302 low power clock chip.
  • the rectifier circuit includes a rectifier V1, a capacitor C1 and a capacitor C2;
  • the primary input end of the transformer T1 is connected to 220V mains; the input end of the rectifier V1 is connected to the secondary output end of the transformer T1;
  • the capacitor C1 and the capacitor C2 are connected in parallel, and the input ends thereof are respectively connected to the third pin of the rectifier V1, and the output ends thereof are respectively grounded.
  • the voltage stabilizing circuit comprises a three-terminal regulator U1, a common anode double diode D1, a common anode double diode D2, a capacitor C3, a resistor R1 and a super capacitor C4;
  • the first pin of the three-terminal regulator U1 is connected to the output end of the rectifier V1, and the second pin of the three-terminal regulator U1 is connected to the input end of the common anode double diode D1, the common anode double diode The output of D1 is grounded;
  • the common anode double diode D2 and the capacitor C3 are connected in parallel;
  • the positive input terminal of the capacitor C3 is connected to the third pin of the three-terminal regulator U1, and the negative output terminal of the capacitor C3 is grounded;
  • the third pin of the common anode dual diode D2 is connected to the third pin of the three-terminal regulator U1;
  • the resistor R1 and the super capacitor C4 are connected in series, the input end of the resistor R1 is connected to the first pin of the common anode dual diode D2, and the output end of the super capacitor C4 is grounded.
  • the input end of the capacitor C1 is provided with a detection circuit
  • the detecting circuit includes a resistor R4 and a resistor R5; an input end of the resistor R4 is connected to a second pin of the common anode double diode D2; an input end of the resistor R5 is connected to an output end of the resistor R4, The output of the resistor R5 is grounded;
  • the electric energy meter processing unit is connected between the resistor R4 and the resistor R5.
  • the sampling circuit comprises a common cathode double diode D3, a diode D4, a clock battery, a resistor R2, a resistor R3 and a capacitor C5;
  • a first pin of the common cathode dual diode D3 is connected to a first pin of the common anode dual diode D2, and a third pin of the common cathode double diode D3 is connected to an electric energy meter processing unit, the diode D4
  • the negative output terminal is also connected to the electric energy meter processing unit, and the input end of the diode D4 is connected to a voltage of 5.7V;
  • One end of the resistor R3 is connected to the positive pole of the battery, and the other end is connected to the electric energy meter processing unit; one end of the capacitor C5 is connected to the electric energy meter processing unit, and the other end is grounded; one end of the resistor R2 is connected to the electric energy meter processing unit. The other end is grounded; the negative pole of the battery is grounded; the second pin of the common cathode dual diode D3 is connected between the resistor R3 and the battery.
  • a dual super capacitor clock backup power supply circuit is employed.
  • a circuit as shown in FIG. 1 is added between the power supply V B and the one end of the common cathode double diode D3.
  • the circuit is composed of a clock chip DS1302, a power meter processing unit, an anti-reverse diode D5, a super capacitor C6, and a charge and discharge resistor R6.
  • the V DC power supply in FIG. 2 is divided by the resistors R4 and R5 and sent to the power meter processing unit for detection to determine whether the power meter is powered off.
  • the circuit has the following characteristics: (1) Since the DS1302 is a general-purpose, inexpensive clock chip, and the number of electric energy meters is large, it is more than 100,000, so the price of the DS1302 is very low when purchased in bulk, so it will not be on the electric energy meter. The cost increases a lot; (2) The power consumption of the DS1302 is low when it is working. The operating current is less than 300nA at 2V, and the power consumption is less than 1mW when maintaining data and clock information. Since the clock function is not used in the present invention, there is no need to maintain data and clock information, and no external crystal oscillator is used to generate the clock.
  • FIG. 1 is a circuit diagram of a dual super capacitor clock backup power supply of the present invention
  • FIG. 2 is a circuit diagram of a single super capacitor clock standby power supply
  • Figure 3 is a circuit configuration diagram of the present invention.
  • Figure 4 is the working circuit of the DS1302 clock chip
  • Figure 5 is an internal structure diagram of the DS1302 clock chip
  • FIG. 6 is a circuit diagram of a trickle charging power supply inside the DS1302 clock chip
  • POWER CONTROL is the power control device
  • INPUT SHIFT REGISTERS is the input shift register
  • COMMAND AND CONTROL LOGLC is the command and control system
  • REAL TIME CLOCK is the real-time clock
  • the present invention includes a transformer T1, a rectifier circuit, a voltage stabilization circuit, and a sampling circuit; and is characterized in that it further includes a dual super capacitor clock backup power supply circuit;
  • the dual super capacitor clock backup power supply circuit comprises a clock chip, a power meter processing unit (ie, a CPU), an anti-reverse diode D5, a super capacitor C6, and a charging and discharging resistor R6;
  • a power meter processing unit ie, a CPU
  • an anti-reverse diode D5 ie, a super capacitor C6, and a charging and discharging resistor R6;
  • the clock chip includes a main power terminal Vcc2, a backup power terminal Vcc1, a chip select signal terminal CE, a data signal terminal I/O, and a communication clock signal SCLK;
  • the main power terminal Vcc2 is connected to a voltage stabilizing circuit, and the backup power terminal Vcc1 is connected to the anode of the anti-reverse diode D5, and the chip select signal terminal CE, the data signal terminal I/O and the communication clock signal SCLK are respectively connected to corresponding ends of the electric energy meter processing unit;
  • the charging and discharging resistor R6 is connected in parallel with the sampling circuit, and is respectively connected to the negative electrode of the anti-reverse diode D5;
  • An input end of the super capacitor C6 is connected to an output end of the charging and discharging resistor R6, and an output end of the super capacitor C6 is grounded.
  • the clock chip uses a DS1302 low power clock chip.
  • the present invention adopts the DS1302 low-power real-time clock chip with fine current charging capability introduced by DALLAS, USA, which fully utilizes the advantages of its dual power supply and internal programmable fine current charging circuit.
  • the DS1302 is a low-power real-time clock chip with a fine current charging capability introduced by DALLAS, USA.
  • DS1302 is a high-performance, low-power, real-time clock circuit with RAM from DALLAS. It can time the year, month, day, week, hour, minute and second. It has leap year compensation function and the working voltage is 2.0V ⁇ 5.5V.
  • the DS1302 provides dual power supply pins for the main power supply and the backup power supply.
  • Vcc2 is the main power supply
  • VCC1 is the backup power supply. It also provides the ability to charge the backup power supply with fine current.
  • the continuous operation of the clock can also be maintained with the main power off.
  • the DS 1302 is powered by the larger of Vcc1 or Vcc2. When Vcc2 is greater than Vcc1+0.2V, it is powered by Vcc2. When Vcc2 is less than Vcc1, it is powered by Vcc1.
  • Figure 4 shows the typical working circuit of the DS1302 clock chip.
  • CE is the chip select signal
  • I/O is the data signal
  • SCLK is the communication clock signal
  • X1 and X2 are the crystal oscillator signals.
  • Figure 3 shows the internal structure of the DS1302 clock chip.
  • the DS1302 mainly includes an oscillation circuit module, a data memory RAM, a command and control logic module, an input shift register, and a power control module.
  • the power control module Important to the present invention is the power control module. Among them, the most important thing is that the module contains a special register - trickle charge register, by programming the register, you can determine the charge or not and the charge current. Therefore, the trickle charge register determines the charging characteristics of the DS1302.
  • Figure 6 shows the internal trickle charge power supply circuit diagram of the DS1302 clock chip.
  • TCS is the trickle charge selection bit
  • DS is the diode select bit
  • RS is the resistor select bit.
  • the DS1302 clock chip is powered on, there is no trickle charge.
  • RS and DS are determined by the maximum charging current of external VCC1 and VCC2.
  • the rectifier circuit includes a rectifier V1, a capacitor C1 and a capacitor C2;
  • the primary input end of the transformer T1 is connected to 220V mains; the input end of the rectifier V1 is connected to the secondary output end of the transformer T1;
  • the capacitor C1 and the capacitor C2 are connected in parallel, and the input ends thereof are respectively connected to the third pin of the rectifier V1, and the output ends thereof are respectively grounded.
  • the voltage stabilizing circuit comprises a three-terminal regulator U1, a common anode double diode D1, a common anode double diode D2, a capacitor C3, a resistor R1 and a super capacitor C4;
  • the first pin of the three-terminal regulator U1 is connected to the output end of the rectifier V1, and the second pin of the three-terminal regulator U1 is connected to the input end of the common anode double diode D1, the common anode double diode The output of D1 is grounded;
  • the common anode double diode D2 and the capacitor C3 are connected in parallel;
  • the positive input terminal of the capacitor C3 is connected to the third pin of the three-terminal regulator U1, and the negative output terminal of the capacitor C3 is grounded;
  • the third pin of the common anode dual diode D2 is connected to the third pin of the three-terminal regulator U1;
  • the resistor R1 and the super capacitor C4 are connected in series, the input end of the resistor R1 is connected to the first pin of the common anode dual diode D2, and the output end of the super capacitor C4 is grounded.
  • the input end of the capacitor C1 is provided with a detection circuit
  • the detecting circuit includes a resistor R4 and a resistor R5; an input end of the resistor R4 is connected to a second pin of the common anode double diode D2; an input end of the resistor R5 is connected to an output end of the resistor R4, The output of the resistor R5 is grounded;
  • the electric energy meter processing unit is connected between the resistor R4 and the resistor R5.
  • the sampling circuit comprises a common cathode double diode D3, a diode D4, a clock battery, a resistor R2, a resistor R3 and a capacitor C5;
  • a first pin of the common cathode dual diode D3 is connected to a first pin of the common anode dual diode D2, and a third pin of the common cathode double diode D3 is connected to an electric energy meter processing unit, the diode D4
  • the negative output terminal is also connected to the electric energy meter processing unit, and the input end of the diode D4 is connected to a voltage of 5.7V;
  • One end of the resistor R3 is connected to the positive pole of the battery, and the other end is connected to the electric energy meter processing unit; one end of the capacitor C5 is connected to the electric energy meter processing unit, and the other end is grounded; one end of the resistor R2 is connected to the electric energy meter processing unit. The other end is grounded; the negative pole of the battery is grounded; the second pin of the common cathode dual diode D3 is connected between the resistor R3 and the battery.
  • the existing common energy meter clock backup power supply As shown in FIG. 2, the existing common energy meter clock backup power supply.
  • the grid voltage is isolated and stepped down by the transformer T1 and then connected to the input terminal of the rectifier module V1.
  • the DC voltage V DC output from the rectifier module V1 is connected to the input terminal of the three-terminal regulator U1, and the ground terminal of the three-terminal regulator passes through the common anode.
  • the double diode D1 is grounded to raise the output voltage of the three-terminal regulator to 5.7V.
  • the output voltage of the three-terminal regulator is 5.7V connected to the anode of the common anode dual diode D2, the cathode of the double diode D2 is output voltage VDD, the communication module of the power supply table works, and the other cathode output voltage V B is connected.
  • One anode end of the cathode double diode D3, the other anode end of the double diode D3 is connected to the anode of the clock battery, the cathode output of the double diode D3 and the output of the 5.7V diode D4 together form the main and auxiliary power sources of the power meter processing unit CPU
  • the electric energy meter clock is a built-in clock of the CPU.
  • the resistors R2, R3 and the capacitor C5 constitute a step-down sampling circuit of the clock battery, and the CPU determines whether the clock battery is under voltage by the sampling value. When the clock battery is under voltage, an alarm signal is output in the energy meter processing unit to instantly replace the clock battery.
  • the invention is composed of an anti-reverse diode D5, a super capacitor C6 and a charge and discharge resistor R6.
  • the V DC power supply in Figure 1 is divided by resistors R4 and R5 and sent to the CPU for detection to determine whether the energy meter is powered off.
  • the output voltage of the three-terminal regulator U1 in Figure 2 will gradually drop to 0V due to the function of the storage capacitor C1.
  • the threshold voltage can be set to 9V.
  • the CPU detects that the V DC is less than 9V, the power meter can be considered to be powered off. However, the CPU's working power supply VCC is still in the normal working state, so the CPU has not entered the low power state.
  • the clock module of the energy meter is completely powered by the super capacitors C4 and C6.
  • the super capacitor C4 replenishes energy through the trickle charging circuit, thereby greatly prolonging the maintenance time of the clock module and ensuring the accuracy of the meter timing.
  • the circuit has the following characteristics: (1) Since the DS1302 is a general-purpose, inexpensive clock chip, and the number of electric energy meters is large, it is more than 100,000, so the price of the DS1302 is very low when purchased in bulk, so it will not be on the electric energy meter. The cost increases a lot; (2) The power consumption of the DS1302 is low when it is working. The operating current is less than 300nA at 2V, and the power consumption is less than 1mW when maintaining data and clock information. Since the clock function is not used in the present invention, there is no need to maintain data and clock information, and no external crystal oscillator is used to generate the clock.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Business, Economics & Management (AREA)
  • Emergency Management (AREA)
  • Charge And Discharge Circuits For Batteries Or The Like (AREA)
  • Stand-By Power Supply Arrangements (AREA)
  • Direct Current Feeding And Distribution (AREA)

Abstract

A super-capacitor application circuit of a replaceable battery type smart electric energy meter power supply. The circuit comprises a transformer T1, a rectifying circuit, a voltage stabilizing circuit and a sampling circuit, and further comprises a dual-super-capacitor clock backup power supply circuit. The dual-super-capacitor clock backup power supply circuit comprises a clock chip, an electric energy meter processing unit, an anti-reverse diode D5, a super-capacitor C6 and a charge-discharge resistor R6, wherein an input end of the super-capacitor C6 is connected to an output end of the charge-discharge resistor R6, and an output end of the super-capacitor C6 is grounded. Therefore, the trickle charge current is very low, and the service life of the super-capacitors C4 and C6 is prolonged.

Description

一种电池可更换式智能电能表电源的超级电容应用电路Supercapacitor application circuit for battery replaceable smart energy meter power supply 技术领域Technical field
本发明涉及一种智能电能表,尤其涉及一种电池可更换式智能电能表电源的超级电容应用电路。The invention relates to a smart electric energy meter, in particular to a super capacitor application circuit of a battery replaceable smart electric energy meter power supply.
背景技术Background technique
智能电能表的计时功能十分重要,会影响计费、事件记录等重要功能,要求即使在停电时时钟模块也必须正常工作,为此智能电能表内部采用一只锂电池作为时钟备用电源,以确保停电时时钟模块能正常工作。但锂电池长期使用会存在钝化现象,缩短了电池寿命,因此在使用一段时间后需要更换。但原先智能电能表时钟电池均是焊接在电能表电路板上,因此更换不便,而且更换电池必须在断电状态下进行。为解决单相智能电能表时钟电池欠压时无法更换电池问题,国网计量中心牵头制定了电池可更换智能电能表技术要求,其中不仅改进了电池安装结构以便于电池更换,同时为保证电池更换期间时钟模块的正常工作,要求必须在电能表内安装超级电容,并于2016年6月向电能表生产企业进行了宣贯。要求在电能表断电且电池欠压情况下,超级电容只为时钟供电,且维持时钟正确计时至少2天。国网计量中心检测流程为:电能表在参比电压条件下加载10min后,将电能表时钟与标准时间对时,再取出时钟电池且电能表在断电、环境温度为-40℃的情况下,静置2天。将时钟电池放回电能表电池仓,电能表上电,电能表时钟与标准时间比较误差不应超过5s。将同一只智能电能表在环境温度为70℃的情况下重复上述操作并满足同样要求。The timing function of the smart energy meter is very important, which will affect important functions such as billing and event recording. It is required that the clock module must work normally even in the event of power failure. For this reason, a lithium battery is used as a clock backup power source inside the smart energy meter to ensure The clock module works normally during a power outage. However, lithium batteries have a passivation effect for a long time, which shortens the battery life, so it needs to be replaced after a period of use. However, the original smart energy meter clock battery is soldered to the power meter circuit board, so the replacement is inconvenient, and the replacement battery must be in the power-off state. In order to solve the problem that the battery cannot be replaced when the single-phase smart energy meter clock battery is under voltage, the State Grid Metrology Center has taken the lead in formulating the technical requirements of the battery replaceable smart energy meter, which not only improves the battery installation structure for battery replacement, but also ensures battery replacement. During the normal operation of the clock module, it is required to install a super capacitor in the electric energy meter, and in June 2016, it was publicized to the electric energy meter manufacturer. It is required that when the power meter is powered off and the battery is under voltage, the super capacitor only supplies power to the clock and keeps the clock clocked correctly for at least 2 days. The detection process of the State Grid Metrology Center is: after the electric energy meter is loaded for 10 minutes under the reference voltage condition, the electric energy meter clock is compared with the standard time, and then the clock battery is taken out and the electric energy meter is powered off, and the ambient temperature is -40 ° C. , let stand for 2 days. Put the clock battery back into the battery compartment of the energy meter, power on the energy meter, and the error between the power meter clock and the standard time should not exceed 5s. Repeat the above operation with the same smart energy meter at an ambient temperature of 70 ° C and meet the same requirements.
超级电容充放电线路简单,无需充电电池那样的充电电路,因此目前电池可更换式电能表中时钟备用电源一般采用在电源输出端外接一只超级电容和一只充放电电阻的串联电路来实现。采用该方法的优点是电路实现简单,但缺点是:The supercapacitor charging and discharging circuit is simple, and there is no need for a charging circuit like a rechargeable battery. Therefore, the clock standby power supply in the battery replaceable electric energy meter is generally realized by a series circuit in which a super capacitor and a charging and discharging resistor are externally connected to the power output end. The advantage of using this method is that the circuit is simple to implement, but the disadvantages are:
(1)由于检测时要求电能表在参比电压条件下加载一定时间后电能表断电,因此在此期间必须将超级电容充满电,这就要求在超级电容允许的前提下充电电阻必须尽可能小,以加快充电速度,而超级电容相对于锂电池的一大优势就是其允许大电流充放电而不会受损。但由于充电电阻和放电电阻为同一只电阻,这就造成了其放电速度也很快,使得超级电容维持时间减少。(1) Since the electric energy meter is required to be de-energized after being loaded for a certain period of time under the reference voltage condition during the detection, the supercapacitor must be fully charged during this period, which requires that the charging resistor must be as much as possible under the premise of the supercapacitor. Small to speed up charging, and a big advantage of supercapacitors over lithium batteries is that they allow large currents to be charged and discharged without damage. However, since the charging resistor and the discharging resistor are the same resistor, this causes the discharging speed to be fast, so that the super capacitor holding time is reduced.
(2)在超级电容性能降低或停电远超过2天的条件下,超级电容维持时间不能满足要求。(2) Under the condition that the performance of the super capacitor is reduced or the power failure is far more than 2 days, the super capacitor maintenance time cannot meet the requirements.
发明内容Summary of the invention
本发明针对以上问题,提供了一种功耗低、超级电容维持时间长的一种电池可更换式智能电能表电源的超级电容应用电路。The present invention is directed to the above problem, and provides a super capacitor application circuit of a battery replaceable smart energy meter power supply with low power consumption and long super capacitor maintenance time.
本发明的技术方案是:包括变压器T1、整流电路、稳压电路和采样电路;还包括双超级 电容时钟备用电源电路;The technical solution of the present invention comprises: a transformer T1, a rectifying circuit, a voltage stabilizing circuit and a sampling circuit; and a double super capacitor clock standby power supply circuit;
所述双超级电容时钟备用电源电路包括时钟芯片、电能表处理单元、防反二极管D5、超级电容C6和充放电阻R6;The dual super capacitor clock backup power supply circuit comprises a clock chip, an electric energy meter processing unit, an anti-reverse diode D5, a super capacitor C6 and a charging and discharging resistor R6;
所述时钟芯片包括主电源端Vcc2、后备电源端Vcc1、片选信号端CE、数据信号端I/O和通信时钟信号SCLK;所述主电源端Vcc2与稳压电路连接,所述后备电源端Vcc1与防反二极管D5的正极连接,所述片选信号端CE、数据信号端I/O和通信时钟信号SCLK分别与电能表处理单元的对应端连接;The clock chip includes a main power terminal Vcc2, a backup power terminal Vcc1, a chip select signal terminal CE, a data signal terminal I/O, and a communication clock signal SCLK; the main power terminal Vcc2 is connected to a voltage stabilizing circuit, and the backup power terminal Vcc1 is connected to the anode of the anti-reverse diode D5, and the chip select signal terminal CE, the data signal terminal I/O and the communication clock signal SCLK are respectively connected to corresponding ends of the electric energy meter processing unit;
所述充放电阻R6和采样电路并联,分别与所述防反二极管D5的负极连接;The charging and discharging resistor R6 is connected in parallel with the sampling circuit, and is respectively connected to the negative electrode of the anti-reverse diode D5;
所述超级电容C6的输入端与所述充放电阻R6的输出端连接,所述超级电容C6的输出端接地。An input end of the super capacitor C6 is connected to an output end of the charging and discharging resistor R6, and an output end of the super capacitor C6 is grounded.
所述时钟芯片采用DS1302低功耗时钟芯片。The clock chip uses a DS1302 low power clock chip.
所述整流电路包括整流器V1、电容C1和电容C2;The rectifier circuit includes a rectifier V1, a capacitor C1 and a capacitor C2;
所述变压器T1的初级输入端接220V市电;所述整流器V1的输入端与变压器T1的次级输出端相连;The primary input end of the transformer T1 is connected to 220V mains; the input end of the rectifier V1 is connected to the secondary output end of the transformer T1;
所述电容C1和电容C2并联,其输入端分别与所述整流器V1的第三引脚连接,其输出端分别接地。The capacitor C1 and the capacitor C2 are connected in parallel, and the input ends thereof are respectively connected to the third pin of the rectifier V1, and the output ends thereof are respectively grounded.
所述稳压电路包括三端稳压器U1、共阳极双二极管D1、共阳极双二极管D2、电容C3、电阻R1和超级电容C4;The voltage stabilizing circuit comprises a three-terminal regulator U1, a common anode double diode D1, a common anode double diode D2, a capacitor C3, a resistor R1 and a super capacitor C4;
所述三端稳压器U1的第一引脚与整流器V1的输出端连接,所述三端稳压器U1的第二引脚与共阳极双二极管D1的输入端连接,所述共阳极双二极管D1的输出端接地;The first pin of the three-terminal regulator U1 is connected to the output end of the rectifier V1, and the second pin of the three-terminal regulator U1 is connected to the input end of the common anode double diode D1, the common anode double diode The output of D1 is grounded;
所述共阳极双二极管D2和电容C3并联;The common anode double diode D2 and the capacitor C3 are connected in parallel;
所述电容C3的正极输入端与三端稳压器U1的第三引脚连接,所述电容C3的负极输出端接地;The positive input terminal of the capacitor C3 is connected to the third pin of the three-terminal regulator U1, and the negative output terminal of the capacitor C3 is grounded;
所述共阳极双二极管D2的第三引脚与三端稳压器U1的第三引脚连接;The third pin of the common anode dual diode D2 is connected to the third pin of the three-terminal regulator U1;
所述电阻R1和超级电容C4依次串接,所述电阻R1的输入端与所述共阳极双二极管D2的第一引脚连接,所述超级电容C4的输出端接地。The resistor R1 and the super capacitor C4 are connected in series, the input end of the resistor R1 is connected to the first pin of the common anode dual diode D2, and the output end of the super capacitor C4 is grounded.
所述电容C1的输入端设有检测电路;The input end of the capacitor C1 is provided with a detection circuit;
所述检测电路包括电阻R4和电阻R5;所述电阻R4的输入端与所述共阳极双二极管D2的第二引脚连接;所述电阻R5的输入端与电阻R4的输出端连接,所述电阻R5的输出端接地;The detecting circuit includes a resistor R4 and a resistor R5; an input end of the resistor R4 is connected to a second pin of the common anode double diode D2; an input end of the resistor R5 is connected to an output end of the resistor R4, The output of the resistor R5 is grounded;
所述电能表处理单元连接在电阻R4与电阻R5之间。The electric energy meter processing unit is connected between the resistor R4 and the resistor R5.
所述采样电路包括共阴极双二极管D3、二极管D4、时钟电池、电阻R2、电阻R3和电容 C5;The sampling circuit comprises a common cathode double diode D3, a diode D4, a clock battery, a resistor R2, a resistor R3 and a capacitor C5;
所述共阴极双二极管D3的第一引脚与所述共阳极双二极管D2的第一引脚连接,所述共阴极双二极管D3的第三引脚与电能表处理单元连接,所述二极管D4的负极输出端也与电能表处理单元连接,所述二极管D4的输入端接入5.7V电压;a first pin of the common cathode dual diode D3 is connected to a first pin of the common anode dual diode D2, and a third pin of the common cathode double diode D3 is connected to an electric energy meter processing unit, the diode D4 The negative output terminal is also connected to the electric energy meter processing unit, and the input end of the diode D4 is connected to a voltage of 5.7V;
所述电阻R3的一端与电池的正极连接,另一端与电能表处理单元连接;所述电容C5的一端与电能表处理单元连接,另一端接地;所述电阻R2的一端与电能表处理单元连接,另一端接地;所述电池的负极接地;所述共阴极双二极管D3的第二引脚连接在电阻R3与电池之间。One end of the resistor R3 is connected to the positive pole of the battery, and the other end is connected to the electric energy meter processing unit; one end of the capacitor C5 is connected to the electric energy meter processing unit, and the other end is grounded; one end of the resistor R2 is connected to the electric energy meter processing unit. The other end is grounded; the negative pole of the battery is grounded; the second pin of the common cathode dual diode D3 is connected between the resistor R3 and the battery.
本发明中为了延长时钟备用电源的持续时间,采用双超级电容时钟备用电源电路。在现有单超级电容时钟备用电源电路的基础上,如图2所示,在电源V B和共阴极双二极管D3的1端之间增加如图1所示的电路。该电路由时钟芯片DS1302、电能表处理单元、防反二极管D5、超级电容C6、充放电电阻R6组成。同时,将图2中的V DC电源经电阻R4和R5分压后送电能表处理单元检测,以确定电能表是否断电。In the present invention, in order to extend the duration of the clock backup power supply, a dual super capacitor clock backup power supply circuit is employed. On the basis of the existing single super capacitor clock backup power supply circuit, as shown in FIG. 2, a circuit as shown in FIG. 1 is added between the power supply V B and the one end of the common cathode double diode D3. The circuit is composed of a clock chip DS1302, a power meter processing unit, an anti-reverse diode D5, a super capacitor C6, and a charge and discharge resistor R6. At the same time, the V DC power supply in FIG. 2 is divided by the resistors R4 and R5 and sent to the power meter processing unit for detection to determine whether the power meter is powered off.
该电路具有以下特性:(1)由于DS1302是一款通用的、廉价的时钟芯片,而且电能表数量很大,动辄十万只以上,因此批量采购DS1302时价格很低,因此不会对电能表成本增加很多;(2)DS1302工作时本来功耗就很低,2V时工作电流小于300nA,保持数据和时钟信息时功耗小于1mW。由于本发明中未用到其时钟功能,也不需要保持数据和时钟信息,也未外接晶振用于产生时钟。同时,在电能表处理单元对DS1302的涓流充电寄存器进行配置后,电能表处理单元与DS1302之间无需进行通信。因此,因本电路增加的功耗极低。(3)图2中,电能表正常工作时,VCC电源由三端稳压器U1的输出5.7V提供,因此对超级电容C4和C6的寿命影响很小。在时钟电池欠压时,电能表断电后全部由超级电容C4和C6提供电源。在满足功耗的前提下,电流表处理单元配置涓流充电寄存器的DS=10,RS=11,即选择二只二极管、选择电阻R3=8KΩ,充电回路电阻大,因此涓流充电电流很小,延长了超级电容C4和C6的寿命。The circuit has the following characteristics: (1) Since the DS1302 is a general-purpose, inexpensive clock chip, and the number of electric energy meters is large, it is more than 100,000, so the price of the DS1302 is very low when purchased in bulk, so it will not be on the electric energy meter. The cost increases a lot; (2) The power consumption of the DS1302 is low when it is working. The operating current is less than 300nA at 2V, and the power consumption is less than 1mW when maintaining data and clock information. Since the clock function is not used in the present invention, there is no need to maintain data and clock information, and no external crystal oscillator is used to generate the clock. At the same time, after the power meter processing unit configures the trickle charge register of the DS1302, no communication is required between the power meter processing unit and the DS1302. Therefore, the power consumption increased by this circuit is extremely low. (3) In Figure 2, when the energy meter is working normally, the VCC power supply is provided by the output of the three-terminal regulator U1 at 5.7V, so the lifetime of the super capacitors C4 and C6 is little affected. When the clock battery is under voltage, the power meter is powered off by the super capacitors C4 and C6. Under the premise of satisfying the power consumption, the current meter processing unit configures the DS=10 of the trickle charge register, RS=11, that is, selects two diodes, selects the resistor R3=8KΩ, and the charging loop resistance is large, so the trickle charging current is small. Extends the life of supercapacitors C4 and C6.
附图说明DRAWINGS
图1是本发明的双超级电容时钟备用电源电路图;1 is a circuit diagram of a dual super capacitor clock backup power supply of the present invention;
图2是单超级电容时钟备用电源电路图;2 is a circuit diagram of a single super capacitor clock standby power supply;
图3是本发明的电路结构图;Figure 3 is a circuit configuration diagram of the present invention;
图4是DS1302时钟芯片的工作电路;Figure 4 is the working circuit of the DS1302 clock chip;
图5是DS1302时钟芯片内部结构图;Figure 5 is an internal structure diagram of the DS1302 clock chip;
图6是DS1302时钟芯片内部涓流充电电源电路图;6 is a circuit diagram of a trickle charging power supply inside the DS1302 clock chip;
图中POWER CONTROL是电源控制装置、INPUT SHIFT REGISTERS是输入移位寄存器、COMMAND AND CONTROL LOGLC是指挥控制系统、REAL TIME CLOCK是实时时钟、In the figure, POWER CONTROL is the power control device, INPUT SHIFT REGISTERS is the input shift register, COMMAND AND CONTROL LOGLC is the command and control system, REAL TIME CLOCK is the real-time clock,
1 OF 16 SELECT是16选1,NOTE:ONLY 1010 ENABLES CHARGER是注意:只有1010能充电、1 OF 2 SELECT是2选1、1 OF 3 SELECT是3选1、1 OF 16 SELECT is 16 for 1, NOTE: ONLY 1010 ENABLES CHARGER is Note: Only 1010 can charge, 1 OF 2 SELECT is 2, 1, 1 OF 3 SELECT is 3
TCS=TRICKLE CHARGER SELECT是TCS=涓流充电器选择、TCS=TRICKLE CHARGER SELECT is TCS=Trickle Charger Selection,
DS=DIODE SELECT是DS=二极管选择、DS=DIODE SELECT is DS=diode selection,
ROUT=RESISTOR SELECT是ROUT=电阻器选择。ROUT=RESISTOR SELECT is ROUT=resistor selection.
具体实施方式Detailed ways
本发明如图1-6所示,包括变压器T1、整流电路、稳压电路和采样电路;其特征在于,还包括双超级电容时钟备用电源电路;The present invention, as shown in FIGS. 1-6, includes a transformer T1, a rectifier circuit, a voltage stabilization circuit, and a sampling circuit; and is characterized in that it further includes a dual super capacitor clock backup power supply circuit;
所述双超级电容时钟备用电源电路包括时钟芯片、电能表处理单元(即CPU)、防反二极管D5、超级电容C6和充放电阻R6;The dual super capacitor clock backup power supply circuit comprises a clock chip, a power meter processing unit (ie, a CPU), an anti-reverse diode D5, a super capacitor C6, and a charging and discharging resistor R6;
所述时钟芯片包括主电源端Vcc2、后备电源端Vcc1、片选信号端CE、数据信号端I/O和通信时钟信号SCLK;所述主电源端Vcc2与稳压电路连接,所述后备电源端Vcc1与防反二极管D5的正极连接,所述片选信号端CE、数据信号端I/O和通信时钟信号SCLK分别与电能表处理单元的对应端连接;The clock chip includes a main power terminal Vcc2, a backup power terminal Vcc1, a chip select signal terminal CE, a data signal terminal I/O, and a communication clock signal SCLK; the main power terminal Vcc2 is connected to a voltage stabilizing circuit, and the backup power terminal Vcc1 is connected to the anode of the anti-reverse diode D5, and the chip select signal terminal CE, the data signal terminal I/O and the communication clock signal SCLK are respectively connected to corresponding ends of the electric energy meter processing unit;
所述充放电阻R6和采样电路并联,分别与所述防反二极管D5的负极连接;The charging and discharging resistor R6 is connected in parallel with the sampling circuit, and is respectively connected to the negative electrode of the anti-reverse diode D5;
所述超级电容C6的输入端与所述充放电阻R6的输出端连接,所述超级电容C6的输出端接地。An input end of the super capacitor C6 is connected to an output end of the charging and discharging resistor R6, and an output end of the super capacitor C6 is grounded.
所述时钟芯片采用DS1302低功耗时钟芯片。The clock chip uses a DS1302 low power clock chip.
为克服以上电能表时钟备用电源的缺点,本发明采用美国DALLAS公司推出的具有涓细电流充电能力的低功耗实时时钟芯片DS1302,充分利用其双电源及内部可编程涓细电流充电电路的优势,发明了一种双超级电容时钟备用电源,在成本和功耗增加极其有限的情况下大大延长了时钟备用电源的持续时间。In order to overcome the shortcomings of the above-mentioned power meter clock backup power supply, the present invention adopts the DS1302 low-power real-time clock chip with fine current charging capability introduced by DALLAS, USA, which fully utilizes the advantages of its dual power supply and internal programmable fine current charging circuit. Invented a dual supercapacitor clock backup power supply that greatly extends the duration of the clock backup power supply with extremely limited cost and power consumption.
DS1302是由美国DALLAS公司推出的具有涓细电流充电能力的低功耗实时时钟芯片。DS1302是美国DALLAS公司推出的一种高性能、低功耗、带RAM的实时时钟电路,它可以对年、月、日、周、时、分、秒进行计时,具有闰年补偿功能,工作电压为2.0V~5.5V。DS1302提供了主电源、后备电源双电源引脚,其中Vcc2为主电源,VCC1为后备电源,同时提供了对后备电源进行涓细电流充电的能力。在主电源关闭的情况下,也能保持时钟的连续运行。DS1302由Vcc1或Vcc2两者中的较大者供电。当Vcc2大于Vcc1+0.2V时,由Vcc2供电。当Vcc2小于Vcc1时,由Vcc1供电。The DS1302 is a low-power real-time clock chip with a fine current charging capability introduced by DALLAS, USA. DS1302 is a high-performance, low-power, real-time clock circuit with RAM from DALLAS. It can time the year, month, day, week, hour, minute and second. It has leap year compensation function and the working voltage is 2.0V ~ 5.5V. The DS1302 provides dual power supply pins for the main power supply and the backup power supply. Vcc2 is the main power supply, and VCC1 is the backup power supply. It also provides the ability to charge the backup power supply with fine current. The continuous operation of the clock can also be maintained with the main power off. The DS 1302 is powered by the larger of Vcc1 or Vcc2. When Vcc2 is greater than Vcc1+0.2V, it is powered by Vcc2. When Vcc2 is less than Vcc1, it is powered by Vcc1.
图4为DS1302时钟芯片典型工作电路。其中,CE为片选信号,I/O为数据信号,SCLK为通信时钟信号,X1、X2为晶振信号。图3为DS1302时钟芯片内部结构图。由图可知,DS1302内部主要包括振荡电路模块、数据存储器RAM、命令和控制逻辑模块、输入移位寄存器和电源控制模块。Figure 4 shows the typical working circuit of the DS1302 clock chip. Among them, CE is the chip select signal, I/O is the data signal, SCLK is the communication clock signal, and X1 and X2 are the crystal oscillator signals. Figure 3 shows the internal structure of the DS1302 clock chip. As can be seen from the figure, the DS1302 mainly includes an oscillation circuit module, a data memory RAM, a command and control logic module, an input shift register, and a power control module.
对本发明而言,重要的就是电源控制模块。其中,最重要的就是,该模块内部含有一个特殊的寄存器—涓流充电寄存器,通过对该寄存器进行编程,就可决定充电与否以及充电电流的大小。所以,涓流充电寄存器决定了DS1302的充电特性,图6为DS1302时钟芯片内部涓流充电电源电路图。Important to the present invention is the power control module. Among them, the most important thing is that the module contains a special register - trickle charge register, by programming the register, you can determine the charge or not and the charge current. Therefore, the trickle charge register determines the charging characteristics of the DS1302. Figure 6 shows the internal trickle charge power supply circuit diagram of the DS1302 clock chip.
其中,TCS为涓流充电选择位,DS为二极管选择位,RS为电阻选择位。当TCS=1010时,使能涓流充电;当TCS为其它时,禁止涓流充电。DS1302时钟芯片刚上电时无涓流充电,需电能表处理对TCS位进行初始化配置为涓流充电模式。若DS=01,则选择一只二极管;若DS=10,则选择二只二极管;若DS=00或11,即使TCS=1010,充电功能也被禁止。若RS=01,则选择电阻R1=2KΩ;若RS=10,则选择电阻R2=4KΩ;若RS=11,则选择电阻R3=8KΩ;RS≠00。RS和DS是由外部VCC1和VCC2的最大充电电流决定的。Among them, TCS is the trickle charge selection bit, DS is the diode select bit, and RS is the resistor select bit. When TCS=1010, trickle charge is enabled; when TCS is other, trickle charge is disabled. When the DS1302 clock chip is powered on, there is no trickle charge. The power meter processing is required to initialize the TCS bit to the trickle charge mode. If DS=01, select a diode; if DS=10, select two diodes; if DS=00 or 11, even if TCS=1010, the charging function is disabled. If RS=01, select resistor R1=2KΩ; if RS=10, select resistor R2=4KΩ; if RS=11, select resistor R3=8KΩ; RS≠00. RS and DS are determined by the maximum charging current of external VCC1 and VCC2.
所述整流电路包括整流器V1、电容C1和电容C2;The rectifier circuit includes a rectifier V1, a capacitor C1 and a capacitor C2;
所述变压器T1的初级输入端接220V市电;所述整流器V1的输入端与变压器T1的次级输出端相连;The primary input end of the transformer T1 is connected to 220V mains; the input end of the rectifier V1 is connected to the secondary output end of the transformer T1;
所述电容C1和电容C2并联,其输入端分别与所述整流器V1的第三引脚连接,其输出端分别接地。The capacitor C1 and the capacitor C2 are connected in parallel, and the input ends thereof are respectively connected to the third pin of the rectifier V1, and the output ends thereof are respectively grounded.
所述稳压电路包括三端稳压器U1、共阳极双二极管D1、共阳极双二极管D2、电容C3、电阻R1和超级电容C4;The voltage stabilizing circuit comprises a three-terminal regulator U1, a common anode double diode D1, a common anode double diode D2, a capacitor C3, a resistor R1 and a super capacitor C4;
所述三端稳压器U1的第一引脚与整流器V1的输出端连接,所述三端稳压器U1的第二引脚与共阳极双二极管D1的输入端连接,所述共阳极双二极管D1的输出端接地;The first pin of the three-terminal regulator U1 is connected to the output end of the rectifier V1, and the second pin of the three-terminal regulator U1 is connected to the input end of the common anode double diode D1, the common anode double diode The output of D1 is grounded;
所述共阳极双二极管D2和电容C3并联;The common anode double diode D2 and the capacitor C3 are connected in parallel;
所述电容C3的正极输入端与三端稳压器U1的第三引脚连接,所述电容C3的负极输出端接地;The positive input terminal of the capacitor C3 is connected to the third pin of the three-terminal regulator U1, and the negative output terminal of the capacitor C3 is grounded;
所述共阳极双二极管D2的第三引脚与三端稳压器U1的第三引脚连接;The third pin of the common anode dual diode D2 is connected to the third pin of the three-terminal regulator U1;
所述电阻R1和超级电容C4依次串接,所述电阻R1的输入端与所述共阳极双二极管D2的第一引脚连接,所述超级电容C4的输出端接地。The resistor R1 and the super capacitor C4 are connected in series, the input end of the resistor R1 is connected to the first pin of the common anode dual diode D2, and the output end of the super capacitor C4 is grounded.
所述电容C1的输入端设有检测电路;The input end of the capacitor C1 is provided with a detection circuit;
所述检测电路包括电阻R4和电阻R5;所述电阻R4的输入端与所述共阳极双二极管D2 的第二引脚连接;所述电阻R5的输入端与电阻R4的输出端连接,所述电阻R5的输出端接地;The detecting circuit includes a resistor R4 and a resistor R5; an input end of the resistor R4 is connected to a second pin of the common anode double diode D2; an input end of the resistor R5 is connected to an output end of the resistor R4, The output of the resistor R5 is grounded;
所述电能表处理单元连接在电阻R4与电阻R5之间。The electric energy meter processing unit is connected between the resistor R4 and the resistor R5.
所述采样电路包括共阴极双二极管D3、二极管D4、时钟电池、电阻R2、电阻R3和电容C5;The sampling circuit comprises a common cathode double diode D3, a diode D4, a clock battery, a resistor R2, a resistor R3 and a capacitor C5;
所述共阴极双二极管D3的第一引脚与所述共阳极双二极管D2的第一引脚连接,所述共阴极双二极管D3的第三引脚与电能表处理单元连接,所述二极管D4的负极输出端也与电能表处理单元连接,所述二极管D4的输入端接入5.7V电压;a first pin of the common cathode dual diode D3 is connected to a first pin of the common anode dual diode D2, and a third pin of the common cathode double diode D3 is connected to an electric energy meter processing unit, the diode D4 The negative output terminal is also connected to the electric energy meter processing unit, and the input end of the diode D4 is connected to a voltage of 5.7V;
所述电阻R3的一端与电池的正极连接,另一端与电能表处理单元连接;所述电容C5的一端与电能表处理单元连接,另一端接地;所述电阻R2的一端与电能表处理单元连接,另一端接地;所述电池的负极接地;所述共阴极双二极管D3的第二引脚连接在电阻R3与电池之间。One end of the resistor R3 is connected to the positive pole of the battery, and the other end is connected to the electric energy meter processing unit; one end of the capacitor C5 is connected to the electric energy meter processing unit, and the other end is grounded; one end of the resistor R2 is connected to the electric energy meter processing unit. The other end is grounded; the negative pole of the battery is grounded; the second pin of the common cathode dual diode D3 is connected between the resistor R3 and the battery.
如图2所示,现有常用电能表时钟备用电源。电网电压经变压器T1隔离降压后接入整流模块V1的输入端,整流模块V1输出的直流电压V DC接入三端稳压器U1的输入端,三端稳压器的接地端通过共阳极双二极管D1接地,使三端稳压器的输出电压抬高到5.7V。三端稳压器的输出电压5.7V接入共阳极双二极管D2的阳极,双二极管D2的阴极之一输出电压VDD供电能表的通信模块等电路工作,另一阴极输出电压V B接入共阴极双二极管D3的其中一个阳极端,双二极管D3的另一个阳极端接时钟电池的正极,双二极管D3的阴极输出与5.7V经二极管D4的输出共同形成电能表处理单元CPU的主、辅电源,电能表时钟为CPU内置时钟。电阻R2、R3和电容C5构成时钟电池的降压采样电路,CPU通过该采样值判断时钟电池是否欠压。当时钟电池欠压时,电能表处理单元中会输出报警信号,以便即时更换时钟电池。As shown in FIG. 2, the existing common energy meter clock backup power supply. The grid voltage is isolated and stepped down by the transformer T1 and then connected to the input terminal of the rectifier module V1. The DC voltage V DC output from the rectifier module V1 is connected to the input terminal of the three-terminal regulator U1, and the ground terminal of the three-terminal regulator passes through the common anode. The double diode D1 is grounded to raise the output voltage of the three-terminal regulator to 5.7V. The output voltage of the three-terminal regulator is 5.7V connected to the anode of the common anode dual diode D2, the cathode of the double diode D2 is output voltage VDD, the communication module of the power supply table works, and the other cathode output voltage V B is connected. One anode end of the cathode double diode D3, the other anode end of the double diode D3 is connected to the anode of the clock battery, the cathode output of the double diode D3 and the output of the 5.7V diode D4 together form the main and auxiliary power sources of the power meter processing unit CPU The electric energy meter clock is a built-in clock of the CPU. The resistors R2, R3 and the capacitor C5 constitute a step-down sampling circuit of the clock battery, and the CPU determines whether the clock battery is under voltage by the sampling value. When the clock battery is under voltage, an alarm signal is output in the energy meter processing unit to instantly replace the clock battery.
本发明为、防反二极管D5、超级电容C6、充放电电阻R6组成。同时,将图1中的V DC电源经电阻R4和R5分压后送CPU检测,以确定电能表是否断电。The invention is composed of an anti-reverse diode D5, a super capacitor C6 and a charge and discharge resistor R6. At the same time, the V DC power supply in Figure 1 is divided by resistors R4 and R5 and sent to the CPU for detection to determine whether the energy meter is powered off.
本发明采用的双超级电容时钟备用电源电路工作原理如下:电能表初始上电时,CPU对时钟芯片DS1302的涓流充电寄存器配置如下:TCS=1010,DS=01,RS=01,即使能涓流充电、选择一只二极管、选择电阻R1=2KΩ,以便于对超级电容C6进行快速充电。由于DS1302的涓流充电电路中已包含一只二极管,为保证超级电容C6充电至尽可能高的电压,二极管D5应选用正向导通电压尽可能小的型号。当电能表断电时,因储能电容C1的作用,图2中三端稳压器U1的输出电压会逐渐下降为0V。可设置门限电压为9V,当CPU检测到V DC小于9V时,可认为电能表已断电,但此时CPU的工作电源VCC仍然处于正常工作状态,因此CPU还未进入低功耗状态,因此CPU迅速配置涓流充电寄存器的DS=10,RS=11,即选择二只二极管、 选择电阻R3=8KΩ。当三端稳压器U1的输出电压为0时,若此时时钟电池也处于欠压状态,则电能表的时钟模块完全由超级电容C4和C6供电。当超级电容C6电压下降至一定值时,超级电容C4会通过涓流充电电路对其补充能量,从而大大延长了时钟模块的维持时间,保证了电能表计时的准确性。The working principle of the dual super capacitor clock backup power supply circuit adopted by the invention is as follows: when the energy meter is initially powered on, the CPU configures the trickle charge register of the clock chip DS1302 as follows: TCS=1010, DS=01, RS=01, even if it can Stream charging, select a diode, select resistor R1 = 2KΩ, in order to quickly charge the super capacitor C6. Since the DS1302's trickle charging circuit already contains a diode, in order to ensure that the super capacitor C6 is charged to the highest possible voltage, the diode D5 should be of the type with the smallest forward voltage. When the energy meter is powered off, the output voltage of the three-terminal regulator U1 in Figure 2 will gradually drop to 0V due to the function of the storage capacitor C1. The threshold voltage can be set to 9V. When the CPU detects that the V DC is less than 9V, the power meter can be considered to be powered off. However, the CPU's working power supply VCC is still in the normal working state, so the CPU has not entered the low power state. The CPU quickly configures the DS=10 of the trickle charge register, RS=11, that is, selects two diodes and selects the resistor R3=8KΩ. When the output voltage of the three-terminal regulator U1 is 0, if the clock battery is also under voltage, the clock module of the energy meter is completely powered by the super capacitors C4 and C6. When the voltage of the super capacitor C6 drops to a certain value, the super capacitor C4 replenishes energy through the trickle charging circuit, thereby greatly prolonging the maintenance time of the clock module and ensuring the accuracy of the meter timing.
该电路具有以下特性:(1)由于DS1302是一款通用的、廉价的时钟芯片,而且电能表数量很大,动辄十万只以上,因此批量采购DS1302时价格很低,因此不会对电能表成本增加很多;(2)DS1302工作时本来功耗就很低,2V时工作电流小于300nA,保持数据和时钟信息时功耗小于1mW。由于本发明中未用到其时钟功能,也不需要保持数据和时钟信息,也未外接晶振用于产生时钟。同时,在CPU对DS1302的涓流充电寄存器进行配置后,CPU与DS1302之间无需进行通信。因此,因本电路增加的功耗极低。(3)图1中,电能表正常工作时,VCC电源由三端稳压器U1的输出5.7V提供,因此对超级电容C4和C6的寿命影响很小。在时钟电池欠压时,电能表断电后全部由超级电容C4和C6提供电源。在满足功耗的前提下,CPU配置涓流充电寄存器的DS=10,RS=11,即选择二只二极管、选择电阻R3=8KΩ,充电回路电阻大,因此涓流充电电流很小,延长了超级电容C4和C6的寿命。The circuit has the following characteristics: (1) Since the DS1302 is a general-purpose, inexpensive clock chip, and the number of electric energy meters is large, it is more than 100,000, so the price of the DS1302 is very low when purchased in bulk, so it will not be on the electric energy meter. The cost increases a lot; (2) The power consumption of the DS1302 is low when it is working. The operating current is less than 300nA at 2V, and the power consumption is less than 1mW when maintaining data and clock information. Since the clock function is not used in the present invention, there is no need to maintain data and clock information, and no external crystal oscillator is used to generate the clock. At the same time, after the CPU configures the trickle charge register of the DS1302, no communication is required between the CPU and the DS1302. Therefore, the power consumption increased by this circuit is extremely low. (3) In Figure 1, when the energy meter is working normally, the VCC power supply is provided by the output of the three-terminal regulator U1 at 5.7V, so the lifetime of the super capacitors C4 and C6 is little affected. When the clock battery is under voltage, the power meter is powered off by the super capacitors C4 and C6. Under the premise of satisfying the power consumption, the CPU configures the trickle charge register DS=10, RS=11, that is, selects two diodes, selects the resistor R3=8KΩ, and the charging loop resistance is large, so the trickle charging current is small and prolonged. The life of super capacitors C4 and C6.

Claims (6)

  1. 一种电池可更换式智能电能表电源的超级电容应用电路,包括变压器T1、整流电路、稳压电路和采样电路;其特征在于,还包括双超级电容时钟备用电源电路;A supercapacitor application circuit for a battery replaceable smart energy meter power supply, comprising a transformer T1, a rectifier circuit, a voltage stabilization circuit and a sampling circuit; and characterized in that it further comprises a double super capacitor clock backup power supply circuit;
    所述双超级电容时钟备用电源电路包括时钟芯片、电能表处理单元、防反二极管D5、超级电容C6和充放电阻R6;The dual super capacitor clock backup power supply circuit comprises a clock chip, an electric energy meter processing unit, an anti-reverse diode D5, a super capacitor C6 and a charging and discharging resistor R6;
    所述时钟芯片包括主电源端Vcc2、后备电源端Vcc1、片选信号端CE、数据信号端I/O和通信时钟信号SCLK;所述主电源端Vcc2与稳压电路连接,所述后备电源端Vcc1与防反二极管D5的正极连接,所述片选信号端CE、数据信号端I/O和通信时钟信号SCLK分别与电能表处理单元的对应端连接;The clock chip includes a main power terminal Vcc2, a backup power terminal Vcc1, a chip select signal terminal CE, a data signal terminal I/O, and a communication clock signal SCLK; the main power terminal Vcc2 is connected to a voltage stabilizing circuit, and the backup power terminal Vcc1 is connected to the anode of the anti-reverse diode D5, and the chip select signal terminal CE, the data signal terminal I/O and the communication clock signal SCLK are respectively connected to corresponding ends of the electric energy meter processing unit;
    所述充放电阻R6和采样电路并联,分别与所述防反二极管D5的负极连接;The charging and discharging resistor R6 is connected in parallel with the sampling circuit, and is respectively connected to the negative electrode of the anti-reverse diode D5;
    所述超级电容C6的输入端与所述充放电阻R6的输出端连接,所述超级电容C6的输出端接地。An input end of the super capacitor C6 is connected to an output end of the charging and discharging resistor R6, and an output end of the super capacitor C6 is grounded.
  2. 根据权利要求1所述的一种电池可更换式智能电能表电源的超级电容应用电路,其特征在于,所述时钟芯片采用DS1302低功耗时钟芯片。The supercapacitor application circuit of a battery replaceable smart energy meter power supply according to claim 1, wherein the clock chip uses a DS1302 low power clock chip.
  3. 根据权利要求1所述的一种电池可更换式智能电能表电源的超级电容应用电路,其特征在于,所述整流电路包括整流器V1、电容C1和电容C2;The supercapacitor application circuit of a battery replaceable smart energy meter power supply according to claim 1, wherein the rectifier circuit comprises a rectifier V1, a capacitor C1 and a capacitor C2;
    所述变压器T1的初级输入端接220V市电;所述整流器V1的输入端与变压器T1的次级输出端相连;The primary input end of the transformer T1 is connected to 220V mains; the input end of the rectifier V1 is connected to the secondary output end of the transformer T1;
    所述电容C1和电容C2并联,其输入端分别与所述整流器V1的第三引脚连接,其输出端分别接地。The capacitor C1 and the capacitor C2 are connected in parallel, and the input ends thereof are respectively connected to the third pin of the rectifier V1, and the output ends thereof are respectively grounded.
  4. 根据权利要求3所述的一种电池可更换式智能电能表电源的超级电容应用电路,其特征在于,所述稳压电路包括三端稳压器U1、共阳极双二极管D1、共阳极双二极管D2、电容C3、电阻R1和超级电容C4;The supercapacitor application circuit of a battery replaceable smart energy meter power supply according to claim 3, wherein the voltage stabilizing circuit comprises a three-terminal regulator U1, a common anode double diode D1, a common anode double diode D2, capacitor C3, resistor R1 and super capacitor C4;
    所述三端稳压器U1的第一引脚与整流器V1的输出端连接,所述三端稳压器U1的第二引脚与共阳极双二极管D1的输入端连接,所述共阳极双二极管D1的输出端接地;The first pin of the three-terminal regulator U1 is connected to the output end of the rectifier V1, and the second pin of the three-terminal regulator U1 is connected to the input end of the common anode double diode D1, the common anode double diode The output of D1 is grounded;
    所述共阳极双二极管D2和电容C3并联;The common anode double diode D2 and the capacitor C3 are connected in parallel;
    所述电容C3的正极输入端与三端稳压器U1的第三引脚连接,所述电容C3的负极输出端接地;The positive input terminal of the capacitor C3 is connected to the third pin of the three-terminal regulator U1, and the negative output terminal of the capacitor C3 is grounded;
    所述共阳极双二极管D2的第三引脚与三端稳压器U1的第三引脚连接;The third pin of the common anode dual diode D2 is connected to the third pin of the three-terminal regulator U1;
    所述电阻R1和超级电容C4依次串接,所述电阻R1的输入端与所述共阳极双二极管D2的第一引脚连接,所述超级电容C4的输出端接地。The resistor R1 and the super capacitor C4 are connected in series, the input end of the resistor R1 is connected to the first pin of the common anode dual diode D2, and the output end of the super capacitor C4 is grounded.
  5. 根据权利要求4所述的一种电池可更换式智能电能表电源的超级电容应用电路,其特 征在于,所述电容C1的输入端设有检测电路;The supercapacitor application circuit of a battery replaceable smart energy meter power supply according to claim 4, wherein the input end of the capacitor C1 is provided with a detecting circuit;
    所述检测电路包括电阻R4和电阻R5;所述电阻R4的输入端与所述共阳极双二极管D2的第二引脚连接;所述电阻R5的输入端与电阻R4的输出端连接,所述电阻R5的输出端接地;The detecting circuit includes a resistor R4 and a resistor R5; an input end of the resistor R4 is connected to a second pin of the common anode double diode D2; an input end of the resistor R5 is connected to an output end of the resistor R4, The output of the resistor R5 is grounded;
    所述电能表处理单元连接在电阻R4与电阻R5之间。The electric energy meter processing unit is connected between the resistor R4 and the resistor R5.
  6. 根据权利要求4所述的一种电池可更换式智能电能表电源的超级电容应用电路,其特征在于,所述采样电路包括共阴极双二极管D3、二极管D4、时钟电池、电阻R2、电阻R3和电容C5;The supercapacitor application circuit of a battery replaceable smart energy meter power supply according to claim 4, wherein the sampling circuit comprises a common cathode double diode D3, a diode D4, a clock battery, a resistor R2, a resistor R3, and Capacitor C5;
    所述共阴极双二极管D3的第一引脚与所述共阳极双二极管D2的第一引脚连接,所述共阴极双二极管D3的第三引脚与电能表处理单元连接,所述二极管D4的负极输出端也与电能表处理单元连接,所述二极管D4的输入端接入5.7V电压;a first pin of the common cathode dual diode D3 is connected to a first pin of the common anode dual diode D2, and a third pin of the common cathode double diode D3 is connected to an electric energy meter processing unit, the diode D4 The negative output terminal is also connected to the electric energy meter processing unit, and the input end of the diode D4 is connected to a voltage of 5.7V;
    所述电阻R3的一端与电池的正极连接,另一端与电能表处理单元连接;所述电容C5的一端与电能表处理单元连接,另一端接地;所述电阻R2的一端与电能表处理单元连接,另一端接地;所述电池的负极接地;所述共阴极双二极管D3的第二引脚连接在电阻R3与电池之间。One end of the resistor R3 is connected to the positive pole of the battery, and the other end is connected to the electric energy meter processing unit; one end of the capacitor C5 is connected to the electric energy meter processing unit, and the other end is grounded; one end of the resistor R2 is connected to the electric energy meter processing unit. The other end is grounded; the negative pole of the battery is grounded; the second pin of the common cathode dual diode D3 is connected between the resistor R3 and the battery.
PCT/CN2019/085600 2018-05-18 2019-05-06 Super-capacitor application circuit of replaceable battery type smart electric energy meter power supply WO2019218882A1 (en)

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