JPS60137053A - Semiconductor capacity element - Google Patents
Semiconductor capacity elementInfo
- Publication number
- JPS60137053A JPS60137053A JP25054583A JP25054583A JPS60137053A JP S60137053 A JPS60137053 A JP S60137053A JP 25054583 A JP25054583 A JP 25054583A JP 25054583 A JP25054583 A JP 25054583A JP S60137053 A JPS60137053 A JP S60137053A
- Authority
- JP
- Japan
- Prior art keywords
- diffusion layer
- type
- layer
- substrate
- insulating film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/0805—Capacitors only
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は、金属−絶縁膜一半導体構造、いわゆる、ＭＩ
Ｓ型の静電容量素子に関する。DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to metal-insulator-semiconductor structures, so-called MI
This invention relates to an S-type capacitive element.
従来例の構成とその問題点
第１図は、ＭＩＳ型構造により形成された静電容は素子
の従来例断面図である。同図においてはＮ型基板１内に
形成したＰ型拡散層２と、絶縁膜３を介して、′電極４
との間に、静電容量を形成する構造となっている。なお
、Ｐ型拡散層２は、高濃度Ｐ型拡散層６を介して電極６
に接続されている。この例の場合、電極４に加わる電圧
が、電極６に加わる電圧より高い場合には、Ｐ型拡散層
２の絶縁層３との近傍に空乏層領域が形成される。Structure of a conventional example and its problems FIG. 1 is a sectional view of a conventional example of a capacitor element formed by an MIS type structure. In the figure, a P-type diffusion layer 2 formed in an N-type substrate 1 and an electrode 4 are connected through an insulating film 3.
The structure is such that a capacitance is formed between the two. Note that the P-type diffusion layer 2 is connected to the electrode 6 via the high concentration P-type diffusion layer 6.
It is connected to the. In this example, if the voltage applied to the electrode 4 is higher than the voltage applied to the electrode 6, a depletion layer region is formed in the vicinity of the P-type diffusion layer 2 and the insulating layer 3.
−そのため、電極４と電極６との間の静電容量は、との
空乏層による容量と、絶縁膜３による１喰とが、直列に
接続されるため静電容量の減少が生じる。静電容量の減
少を防ぐには、Ｐ型拡散層２の不純物ａ度を高める必要
があるが、この場合には基板１との間の接合容量が増加
するため、結果として、電極６につながる浮遊容ｌの増
加となり、この容置素子を用いた回路では、動作特性上
、不都合が生じる。なお、第１図には、素子間分離のだ
めの酸化膜了および、素子間分離のブこめの拡散層８、
層間絶縁膜９があわぜて形成しである。尚６は高濃度Ｐ
型拡散でおる。- Therefore, the capacitance between the electrodes 4 and 6 is reduced because the capacitance due to the depletion layer and the capacitance due to the insulating film 3 are connected in series. In order to prevent a decrease in capacitance, it is necessary to increase the degree of impurity in the P-type diffusion layer 2, but in this case, the junction capacitance with the substrate 1 increases, which leads to the electrode 6. This results in an increase in floating capacitance l, which causes problems in terms of operating characteristics in a circuit using this capacitive element. In addition, FIG. 1 shows an oxide film layer for isolation between elements, a diffusion layer 8 for isolation between elements,
The interlayer insulating film 9 is formed in a jumbled manner. In addition, 6 is high concentration P
It is caused by type diffusion.
発明の目的
本発明は、上述従来例の問題点を解消するもので、電極
間の静電容量の電圧依存性を除去し、かつ、浮遊容量の
少ない半導体容量素子を提供することを目的とする。OBJECTS OF THE INVENTION The present invention solves the problems of the prior art described above, and aims to eliminate the voltage dependence of capacitance between electrodes and provide a semiconductor capacitive element with less stray capacitance. .
発明の構成
本発明は、絶縁膜の下の半導体表面に高濃度の不純物拡
散層を形成し、空乏層の広がりをおさえ電圧依存のない
容量をつくると同時に、基板との間には、反対導電型の
低濃度不純物の拡散層を設け、基板との間の接合容量を
小さくすることにより、浮遊容量を減少させ、また、上
記高濃度拡散層と、低濃度拡散層との間の接合容量に対
してはこれらを同電位にすることにより、接合容量を無
祝し、」ニ述の目的を達成せんとするものである。Structure of the Invention The present invention forms a highly concentrated impurity diffusion layer on the semiconductor surface under the insulating film, suppresses the expansion of the depletion layer, creates a voltage-independent capacitance, and at the same time creates an oppositely conductive layer between the substrate and the substrate. By providing a type of low concentration impurity diffusion layer and reducing the junction capacitance with the substrate, stray capacitance is reduced, and the junction capacitance between the high concentration diffusion layer and the low concentration diffusion layer is reduced. In contrast, by setting these to the same potential, the junction capacitance is ignored, and the above purpose is achieved.
実施例の説明
本発明の実施例について説明する。第２図に本発明の半
導体容量素子の断面図を示す。第２図においては、Ｎ型
半導体基板１０内に低濃度のＰ散拡散層１１を設け、さ
らにその内部に、高濃度のＮ型拡散領域１２を形成する
。１１型拡散領域１２の上に絶縁膜１３を形成し、その
上部に電極１４を形成する。Ｐ散拡散層１１とＮ型拡散
層１２はそれぞれ、高濃度Ｐ型拡散層１５と、高濃度Ｎ
型拡散層１６を介して、金属電極１７と接続される。DESCRIPTION OF EMBODIMENTS An embodiment of the present invention will be described. FIG. 2 shows a cross-sectional view of the semiconductor capacitive element of the present invention. In FIG. 2, a low concentration P diffusion layer 11 is provided in an N type semiconductor substrate 10, and a high concentration N type diffusion region 12 is further formed therein. An insulating film 13 is formed on the 11-type diffusion region 12, and an electrode 14 is formed on the insulating film 13. The P-diffusion layer 11 and the N-type diffusion layer 12 are the high-concentration P-type diffusion layer 15 and the high-concentration N-type diffusion layer 15, respectively.
It is connected to a metal electrode 17 via a type diffusion layer 16 .
本構造において、電極１４と電極１７との間の静電容量
は、高濃度Ｎ型拡散層１２があす、シかも高濃度である
だめ、空乏層の発生がおさえられ、静電容量の変動は、
はとんど生じない。この高濃度Ｎ型拡散層１２をイオン
注入により、リンを１５０ＫｅＶ、ｉｑ人電量４×１０
１′／／Ｃ１ｊテ注入シタ場＋５Ｖの範囲で、静電容量
の変動は、５％以下にすることができる。高濃度Ｎ型拡
散層１２と、低濃度Ｐ型拡散層１１との接合容量は、こ
の２つの領域が高濃度Ｐ型拡散層１５と、高濃度Ｎ型拡
散層１６を介し、金属電極１７で電気的に同電位になー
・でいるため無視することができる。低濃度Ｐ型拡散層
１１と、Ｎ型基板１○との接合容量は、Ｐ散拡散層１１
の濃度を低くすることにより、小さくすることができる
。なお、第２図には素子間分離のだめの酸化膜１８、お
よび素子間分離のだめの拡散層１９、層間絶縁膜２０が
あわせて形成しである。In this structure, the electrostatic capacitance between the electrode 14 and the electrode 17 is so high that the high concentration N-type diffusion layer 12 has a high concentration. ,
rarely occurs. This high-concentration N-type diffusion layer 12 is ion-implanted with phosphorus at 150 KeV and iq electric power of 4×10
In the range of +5 V for the injection field, the capacitance variation can be less than 5%. The junction capacitance between the high concentration N-type diffusion layer 12 and the low concentration P-type diffusion layer 11 is determined by the connection between these two regions via the high concentration P-type diffusion layer 15 and the high concentration N-type diffusion layer 16, and the metal electrode 17. Since they are electrically at the same potential, they can be ignored. The junction capacitance between the low concentration P-type diffusion layer 11 and the N-type substrate 1○ is
It can be made smaller by lowering the concentration of. In FIG. 2, an oxide film 18 for element isolation, a diffusion layer 19 for element isolation, and an interlayer insulating film 20 are also formed.
発明の効果
本発明にＪ：れば、電極間の電圧による静電容量の変化
の少ない、しかも浮遊容量の小さい１堆素子が実現でき
る。本発明をスイッチトキャパシタフィルタに用いると
、歪の少ない特性が実現できる。Effects of the Invention According to the present invention, it is possible to realize a one-layer element with little change in capacitance due to voltage between electrodes and low stray capacitance. When the present invention is applied to a switched capacitor filter, characteristics with less distortion can be realized.
以上本発明をＮ型基板の場合について説明しだが、Ｐ型
基板を用い、上記説明とは反対の不純物拡散をした場合
であっても適用可能である。Although the present invention has been described above with respect to an N-type substrate, it is also applicable to a case where a P-type substrate is used and impurity diffusion is performed in a manner opposite to that described above.
第１図は、従来の半導体容量素子の断面図、第２図は、
本発明の半導体容量素子の断面図である。
１ｏ・・・・Ｎ型基板、１１・・・ Ｐ型拡散層、１２
・・・・Ｎ型拡￥ｉＪｉ層、１３・・・・・・酸化膜、
１４．１７・・・・電（１負、１５・・・・・・高濃・
度Ｐ型拡散層、１６・・・高飛ＩｆＮ型拡散層、１８
・・素子分離酸化膜、１９・・・・・素子分離拡散、２
０・・・・・・層間絶縁膜。
代理人の氏名 弁理士 中 尾 敏 男 ほか１名第１
図
＠２図Fig. 1 is a cross-sectional view of a conventional semiconductor capacitive element, and Fig. 2 is a sectional view of a conventional semiconductor capacitive element.
1 is a cross-sectional view of a semiconductor capacitive element of the present invention. 1o... N type substrate, 11... P type diffusion layer, 12
...N-type expanded iJi layer, 13...Oxide film,
14.17・・・Electricity (1 negative, 15・・・Takano・
degree P-type diffusion layer, 16...high-flying IfN-type diffusion layer, 18
...Element isolation oxide film, 19...Element isolation diffusion, 2
0...Interlayer insulating film. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
Figure @2 figure
Claims (1)
の低濃度不純物拡散層を形成し、この拡散層内に、−導
電型不純物高濃度拡散層内を形成し、この拡散層」二部
に、絶縁膜を形成し、さらにこの絶縁膜１１部に一方の
電極を形成するとともに、前記２つの拡散層に接する他
方の電極を設けたことを特徴とする半導体容置素子。A low concentration impurity diffusion layer is formed in a semiconductor substrate of one conductivity type, which is opposite to the same substrate, and a high concentration impurity diffusion layer of - conductivity type is formed within this diffusion layer. A semiconductor container element characterized in that an insulating film is formed on the second part, and one electrode is further formed on the 11 part of the insulating film, and the other electrode is provided in contact with the two diffusion layers.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP25054583A JPS60137053A (en) | 1983-12-26 | 1983-12-26 | Semiconductor capacity element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP25054583A JPS60137053A (en) | 1983-12-26 | 1983-12-26 | Semiconductor capacity element |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS60137053A true JPS60137053A (en) | 1985-07-20 |
Family
ID=17209499
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP25054583A Pending JPS60137053A (en) | 1983-12-26 | 1983-12-26 | Semiconductor capacity element |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60137053A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01146351A (en) * | 1987-12-02 | 1989-06-08 | Mitsubishi Electric Corp | Semiconductor device |
| EP1024538A1 (en) * | 1999-01-29 | 2000-08-02 | STMicroelectronics S.r.l. | MOS varactor, in particular for radio-frequency transceivers |
| KR101402632B1 (en) * | 2006-06-16 | 2014-06-03 | 세미컨덕터 콤포넨츠 인더스트리즈 엘엘씨 | Semiconductor filter structure and method of manufacture |
-
1983
- 1983-12-26 JP JP25054583A patent/JPS60137053A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01146351A (en) * | 1987-12-02 | 1989-06-08 | Mitsubishi Electric Corp | Semiconductor device |
| EP1024538A1 (en) * | 1999-01-29 | 2000-08-02 | STMicroelectronics S.r.l. | MOS varactor, in particular for radio-frequency transceivers |
| US6400001B1 (en) | 1999-01-29 | 2002-06-04 | Stmicroelectronics S.R.L. | Varactor, in particular for radio-frequency transceivers |
| KR101402632B1 (en) * | 2006-06-16 | 2014-06-03 | 세미컨덕터 콤포넨츠 인더스트리즈 엘엘씨 | Semiconductor filter structure and method of manufacture |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US5341009A (en) | Fast charging MOS capacitor structure for high magnitude voltage of either positive or negative polarity | |
| US5773860A (en) | Semiconductor device including MOS capacitance | |
| US4704625A (en) | Capacitor with reduced voltage variability | |
| JPH0936307A (en) | Mos capacitor | |
| JPS60137053A (en) | Semiconductor capacity element | |
| JPS61119072A (en) | Semiconductor capacity device | |
| US5598023A (en) | Photoelectric converting apparatus | |
| JPS59100570A (en) | Mos transistor | |
| CN1252620A (en) | Manufacture of complementary MOS inverter | |
| JPH01268049A (en) | Diffused resistor element | |
| JP2563456B2 (en) | MIS type capacitive element | |
| JPH02137256A (en) | Semiconductor integrated circuit | |
| JPH0441499B2 (en) | ||
| JP2907504B2 (en) | Semiconductor device | |
| JPH03155659A (en) | Semiconductor device | |
| JPS58173A (en) | Manufacturing method for semiconductor switch | |
| JPS604263A (en) | Mos field effect semiconductor device | |
| JP2826239B2 (en) | Capacitor | |
| JPS62211942A (en) | Semiconductor circuit | |
| JP2515016B2 (en) | Thyristor | |
| JP2617265B2 (en) | Semiconductor device | |
| JPS6116561A (en) | Semiconductor device and usage thereof | |
| JPH025484A (en) | Mos semiconductor device | |
| JPH0368168A (en) | Semiconductor memory | |
| JPS60210864A (en) | Semiconductor memory device |