JPS60136278A - Pattern formation - Google Patents

Pattern formation

Info

Publication number
JPS60136278A
JPS60136278A JP58243426A JP24342683A JPS60136278A JP S60136278 A JPS60136278 A JP S60136278A JP 58243426 A JP58243426 A JP 58243426A JP 24342683 A JP24342683 A JP 24342683A JP S60136278 A JPS60136278 A JP S60136278A
Authority
JP
Japan
Prior art keywords
pattern
resist film
resist
substrate
developer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58243426A
Other languages
Japanese (ja)
Inventor
Kanji Fujiwara
藤原 貫治
Masahiro Morimoto
森本 正弘
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP58243426A priority Critical patent/JPS60136278A/en
Publication of JPS60136278A publication Critical patent/JPS60136278A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/10Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region
    • H01S5/11Comprising a photonic bandgap structure

Abstract

PURPOSE:To optimize the processing time without taking out a processed semiconductor substrate from developer so often by a method wherein a pattern is formed by selectively removing a resist film while the shape of the pattern is monitored with diffraction light of light flux. CONSTITUTION:The semiconductor substrate 11 is coated with resist, which is passed through processes by the conventional technique, and the exposure of the stripe pattern is performed with the two-flux interference method using a light flux of He-Cd laser. For the purpose of developing this resist film 12, the substrate is dipped in the developer 14 by the conventional technique. The light flux of He-Ne laser is made incident to the resist film 12 being under development, and the strength of its primary diffraction light shown by broken lines is monitored. As the development advances, the diffraction light is detected with the gradual increase in strength. At the point of maximum, the substrate 11 is taken out of the developer 14 and rinsed by the usual method, and then the substrate is etched by using the pattern-formed resist film as a mask.

Description

【発明の詳細な説明】 (a) 発明の技術分野 本発明はパターン形成方法、特に微細な周期的パターン
のレジストマスクを最良の状態に形成することが可能な
形成方法に関する。
DETAILED DESCRIPTION OF THE INVENTION (a) Technical Field of the Invention The present invention relates to a pattern forming method, and particularly to a forming method capable of forming a resist mask with a fine periodic pattern in the best condition.

(b) 技術の背景 光通信システムなどの元を情報信号の媒体とする技術が
開発され進歩するに伴なって、これらのいる。このデバ
イス開発の代表的な例として半導体レーザがあげらnる
(b) Background of the technology As the technology for using optical communication systems as a medium for information signals is developed and progresses, these systems are becoming more and more popular. A semiconductor laser is a typical example of this device development.

半導体レーザにおいては、訪導放出による元の増幅が行
なわれて光共振器によって元が発振する。
In a semiconductor laser, the source is amplified by guided emission and oscillated by an optical resonator.

この光共振器として多くは1対の鏡を平行に対向させる
構造の77ブリー・ペロー形共振器が行なわれているが
、この構造の半導体レーザは軸モードの制御が極めて困
難であり、温度変化による半44Bのエネルギーバンド
ギャップの変化などによって発振波長が変化して安定に
制御することができない。
A 77 Brie-Perot type resonator, which has a structure in which a pair of mirrors face each other in parallel, is often used as this optical resonator, but semiconductor lasers with this structure have extremely difficult control of the axial mode, and temperature changes The oscillation wavelength changes due to a change in the energy bandgap of the half 44B, and cannot be stably controlled.

これらの特性は共振器のフィードバックを光導波路の界
面に設けた回折格子によって選択的に行なう分布帰還形
レーザによって大幅に改善することができる。しかしな
がら前記回折格子を再現性よく形成することは容易では
ない。
These characteristics can be greatly improved by a distributed feedback laser in which resonator feedback is selectively performed by a diffraction grating provided at the interface of the optical waveguide. However, it is not easy to form the diffraction grating with good reproducibility.

(C)、従来技術と問題点 第1図(a)及び(b)は分布帰還形レーザの1例を示
す断面図であ少、同図(a)は共振器に平行な断面、(
b)は共振器に垂直な断面を示す。
(C), Prior art and problems Figure 1 (a) and (b) are cross-sectional views showing an example of a distributed feedback laser.
b) shows a cross section perpendicular to the resonator.

図において、1はn型インジウム・燐(InP)基板、
2はn型InP閉じ込め層、3はn型インジウム・ガリ
ウム・砒素・燐(InGaAaP)ガイド層、4はIn
GaAaP活性層、5はp型InP閉じ込め層、6はp
 m I n P層、7はn型InP層、8はp型In
GaAsP層、9及び10は電極であシ、図に示す如く
、n型InP閉じ込め層2とInGaAsPガイド層3
との界面に回折格子が形成されている。
In the figure, 1 is an n-type indium phosphorus (InP) substrate;
2 is an n-type InP confinement layer, 3 is an n-type indium-gallium-arsenic-phosphorus (InGaAaP) guide layer, and 4 is an InP confinement layer.
GaAaP active layer, 5 is p-type InP confinement layer, 6 is p
m I n P layer, 7 is n-type InP layer, 8 is p-type In
The GaAsP layers 9 and 10 are electrodes, and as shown in the figure, the n-type InP confinement layer 2 and the InGaAsP guide layer 3
A diffraction grating is formed at the interface.

すなわち前記例においては、n型InP閉じ込め層2の
上表面を選択的にエツチングして縞状の周期的な凹凸を
設け、InPとは屈折率が異なるInGaAaPをこの
面上にエピタキシャル成長せしめて回折格子を形成して
いる。
That is, in the above example, the upper surface of the n-type InP confinement layer 2 is selectively etched to provide striped periodic unevenness, and InGaAaP, which has a refractive index different from InP, is epitaxially grown on this surface to form a diffraction grating. is formed.

この回折格子の周期Aは、発振ゼしめる元の真空中の波
長を入、光導波路の有効屈折率をnとするとき、 とすることが必要である。ただし式(1)においてtは
正の整数(1,2,3,・・・・・・)であって、理想
的にはt=1が望ましいが製造上の問題などを考慮して
選択される。前記例においては例えば小=i、55(μ
m)、n=1−3.26、t−2としてA’−p475
(nm)となる。
The period A of this diffraction grating needs to be as follows, where the wavelength in vacuum is the source of the oscillation and the effective refractive index of the optical waveguide is n. However, in formula (1), t is a positive integer (1, 2, 3,...), and ideally t = 1 is desirable, but it is selected in consideration of manufacturing issues. Ru. In the above example, for example, small=i, 55(μ
m), n=1-3.26, A'-p475 as t-2
(nm).

半導体基体面上の凹凸のパターンは、一般に基体上にレ
ジスト膜を設けて露光及び現像処理を行なうリングラフ
ィ法によってレジストパターンを形成し、このレジスト
パターンをマスクとして基体を選択的にエツチングする
ことによって形成される。しかしながら前記例の如くパ
ターンの周期Aが微少であシ、かつその値を選択制御す
る自由度が要求されるMi+記回折格子パターンの露光
処理に際しては、元を用いるリングラフィ法において通
常使用されているマスクを用いることは極めて困難であ
って、通常2元束干渉法によって露光が行なわれる。2
光束干渉法とは、単一波長のレーザ元を2本の光束に分
岐して2光束の光路差によって干渉縞を形成する方法で
あって、干渉縞の周期を角度によって容易に調整するこ
とができる。
The uneven pattern on the surface of a semiconductor substrate is generally created by forming a resist pattern using the phosphorography method, in which a resist film is formed on the substrate and then exposed and developed, and the substrate is selectively etched using this resist pattern as a mask. It is formed. However, in the exposure process of the Mi+ diffraction grating pattern where the period A of the pattern is minute and a degree of freedom is required to select and control its value, as in the above example, the phosphorography method using the element is usually used. Since it is extremely difficult to use a mask that does not require the use of a mask, exposure is usually performed by binary flux interferometry. 2
The beam interferometry is a method in which a single wavelength laser source is split into two beams and interference fringes are formed by the optical path difference between the two beams.The period of the interference fringes can be easily adjusted by changing the angle. can.

この露光後のレジストの現像処理は、あらかしめ試験的
な現像処理を行なって回折効率を測定し最大の効率が得
られる現像時間の最適値などの現像条件をめた後に、こ
の現像条件に従う様に管理している。しかしながら、露
光条件並びにfA像温度、現像液濃度の変動などによっ
て最適現像時間は大きく影響されて、最良の現像結果を
確保することは困難であ勺、実際には被処理半導体基体
を現像液から何度も取り出して現像処理している。
The development process for the resist after this exposure is carried out in advance by performing a preliminary development process, measuring the diffraction efficiency, and determining the development conditions such as the optimum value of the development time that yields the maximum efficiency, and then following these development conditions. is managed. However, the optimum development time is greatly affected by exposure conditions, fA image temperature, developer concentration fluctuations, etc., and it is difficult to ensure the best development results. I have taken it out and processed it many times.

また現像工程の終了後に不要なレジストが残存すること
がしばしばあ勺、この不要で有害なレジストを除去する
ためにプラズマアッシングを行なう場合がある。この場
合においてもあらかじめ試験的に処理時間をめてこれに
従って処理が行なわれているが、残存状態に変動もあシ
最適な処理を行なうことは更に困難である。
Further, unnecessary resist often remains after the development process is completed, and plasma ashing is sometimes performed to remove this unnecessary and harmful resist. In this case as well, the processing time is set experimentally in advance and the processing is performed accordingly, but it is even more difficult to perform the optimal processing due to fluctuations in the remaining state.

(d) 発明の目的 不発明は前記の如き状況に対処して、基体上にレタス1
膜によって縞状の周期的パターンを形成するための現像
処理等において、被処理半導体基体を01叶本却イ象前
方)ら取り出すことな(−一従ムトて処理時間が最適化
されるパターンの形成方法を提供することを目的とする
(d) Purpose of the Invention The invention is to deal with the above-mentioned situation and to prepare lettuce leaves on a substrate.
In the development process for forming a striped periodic pattern using a film, the semiconductor substrate to be processed is not taken out from the front of the image. The purpose is to provide a forming method.

(e) 発明の構成 本発明の前記目的は、基体上に設けたレジスト膜にエネ
ルギ線相互間の干渉による縞状の周期的パターンの露t
eを行ない、しかる後に該レジスト膜を感光させない光
束を該レジスト膜に朋射し、該光束の回折光によって前
記パターンの影状を監視しながら、該レジスト膜を選択
的に除去して前記パターンを形成する工程により速成さ
れる。
(e) Structure of the Invention The object of the present invention is to prevent the exposure of a striped periodic pattern on a resist film provided on a substrate due to interference between energy beams.
After that, a light beam that does not expose the resist film is irradiated onto the resist film, and while monitoring the shape of the shadow of the pattern by the diffracted light of the light beam, the resist film is selectively removed to expose the pattern. It is quickly formed by the process of forming.

(f) 発明の実施例 以下本発明を実施i+11によシ図面を参照して具体的
に説明する。
(f) Embodiments of the Invention The present invention will be specifically described below with reference to the drawings.

第2図はw、元されたレジスト膜を現像液に浸漬して現
像するに際して本発明が実施されている状態を示す模式
図である。図において、11は半導体基体、12は現像
処理中のレジスト膜、13は容器、14は現像液を示す
FIG. 2 is a schematic diagram showing a state in which the present invention is implemented when the original resist film is immersed in a developer and developed. In the figure, 11 is a semiconductor substrate, 12 is a resist film under development, 13 is a container, and 14 is a developer.

本実施例においては先に説明した如き半導体基体11上
に、レジスト(例えばシブレイ社A z1350)が例
えば厚さ250〔nm〕程度に塗布され、従来技術によ
る工程を経て、ヘリウム−カドミウム(He−Cd)レ
ーザの波長441.6(nm)の光束を用いる2元束干
渉法によって、例えば周期A=467 Cnm 、)の
縞状パターンの露光が行なわれ′Cいる。
In this embodiment, a resist (for example, Sibley's Az1350) is applied to a thickness of about 250 [nm] on the semiconductor substrate 11 as described above, and helium-cadmium (He- Cd) Exposure of a striped pattern with a period A=467 Cnm, for example, is performed by a binary beam interferometry using a laser beam having a wavelength of 441.6 (nm).

このレジスト膜12の現像処理を本発明の処理方法によ
って実施するために、従来技術によシ現像液14として
例えばシブレイ社MF312 :水=4:5の柘釈液を
使用して図示の如く浸漬する。
In order to develop the resist film 12 according to the processing method of the present invention, the resist film 12 is immersed as shown in the figure using, for example, Sibley's MF312: water = 4:5 dilution solution as the developer 14 according to the prior art. do.

現像処理中のレジスト膜12に本実施例においてはヘリ
ウム−ネオン(He−Ne)レーザの波長632.8C
nm:]の光束を図中実線で示す如く入射させて、破線
で示すその一次回折元の強度を監視する。現像の進行に
伴なって回折光が検出されて次第にその強度が増大する
が、これが極太となる時点で半導体基体11を現像液1
4から取出して通常の方法でリンスし、この後、パター
ンが形成されたレジスト膜をマスクとして半導体基体を
エツチングする。
In this example, a helium-neon (He-Ne) laser with a wavelength of 632.8 C was applied to the resist film 12 during development.
A light beam of nm: ] is made incident as shown by the solid line in the figure, and the intensity of its primary diffraction source shown by the broken line is monitored. As the development progresses, diffracted light is detected and its intensity gradually increases, but at the point when the diffracted light becomes extremely thick, the semiconductor substrate 11 is removed from the developer 1.
4 and rinsed in the usual manner. After that, the semiconductor substrate is etched using the patterned resist film as a mask.

本発明によってレジスト12を現像処理中に照射する光
束は、このレジスト12を感光させない波長であること
が必要である。また本実施例の如く一次回折元によって
監視するためには、光束の波長が回折格子の周期Aの2
倍以下であることが必要である。
According to the present invention, the light flux with which the resist 12 is irradiated during development processing needs to have a wavelength that does not expose the resist 12 to light. In addition, in order to monitor using the first-order diffraction source as in this embodiment, the wavelength of the light beam must be 2 times the period A of the diffraction grating.
It is necessary that the amount is less than twice that.

また第3図は現像処理後に残存する不要で有害なレジス
トをプラズマアッング法によって除去する本発明の実施
例を示す模式図である。図において、21は半導体4板
、22はパターン形成に必要なレジスト、23は不要で
有害な除去すべきレジストを示す。
Further, FIG. 3 is a schematic diagram showing an embodiment of the present invention in which unnecessary and harmful resist remaining after development processing is removed by a plasma Angling method. In the figure, reference numeral 21 indicates four semiconductor plates, 22 indicates a resist necessary for pattern formation, and 23 indicates an unnecessary and harmful resist to be removed.

本実施例においては前記実施例の処理で残存したレジス
ト23を除去するが、プラズマの生成は従来技術によシ
、例えば酸素(0,)を圧力1(Torr)程度でプラ
ズマ化する。このプラズマアッシングすなわちエツチン
グに際しても、前記実施例と同様に例えばHe −N 
eレーザ光をレジスト22及び23に朋射し、その回折
光の強度を検出してこれが極太となる時点で処理を終止
することによって、効果的に有害なレジスト23を除去
することができる。なおこの際にパターン形成に必要ナ
レジスト22もエツチングされて図中破線で例示する如
く変形するが、その変形量は、微小であるため特に支障
はない。
In this embodiment, the resist 23 remaining in the process of the previous embodiment is removed, but plasma is generated using the conventional technique, for example, oxygen (0,) is turned into plasma at a pressure of about 1 Torr. During this plasma ashing or etching, for example, He-N
By directing e-laser light onto the resists 22 and 23, detecting the intensity of the diffracted light, and terminating the process when the intensity of the diffracted light becomes extremely thick, the harmful resist 23 can be effectively removed. At this time, the resist 22 necessary for pattern formation is also etched and deformed as illustrated by the broken line in the figure, but the amount of deformation is minute and causes no particular problem.

以上説明した実施例では浸漬による現像及びプラズマに
よる不安レジストの除去を対象としているが、スプレー
法のJA、像或いはドライ現像尋についても本発明を適
用することができる。更に本発明は分布帰還形レーザの
回折格子の形成のみならず、類似する周期的構造の形成
の際に適用することができて、同様の効果を得ることが
可能である。
Although the embodiments described above are directed to development by immersion and removal of unstable resists by plasma, the present invention can also be applied to JA, image, or dry development using spray methods. Furthermore, the present invention can be applied not only to the formation of a diffraction grating for a distributed feedback laser, but also to the formation of similar periodic structures, and similar effects can be obtained.

尚本実施例では上記方法によシ縞状に形成されたレジス
ト膜をマスクとして半導体基体表面をエツチングしたが
、イオン注入等のマスクに用いてもよい。
In this embodiment, the surface of the semiconductor substrate was etched using the resist film formed in striped form by the above method as a mask, but it may also be used as a mask for ion implantation, etc.

(gン 発明の詳細 な説明した如く本発明によれば、微細な縞状をなす周期
的構造を形成するためのレジストマスクを、最良の状態
に容易かつ確実に形成することが可能となシ、回折格子
等を再現性良く且つ高効本に形成することができて、九
を応用するシステム等の進展に大きい効果を与える。
(g) As described in detail, according to the present invention, a resist mask for forming a periodic structure in the form of fine stripes can be easily and reliably formed in the best condition. , it is possible to form diffraction gratings and the like with good reproducibility and high efficiency, which has a great effect on the development of systems to which 9 is applied.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図(a)及び(b)は分布帰還形レーザの1例を示
すけ「面図、第2図及び第3図は本発明の実施例を示す
模式図である。 図において、11及び21は基体、12及び22はレジ
スト、13は容器、14は現像液、23は除去すべきレ
ジストを示す。
FIGS. 1(a) and 3(b) are plan views showing an example of a distributed feedback laser, and FIGS. 2 and 3 are schematic views showing embodiments of the present invention. 21 is a substrate, 12 and 22 are resists, 13 is a container, 14 is a developer, and 23 is a resist to be removed.

Claims (1)

【特許請求の範囲】[Claims] 基体上に設けたレジスト膜にエネルギ線相互間の干渉に
よる縞状の周期的パターンの露光を行ない、しかる後に
該レジスト膜を感光させない元来を該レジスト膜に朋射
し、該光束の回折光によって前記パターンの形状を監視
しながら、該レジスト膜を選択的に除去して前記パター
ンを形成する工程を有することを特徴とするパターン形
成方法。
A resist film provided on a substrate is exposed to a striped periodic pattern by interference between energy beams, and then a source that does not expose the resist film to light is irradiated onto the resist film, and the diffracted light of the light beam is A pattern forming method comprising the step of selectively removing the resist film to form the pattern while monitoring the shape of the pattern.
JP58243426A 1983-12-23 1983-12-23 Pattern formation Pending JPS60136278A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58243426A JPS60136278A (en) 1983-12-23 1983-12-23 Pattern formation

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58243426A JPS60136278A (en) 1983-12-23 1983-12-23 Pattern formation

Publications (1)

Publication Number Publication Date
JPS60136278A true JPS60136278A (en) 1985-07-19

Family

ID=17103690

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58243426A Pending JPS60136278A (en) 1983-12-23 1983-12-23 Pattern formation

Country Status (1)

Country Link
JP (1) JPS60136278A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62125622A (en) * 1985-11-26 1987-06-06 Mitsubishi Electric Corp Developing device
JPS63136625A (en) * 1986-11-28 1988-06-08 Tokyo Univ Manufacture of semiconductor element
JPH021530A (en) * 1987-10-20 1990-01-05 Fuji Photo Film Co Ltd Method for measuring shape variation of resist pattern
JPH02125683A (en) * 1988-11-04 1990-05-14 Nec Corp Production of diffraction grating
JP2006013449A (en) * 2004-05-26 2006-01-12 Ricoh Co Ltd Interference exposure device

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62125622A (en) * 1985-11-26 1987-06-06 Mitsubishi Electric Corp Developing device
JPS63136625A (en) * 1986-11-28 1988-06-08 Tokyo Univ Manufacture of semiconductor element
JPH021530A (en) * 1987-10-20 1990-01-05 Fuji Photo Film Co Ltd Method for measuring shape variation of resist pattern
JPH02125683A (en) * 1988-11-04 1990-05-14 Nec Corp Production of diffraction grating
JP2006013449A (en) * 2004-05-26 2006-01-12 Ricoh Co Ltd Interference exposure device
JP4658670B2 (en) * 2004-05-26 2011-03-23 株式会社リコー Interference exposure apparatus and image forming apparatus

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