JPS60130276A - Editing recorder of video signal - Google Patents

Abstract

PURPOSE:To give always a sequential address when video information is edited, by storing the address of an already recorded part in an address counter and adding every prescribed unit to this address to obtain a new address. CONSTITUTION:When a start address is inputted from an input device 30, this address is stored in an address register 31, and a substractor 32 is set to a prescribed value. A VTR 20 is set to the reproducing state, and video information including address data is read out from an already recorded track and is supplied to an address extracting circuit 9. Obtained address data is written in an address counter 4. Address data in this address counter 4 is applied to comparators 33-35; and by the coincidence output of the comparator 33, a video switch 26 is switched to set to recording state, and contents of the address counter 4 are step-advanced by a vertical synchronizing signal of the source side. Thus, a new address sequential to the address of the already recorded part is added to each track recorded by the VTR 20.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field 1] The present invention relates to a video signal editing and recording device.

[Prior Art] In a system in which video information is edited under computer control using a plurality of video tape recorders (\71''R), a method has been proposed to visually represent edited data. In order to automatically search for information recorded on a videotape, it was not possible to assign an address to each recording track, for example.

1) The present invention automatically performs predetermined 1)1.
It is an object of the present invention to provide a device that can multiply consecutive addresses by l=1 for each location.

[composition] An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is an overall block diagram of a video signal recording circuit according to the present invention. First, a source side video signal (S) is input to a synchronization separation circuit 1 and an address insertion circuit 2. Video signal sources (S) include ＼11'R for playing original tapes, and PCM with data information (・μ).
It is a processor. The output of the synchronization separation circuit 1 is processed by a tarock oscillator (1) to generate a clock for inserting an address, preferably only in a plurality of horizontal periods of the overlap blanking period. It is generated by the parallel/serial converter 51, sent to the address insertion circuit 2 using the clock from the clock oscillator 3, and multiplexed with the video signal. It is input to the video TN terminal of R2 (+), and is input to the magnetic tape by the recording head 22 through the recording amplifier 21. This serves as a clock input for the address counter 4. The negative input terminal of the antenna gate 7 receives a signal from the Q output terminal of the flip 70 which is in the 7/1 state during recording.

\'1 Video OUT of the river 2 () 11S cow, video obtained from the T end T-20a (M number is the address information formed by the analog humparator (1'l'1) where 111 raw video signal Address data included in the address data, which is sequentially incremented by 1 for each rack, is extracted and a dental signal representing this address is output.

The extracted address data is applied to a serial/parallel converter 10 and converted into parallel data. This parallel signal is supplied to the parallel input terminal of address counter 1 and a) S-less determination circuit 11. Judgment circuit 11
If it is determined that there is no error in the address data, the load pulse passes through the AND gate 12 and is output to the address counter 4.
is input, the address counter counts the address counter, and reproduces the data. One input terminal of the AND date 12 is connected to the Q output terminal of the flip 70 tube 8.

Note that a clock pulse from the clock oscillator 3 is also sent to the serial/parallel converter 10.

13 is a monitor television that reproduces image information output from the VTR 2o.

In order to calculate the start point and the 1' point of the 1st edition, enter the start address 31 and the end address 31, 'i' from the input device 30 using a keyboard or the like.
2! Information is input to l. The star) address entered manually from the input device 30 passes through the subtracter 32 and becomes a single input to the comparator 33.
is entered directly into The end address is determined by the comparator 35. The output of the written address counter...1 is connected to the other ratio of the three comparators 33°R, 1, :45. The output is
\7Input to REC terminal 20dt of TR20. .

Comparison: (: The coincidence output of Shang 3 is also the set of I (l': C7 ring 70 knob 3) via the or date 36, the set of oak W-r (th A pulse signal A is applied from the human-powered device 30 to the input terminal r of the other side, and a 1° comparison 2', '= 3-1 coincident output 1iV TR20
The PI-AY human power 1Ij111r20(・ gives the human power. The matching output of the comparator 35 is \' T R2(l ST(
N:) is input to the input terminal, and RI': resets the C flip-flop 8.

1. It is considered to be human-powered.

Next, the circuit in \r+<2o will be explained.

The cell 1 input terminal of the flip 70 amplifier 23 is connected to the RIΣC input terminal 20d, and the reset input terminal is connected to the S'"0Y" input terminal 20[.
The Q output terminal of the 0 tube 22 is connected to the recording amplifier 21 of the TRza, and is also connected to one input terminal of the AND gate 24, and the (N output terminal is connected to the AND gate 2
Connected to one input terminal of 5, each ant game 1.24
．． The other input terminal of 25 is P1. , AY terminal 20
connected to e. The outputs of each ANDA 1 and 24 are connected to switch the video switch 2G to the RPC/PLAY side, and the output of the ANDA 125 to the PLAY side.

According to the above diagram J&, when a signal is input to the RFC input terminal -, the 7 lip 70 knob 23 is sent, the video switch 2G is set to the REC/I゜LAY side, and Pl,,A
When only a signal is input to the 't' terminal -20c, the video switch 2G is switched to the PLAY side.

The P/T switch 26 is RE C/I'LA''
1' To the flood river (when the sword was replaced, the recording head was in the evening, k
The image state is switched to the PI, AY side, etc. b is in the playback state.

Input to the ST (month' terminal 20) resets the flip 70 terminal 3. In addition, with the PLAY 5 TOP input, tape ropeing, unloading, etc.
' Normal operation of R2fl is performed. Also, the tape head sensor to check the beginning of the tape → J-28 is believed to be the amplifier 29. The signal is output through the terminal 201 and is used as a clear input for the address counter 4.

In order to synchronize the source side and recording side \iTR, please record the signal synchronously separated from the source side video signal.
This is the servo input for the I side ＼“TR2+1 motor.

1: The operation of the Hanawa 11 collection will be explained using the J and l- configurations. Second
The figure is 1.1 lecture 111, 11:j's huff: ll'tape' ``Upper trunk and various parts 111] + Gu's belief J5g
This is shown formally, with the diagonal line of tape ``2'' and the top line or 1
11j)J, later, the dashed line indicates the rack.

Now, from the human-powered device 3O to the device A in Figure 2 α) 11 sites.
When the star 1 address is input, the star 1 address is recorded in the address register 31. On the other hand, the subtracter 32 is set to -5, for example. Also, when you input the last end address to be recorded, the end address register 32
Stored as 0.

Here, when the PLA Y switch (not shown) of the \'TR20 is turned on to enter the playback state, the video information including the address data read out by the recording head 22 from the recorded track passes through the amplifier 27 and is extracted from the address. The address data is applied to the address detection circuit 9, and the address data is extracted, converted into a parallel signal by the serial conversion circuit 1O, and stored in the address counter 4.

The content of the address counter 4 is rewritten as the address changes as the videotape progresses on the VTR2.

The address data of this 71 + address counter '1 (in this state, the address of the recorded part) is converted from a parallel signal to a serial signal by the conversion circuit 5 and applied to the address insertion circuit 2.

Further, the address data in the address counter 4 is applied to comparators 33-35.

Then, when the videotape position of \'TR20 on the refuder side reaches the position 5 addresses ahead of the start address - Y, the comparator 33 generates a match signal, and this match signal is Rr:
', Flip 70 knob 2 via CDini R20d:
3 is applied to the set input terminal of the flip-flop knob 3 to make it 7/1.

Then, the Q output of the flimp flop 23 starts the single EC amplifier 21, and the audio signal supplied from the source side and the RI' of the video switch 26: C
/I)L 7\)'; ii is supplied with (1
Lip 70 Knob 3 (Set Waist Antogebia)
Full. Therefore, within address counter 1,
,°fuha, source 11111 il'i; i7r same 11
)1ia i1. Futakami is one suru, il','r
Ru.

To Sarah, \'i'' The videotape in R2n progresses,
When the star door IS'res is reached, the comparator 3.1 will produce a match, Ill, force. This match output is AND gate 2
・1 as i(, - pull, flip 70 knob 23 0
1A, , JJ are applied to the video switch 26, and this is switched to the 1<EC/PLAY side.

Therefore, a video signal applied from the source side via the RFC amplifier 21 is applied to the video switch 2G via the video switch 2G, and the video signal is recorded in the portion to the right of the start in FIG. On the other hand, address counter 1
Since the content of is incremented according to the vertical synchronization signal in the video signal, it is an address that is continuous with the address of the recorded part. inserted into the video signal.

Therefore, each track of the videotape on which the VTR 20 1) records is recorded. '+7il!
A new address consecutive to the current address is incremented by 1·l.

~' When the videotape on the TR20 side reaches the position stored in the encoder 320, the comparator 35 outputs a coincidence signal, and the
, 23 and stop VTR2+1.

When the video switch 2G is switched as described in ``U'', the output a of the REC amplifier 21 and the signal 1) of the switch 26 are synchronized with the TV signal and the address information (same), so the image is Of course, there should be no confusion or omissions, but the addresses must also be written consecutively. From this, it is possible to reduce the number of guard tracks when repeating information many times and read the information on the tape. It becomes possible to decrease the density by -1. Nao;, with saw 11
111 Video Signal 1 To add some additional information, when the source is a VTR with a moving image 10 raw, recording is performed with coordination between the source side and the recorder side.

When the source is digital information such as IICM, the data read from the memory is input as a video signal through the 'r' CN4 processor, so there is no need for tracking.
above it<, the comparator (33) or (3,t)
All you have to do is send J to the memory side (input system) and make sure the timing is correct.

The 3rd I' numeral 1 indicates the position of the address data in the video signal. A>), so it was placed before the synchronization signal. In case (A), the address and its corresponding information are stored in the same track (field), or in case (B), the address is stored in the previous track. If you don't do this, it will be inconvenient to read the data first before reading the address when searching.

Next, using the apparatus shown in FIG.
A case will be described in which a dummy area is recorded at address 1 (near, na, 0 to 5 old).

The video signal includes, for example, a black dummy video signal, a synchronization signal, and an address signal. First, start up \jTR20 and cue the beginning of the videotape. Here, the address insertion circuit l[ is cleared to 0 by the output of the tape head sensor 28. Then, set the end number 00 iya to the end 7F resu-rensuta 320. Next, turn on the start switch (not shown) in the human power device 30, and turn on the terminal 3.
When a pulse is output to 0a, RFC flip 70)
(Sera), i-le. After sono, VTR2+1 R1”:
Turn on the C/PLAY switch (not shown) to start recording.

Since the videotape is at the cue position, the address force/interval 41 () is applied for 1 moment, and when the video tape reaches address 5 fl f'1, the comparator 35 outputs a match signal and outputs ν. "Stop TR2 ('). Then, after address 50 (), select the desired video (No. 11 by 1: self fJ') by the above-mentioned !FJJ work.

Also, instead of using the method described in 1-, it would be a good idea to record the P address from the beginning to the end of the videotape91,-
In the method described in S4., the video signal is recorded at an arbitrary position. Take it.

Effects 1 and 1 As described above, according to the present invention, the address of the recording Rk iM portion of the video tape on the recording side is stored by an address counter, and when a new video signal is input, .1-) Add a predetermined number to the contents of the address counter, set the new address to 1, and insert the video tape 1 as personal data, so always Continuous addresses can now be stored on the video tape 1-, and highly reliable addresses can be cut off during editing, making it possible to improve the accuracy of information retrieval.

[BRIEF DESCRIPTION OF THE DRAWINGS] Fig. 1 is a block diagram showing one embodiment of the present invention, Fig. 2 is an operation time chart showing the operation of the device shown in Fig. 1, and Fig. 3 is a block diagram showing an embodiment of the present invention.
The figure is a waveform diagram showing the insertion position of address data. 1... Synchronization separation circuit, 2... Address insertion circuit 1.
1... Address counter, ≦3... A1+゛ address extraction circuit, 2f'1. , 8; T I, 23...Flip 70 knob, 3()...Manual device, 31...Also start address register, 32...Subtractor, 33,
3.1... Comparator. Waiting applicant Ricoh Co., Ltd. Agent Patent attorney Ao 111 Fugai 1 procedural amendment (spontaneous) 1981 3 几・1'5\Japanese Patent Office Director General M'''' ] Case indication 1988 patent Application No. 238503 2. Name of the invention Video signal editing and recording device i<i: 3. Relationship with the case of the person making the amendment Patent applicant 4. Agent 5. Amendment order E1 I τ Spontaneous 6. Subject of amendment: Specification Kaede 1 and drawings in Detailed Description of the Invention of -; wealth (帛 i 5+3-・ PA ′ (gu (1) Specification, page 5, line 1, r32o” has been corrected to [361). (2) Page 5, line 4, “3-4. aJ” is “3.
i,,corrected to 1. (3) On page 5, line 10, [36] was corrected to [6-1]. (4,) 6th page, line 4, [22] is corrected to 23j. (5) Switching is possible according to the configuration described in r-1-, 6th line, 13th to 17th page. -1 is rPI-7A
The Y input is the flip 70 knob 23 set, and the video switch 26 is set according to the riat status.Rn C/PL A)'
switch to the side and PLAY side. Corrected to 1. (6) Page 7, lines 1 and 2 [5T (H' terminal...
··Reset. Delete 1. (°7) Page 8, line 3, 132 (11 and 1361)
On the 11th floor. (8) Page 9, line 53 “1F video signal and 1 [
Correct the video signal to -1. (1)) Same number 0M, 1 i line l and 36” is replaced with “6
Corrected to 1. (l f'l) 1st page 1 (), line 16, ``32 (river and aru'' is changed to 136I. 1 correction. (d) 12th page, 15th line 11r32 + '31 is corrected to ``36'' i11 (12) Page 12, line 16, 1.1 "Start" was corrected to 01. (13) Figure 1 was corrected as shown in the attached sheet.

Claims (1)

[Claims] (1) A counter for storing address data attached to the recorded portion of the recording medium (2), a video signal recording/reproducing device, means for setting the address of the portion to be recorded, and a setting means. a control means for driving the recording and reproducing device d in a reproducing mode until the recording medium reaches a set address, and switching to the recording mode when the set address is reached; ￥l This is power 1 in playback mode.
1. A video signal editing and recording device comprising: means for supplying a signal to a counter for adding one rank to an address stored in a counter.