JPS60128865A - Large power fet drive circuit - Google Patents

Abstract

PURPOSE:To accelerate the switching speed of a large power FET by driving the FET by an impedance converter of a low output impedance. CONSTITUTION:FETs 5a-5d are driven by a low impedance by inserting impedance converters 16a-16d between the secondary windings of insulated transformers 8a, 8b and the gates of the FETs 5a-5d. Since the impedance of a drive source is sufficiently small even if relatively large input capacity is presented at the FETs 5a-5d, the charging and discharging time constants for the input capacity can be reduced. As a result, the time for turning the FETs 5a, 5b, 5c, 5d ON and OFF, i.e., the time for turning ON and OFF can be shortened.

Description

[Detailed Description of the Invention] <Technical Field of the Invention> - This invention relates to a high-power FET drive circuit used for example in a switching regulator, etc., and particularly aims to provide a high-power FET drive circuit that enables high-speed switching operation. It is something.

<Background of the Invention> (1) For example, as a method of switching regulators, commercial power is directly rectified and smoothed without going through an isolation transformer, the rectified and smoothed DC voltage is intermittent by a switching element, and the intermittent current is passed through the transformer. It is applied to the primary winding, converted from the secondary winding of the transformer to a secondary alternating voltage with a desired voltage, rectified and smoothed the secondary alternating voltage, and applied to a load such as a computer. There are devices that operate so as to always apply a predetermined voltage to a load by comparing the detected voltage with a reference value, detecting the deviation value, and equalizing the switching signal.

At this time, the switching frequency is set to 100 KHz, for example.
By increasing the power to a certain extent, it is possible to use a small-sized switching regulator. Also, since capacitors, coils, etc. can be used with small capacitance and inductance values, the switching regulator can be made compact.

However, driving a high power FET at such a high frequency causes the following disadvantages.

(2) Due to its structure, a high power FET has a relatively large input capacitance when viewed from the gate. By the way ■. , -0 volts Ci#1500PF, Vcs=10 volts Ci''
It becomes 4000PF.

Even with FETs for high power applications, the input capacitance has such a large value that it is difficult to perform high-speed switching operations of about 100 KHz.

<Prior Art> Figure 1 shows the circuit structure of a conventional switching regulator. In the figure, 1 indicates a commercial power source. A commercial power supply voltage having an effective value of 100 volts is rectified and smoothed by a rectifying and smoothing circuit 2 to obtain a DC voltage of about 280 volts between terminals 3 and 4, and this DC voltage is applied to a switch circuit 5. The switch circuit 5 includes four FETs 5 a, 5 b, 5 c, and 5 d.
are bridge-connected, and the primary winding of the output transformer 7 is connected between the output points of the bridge circuit.

Four FETs 5a constitute the switch circuit 5.

An isolation transformer 8a (3
), 8b are connected to drive circuits 9a and 9b, and drive pulses are applied from the drive circuits 9a and 9b to each of the FETs 5a, 5b, and 5C15d. In other words, FET5a, 5d and 5
Driving pulses of the same phase are applied to b and 50, and an alternating current is output to the primary winding of the output transformer 7.

The winding ratio of the output transformer 7 is selected to obtain the alternating voltage required by the load 11 in the secondary winding of the output transformer 7, and the alternating voltage obtained by the secondary winding is passed through the rectifying and smoothing circuit 12.
The output voltage is rectified and smoothed, and the smoothed output voltage is supplied to the load 11.

13 indicates a feedback circuit. That is, the voltage supplied to the load 11 is compared with the reference voltage E by the voltage comparator 14,
The deviation output is supplied to the pulse width modulator 15. The pulse width modulator 15 outputs pulses Pa and Pb having mutually opposite phases from two output terminals 15a and 15b. The pulse widths of these pulses Pa and Pb are centered on the pulse width when the voltage supplied to the load 11 is at the specified value, and when the voltage becomes lower than the specified value, the pulse width becomes wider, and the voltage becomes the specified value (4
) As the value increases, the pulse width changes to become narrower. The pulses pa and pb are applied to the drive circuits 9a and 9b, and the pulses Pa and Pb drive the FETs 5a, 5bs5c, 5
By controlling d on and off, the voltage applied to the load 11 is controlled to a specified value.

<Conventional drawbacks> Although this structure operates so that the voltage supplied to the load 11 is constant, conventionally each FET 5
Since FETs a to 5d are directly driven via isolation transformers 8a and 8b, there is an upper limit to the switching frequency due to the influence of the input capacitance formed between the gate and source of each of FETs 5a to 5d. In particular, a high-power FET with a large current capacity has a large input capacitance value, so the upper limit frequency is suppressed to a low value.

In other words, even if the output impedance of the drive circuits 9a, 9b is designed to be a sufficiently low value, since the drive circuits 9a, 9b are driven via the isolation transformers 8a, 8b, the winding resistance of the isolation transformers 8a, 8b is d (5) It is connected in series with the input capacitor to form a time constant circuit. For this reason, it takes time for the gate signal to rise and fall, and when changing from an on state to an off state and vice versa, the time in which the gate signal remains in the clogged active state, which is an intermediate state between on and off, becomes longer. In the active state, a voltage is applied between the drain and the source, and a current also flows between the drain and the source, so the power loss between the drain and the source, that is, the switching loss, increases, leaving the safe operating area, and these FETs 5a to 5
This is because an accident may occur that could damage the d.

For this reason, the drive circuits 9a and 9b are directly connected to the gates of the FETs 5a to 5d without using the isolation transformers 8a and 8b.
It is conceivable that the driving circuits 9a and 9b directly switch and drive the FETs 5a to 5d, but the driving circuits 9a and 9b
9b, for insulating the common potential of the load 11, the rectifying and smoothing circuit 12, and the feedback circuit 13 from the commercial power supply 1;
Since there is a difference in the reference potential of each gate, the isolation transformers 8a, 8b and the output transformer 7 are always required (6).

<Object of the invention> FETs 5a to 5d that operate as inventive switches
is driven by a low impedance circuit and is not affected by the input capacitance of FETs 5a to 5d.

Therefore, it is an object of the present invention to provide a high power FET drive circuit capable of switching drive at high frequencies.

<Summary of the Invention> In the present invention, an impedance conversion circuit using an active element is inserted between the secondary windings of the isolation transformers 8a and 8b and the gates of each switching FET 5a to 5d, and this impedance conversion circuit converts each switching FET. is configured to drive at low impedance, and the drive pulse signal induced in the secondary winding of the isolation transformer is rectified and smoothed, and the rectified and smoothed DC voltage is supplied as a power source for each impedance conversion circuit. It is characterized by its structure.

With such a structure, each impedance conversion circuit can operate in an insulated state for each FET, so that the circuit structure can be configured simply.

<Embodiment of the Invention> FIG. 2 shows an embodiment of the present invention. In FIG. 2, parts corresponding to those in FIG.

In this invention, impedance conversion circuits 16a, 16b, 16c, 16d with low output impedance are constructed by active elements between the secondary windings of the isolation transformers 8a, 8b and the gates of the FETs 5a, 5b, 5C15d.
The structure is such that the Since each impedance conversion circuit 16a to 16d has the same structure, only 16a is specifically shown. Each impedance conversion circuit is composed of a transistor 17 and two complementary-connected transistors 18 and 19 of opposite conductivity type,
A common emitter connection point of two complementary-connected transistors 18 and 19 is connected to the gate of each FET 5a, 5b, 5c, and 5d. Imp (8) - Each transistor 17 of the dance conversion circuit 16a-16d
A parallel circuit consisting of a resistor 21 and a speed-up capacitor 22 is connected in series between the base of the insulating transformer 8a and one end of the secondary winding of the isolation transformer 8a, 8b. The other end of each secondary winding is connected to the connection point between the emitter of the transistor 17 and the collector of the transistor 19, and this connection point is connected to each of the FE75a to
Connect to the drain of 5d. A diode 23 and a resistor 24 connected in parallel with the secondary windings of the isolation transformers 8a and 8b.
, and capacitor 25 is a waveform compensation circuit.

Furthermore, the structure of the present invention is characterized in that the power supply for operating each of the impedance conversion circuits 16a to 16d is rectified and smoothed to obtain a DC voltage by rectifying and smoothing the signal voltage induced in each secondary winding, and the impedance conversion is performed using this DC voltage. circuit 16
8 to 16d are configured to operate. In the figure, a rectifying and smoothing circuit 28 is constituted by a diode 26 and a capacitor 27.

<Operation of the invention> (9) As described above, the secondary windings of the isolation transformers 8a and 8b and the
By inserting impedance conversion circuits 16a-16d between the gates of ET5a-5d, FET5a-5
d is driven with low impedance. Yotsute FET5a
Even if a relatively large input capacitance exists between 5d and 5d, the charging and discharging time constants for the input capacitance can be made small because the impedance of the drive source is sufficiently small. As a result, the time required to turn on and off the FETs 5a, 5b, 5c, and 5d, that is, the turn-off and turn-on times can be shortened, and switching can be performed at high speed.

<Effects of the Invention> As described above, according to the present invention, the high power FET t-
Impedance conversion circuit 16a with low output impedance
By adopting a structure driven by ~16d, the FET
The switching speed of 5a to 5d can be greatly increased, and the switching loss can be reduced. Further, according to the present invention, each impedance conversion circuit 16a to 16
Since the power supply (10) of d is configured to obtain the signal by rectifying the signal applied to the secondary windings of the isolation transformers 8a and 8b, the power supply circuit to each impedance conversion circuit 16a to 16d is simplified and manufactured at low cost. be able to.

In other words, in order to configure each impedance conversion circuit 16a to 16d to be supplied with power from the power supply circuit, a DC power source is created that is DC-insulated from each other, and power is supplied from each power source to the impedance conversion circuits 16a to 16d. Must. Therefore, this power supply circuit becomes expensive.

However, according to the present invention, the operating power source is obtained by rectifying and smoothing a part of the transmission signal, which has the advantage of lower costs.

In FIG. 2, the power supply circuit 28 that supplies the impedance conversion circuits 168 to 16d is a half-wave rectifier circuit, but it can be made into a double-wave rectifier circuit by using the secondary winding of the isolation transformer 8 with a center tap. You can also do it.

Although the circuit of the present invention is used in a switching regulator, it is easy to understand that it can be used in other devices.

[Brief explanation of drawings]

FIG. 1 is a connection diagram for explaining a conventional switching regulator, and FIG. 2 is a connection diagram for explaining an embodiment of the present invention. l: Commercial power supply, 5a to 5d: High power FB, T. 7; Output transformer, 8a, 8b: Isolation transformer, 9a,
9b: Drive circuit, 11: Load, 13: Feedback circuit, 16a
~16d: Impedance conversion circuit, 28: Rectification and smoothing circuit. Patent Applicant: Takeda Riken Kogyo Co., Ltd. Agent Takashi Kusano Procedural Amendment (Method) June 1, 1980 1, Indication of Case Patent Application 18851/1982, Title of Invention High Power FET Drive Circuit 3, Amendments to be made Relationship with the Patent Case Patent applicant (Shipping date: May 29, 1980) 6. Subject of amendment Description 7. Contents of amendment

Claims (1)

[Claims] (1) A: a high-power FET driven via an isolation transformer; B: an active circuit for impedance conversion connected between the secondary winding of the isolation transformer and the gate electrode of the high-power FET; C0: A high-power FET drive circuit comprising: a rectification and smoothing circuit that rectifies and smoothes a drive signal induced in the next winding and provides a power supply voltage to the impedance conversion active circuit.