JPS60128549A - Nonvolatile raw having automatic storage function - Google Patents

Abstract

PURPOSE:To protect simply the content of a memory at power fault by detecting that a power supply voltage drops to a prescribed level, and transfering automatically a data in a RAM area to a nonvolatile memory area. CONSTITUTION:The charging to an externally mounted capacitor 4 is finished during normal operation. When the power supply voltage drops and is lower than a voltage value Ej1, a switch SWa is turned off to hold a voltage stored in the capacitor 4. When the power supply voltage drops and is lower than the voltage value Ej2, a switch SWc is turned off and also a switch SWb is set and the electric charge stored in the capacitor 4 allows an internal electronic circuit 2 to transfer from the RAM area 2a to the nonvolatile memory 2b. The transfer of data is finished by allowing the internal electronic circuit itself to generate a timing pulse requested from the memory. When the transfer is finished, the switch SWc is turned on again.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a nonvolatile RAM that is a combination of a RAM and an electrically rewritable nonvolatile memory.

Conventional non-volatile RAM transfers data in the RAM area to the non-volatile memory area by applying a control signal that instructs the transfer to the control terminal, so it is difficult to transfer data from the RAM area to the non-volatile memory area by applying a control signal to the control terminal. If you want to transfer data in the RAM or LI area to a nonvolatile memory area for preservation in the event of a power failure, you will need a circuit external to the chip that detects an abnormality in the power supply voltage and generates a transfer control signal. It is necessary to continue supplying power to the internal electronic circuit of the nonvolatile RAM for the 101 days until the transfer is completed, and this has the disadvantage of being difficult to actually achieve.

In order to solve these drawbacks, the present invention uses a circuit that detects changes in the power supply voltage and a plurality of switches constituted by MQS transistors built into the chip, and a capacitor externally attached to the chip to adjust the power supply voltage in advance. It detects the drop to a certain level and automatically transfers the data in the RAM area to the non-volatile memory area, making it possible to preserve the memory contents in the event of a tti error, which was previously difficult. BRIEF DESCRIPTION OF THE DRAWINGS The present invention will be described in detail below with reference to the drawings.

FIG. 1 shows an embodiment of the present invention, in which 1 is a power supply terminal, 2
The internal electronic circuit 3 consisting of RAM, nonvolatile memory, and their peripheral circuits is an external capacitor terminal, and sw
a is a MO8I-transistor switch connected between power supply terminal 1 and external capacitor terminal 5, and swb is an MQS switch connected between internal electronic circuit 2 and external capacitor terminal 5.
) The transistor switch swc is a MOS transistor switch connected between the power supply terminal 1 and the internal electronic circuit 2, and the above three switches swa and sw
By controlling b and swc according to changes in the power supply voltage, data in the RAM area is transferred to the nonvolatile memory area.

Figure 2 shows the three switches s for changes in power supply voltage.
This indicates the operating status of wa, swb and θwe.When the power is turned on, switch 8we turns on, supplies power to internal electronic circuit 2, and also switches on internal electronic circuit 2#.
'ia) is set to a predetermined initial state. Next, when the power supply voltage rises and exceeds the voltage value Bil, switch e
wa is turned on, sending charge to external capacitor 4 and starting power supply. When the voltage of the current increases further and reaches a voltage that allows normal operation, normal RAM operation becomes possible, and photoelectric transfer to the external capacitor is completed during this normal operation. Thereafter, when the FPL source voltage drops and becomes lower than the voltage value Ei1, the switch swaiJ- is turned off to prevent the charge stored in the capacitor from escaping. Furthermore, when the power supply voltage drops and becomes lower than the voltage value Ei2, the switch SWC is turned off and the switch swb is turned on, and the internal electronic circuit 2 is activated by the charge stored in the capacitor.
t Data is transferred from M area 2a to nonvolatile memory 2b. This data transfer is completed by the internal electronics themselves generating the required timing pulses to the memory.

When the transfer is completed, the switch SWC is turned on again.

In this way, if the power supply voltage drops due to some external cause, simply connecting a capacitor of the specified capacity to the capacitor terminal 6 without adding any external electronic circuit will automatically reset the KRAM.
This has the advantage that data is transferred from the area to the nonvolatile memory area, and the contents of the memory can be prevented from being lost.

In addition, if for some reason you do not want to perform auto store, there is a control terminal (not shown) that prohibits auto store. By fixing either one to the other, there is an advantage that it can be easily replaced with a non-volatile RAM that does not have an auto store operation.

Furthermore, in the connection configuration of the internal electronic circuit and the switch shown in FIG. 1, during normal RAM operation, the internal electronic circuit 2
is supplied with current by conducting the switch θwe from the power supply terminal 1, but if the operating speed of the RAM is fast or the internal electronic circuit 2 consumes a large amount of current, increase the current capacity. Therefore, the area of the MOS transistor constituting the switch SWC must be increased, which is disadvantageous because it lowers the degree of integration. Therefore, as shown in Fig. 6, by directly connecting the part 2' of the internal electronic circuit that does not need to be supplied with power during auto store operation to the power supply terminal 1, the switch owe can be made smaller. can be done, and
During auto store, the electric charge stored in the external capacitor 4 does not need to be consumed by the portion 2' of the internal electronic circuit that is unrelated to auto store, so the capacitance of the capacitor 4 can also be small, which is advantageous in terms of circuit implementation. It is.

Data stored in nonvolatile memory by auto store is automatically transferred to RAM when the power supply voltage reaches the appropriate voltage value when the power is turned on or after recovery from a momentary power outage. By doing this, even if a power failure occurs, the same data as before the power failure has been transferred to the RAM, so it can be read without any problem.
This has the effect of allowing AM operation to continue.

[Brief explanation of the drawing]

Figure 1 is a circuit configuration diagram of an embodiment of the present invention, Figure 2 is a diagram showing the operation of three switches that are useful for changing the power supply voltage, and Figure 6 is a circuit diagram of another embodiment of the present invention. This shows that. 1...Power terminal, 2...Internal electronic circuit, 2a...
・RAM 2b...Nonvolatile memory, 5...Capacitor terminal 4...External capacitor, swa, swt+
, ewc・-x inch, 2′...Part of the internal electronic circuit. Applicant: Seiko Electronics Industries Co., Ltd.

Claims (2)

[Claims] (1) In an integrated circuit consisting of a RAM and electrically rewritable nonvolatile memory incorporated one-to-one for each bit in a semiconductor integrated circuit chip, when the power supply voltage drops or the power is turned off, the chip Data in the RAM area is transferred to the non-volatile memory area by multiple switches composed of an external capacitor and a MOS transistor built into the chip, and is automatically transferred to the RAM area.
Non-volatile RAM that has an auto store function that makes it possible to make the data in it non-volatile. (2) The plurality of switches include a switch provided between the power supply terminal and the external capacitor terminal, a switch provided between the external capacitor terminal and the internal electronic circuit, and a switch provided between the internal electronic circuit and the power supply terminal. The plurality of switches are configured to turn on and off according to a plurality of preset voltage ranges according to a detected change in power supply voltage.
Non-volatile RAM0(3) having an auto store function according to claim 1, which is controlled to be turned off.
The auto store function is inhibited by fixing the control terminal that inhibits the function to one of the binary potentials of the power supply voltage. Nonvolatile RAM0(4) having an auto store function according to claim 2, wherein a portion of the internal electronic circuit that does not operate the auto store function is directly connected to a power supply terminal. Or a non-volatile RA with an auto store function as described in Section 5.
M0