JPS60127056U - optical receiver - Google Patents

optical receiver

Info

Publication number
JPS60127056U
JPS60127056U JP1984013863U JP1386384U JPS60127056U JP S60127056 U JPS60127056 U JP S60127056U JP 1984013863 U JP1984013863 U JP 1984013863U JP 1386384 U JP1386384 U JP 1386384U JP S60127056 U JPS60127056 U JP S60127056U
Authority
JP
Japan
Prior art keywords
voltage
optical receiver
circuit
voltages
raised
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1984013863U
Other languages
Japanese (ja)
Inventor
内藤 清吾
馬淵 浩
田村 年司
Original Assignee
日立電線株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日立電線株式会社 filed Critical 日立電線株式会社
Priority to JP1984013863U priority Critical patent/JPS60127056U/en
Publication of JPS60127056U publication Critical patent/JPS60127056U/en
Pending legal-status Critical Current

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  • Optical Communication System (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

−第1図は従来回路の一例を示す回路図、第2図は従来
回路の各部の波形を示す説明図、第3図は本考案回路の
一実施例を示す回路図、第4図及び第5図は、従来回路
と本考案回路の各部の波形を比較して示す説明図である
。 1:受光素子、2:増幅器、3:増幅器、4゜5:抵抗
、6:ピークホールド回路、7:レベルシフト回路、8
:比較回路、9:ピークホールド回路、10ニレベルシ
フト回路、11ニスイツチング回路。
- Fig. 1 is a circuit diagram showing an example of a conventional circuit, Fig. 2 is an explanatory diagram showing waveforms of various parts of the conventional circuit, Fig. 3 is a circuit diagram showing an embodiment of the circuit of the present invention, Figs. FIG. 5 is an explanatory diagram showing a comparison of waveforms of various parts of the conventional circuit and the circuit of the present invention. 1: Photodetector, 2: Amplifier, 3: Amplifier, 4° 5: Resistor, 6: Peak hold circuit, 7: Level shift circuit, 8
: Comparison circuit, 9: Peak hold circuit, 10: Two-level shift circuit, 11: Niswitching circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 直流成分を有する伝送符号の受信に使用されるディジタ
ル光受信器において、信号振幅の172の電圧を発生す
るピーク検出回路と、光入力がない場合の電圧から所定
の電圧たけ引き上げた電圧を発生する回路を備え、両者
の電圧を比較して高い方の電圧を信号のス“レツシュホ
ールド電圧トして構成されたことを特徴とす色光受信器
A digital optical receiver used to receive transmission codes having a DC component includes a peak detection circuit that generates a voltage of 172 signal amplitude, and a voltage that is raised by a predetermined voltage from the voltage when there is no optical input. What is claimed is: 1. A color light receiver comprising a circuit, comparing both voltages and setting the higher voltage as a signal threshold voltage.
JP1984013863U 1984-02-01 1984-02-01 optical receiver Pending JPS60127056U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1984013863U JPS60127056U (en) 1984-02-01 1984-02-01 optical receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1984013863U JPS60127056U (en) 1984-02-01 1984-02-01 optical receiver

Publications (1)

Publication Number Publication Date
JPS60127056U true JPS60127056U (en) 1985-08-27

Family

ID=30498258

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1984013863U Pending JPS60127056U (en) 1984-02-01 1984-02-01 optical receiver

Country Status (1)

Country Link
JP (1) JPS60127056U (en)

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