JPS60119934A - Time gain compensation circuit of ultrasonic diagnostic apparatus - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical field to which the invention pertains] The present invention relates to an image signal circuit. In particular, the present invention relates to a circuit that performs time gain compensation of image signals related to ultrasonic diagnostic equipment through post-processing.

[Description of prior art]

Time gain compensation in conventional ultrasonic diagnostic apparatuses equipped with digital scan conversion circuits can be performed on images displayed in real time, but cannot be performed after the images are displayed as still images.

In other words, when the desired image is obtained by irradiating ultrasonic waves to the supply/disconnection area and displaying the image of the reflected waves in real time, the image is stored in memory and placed in a so-called freeze state, and the image is converted into a still image. It can be observed as In this case, even if you try to bring out a clearer screen by performing time gain compensation on the part of interest while observing this still image, you will have to change the time gain compensation of the image after freezing. I can't. Therefore, in such a case, it is necessary to display the image again in real time, perform time gain compensation on the desired screen in real time, and then freeze the display. However, although it is sufficient if a desired screen can be reproduced at this time, it may not necessarily be possible to reproduce a screen captured in motion, which is inconvenient.

[Purpose of the invention]

SUMMARY OF THE INVENTION An object of the present invention is to eliminate the above-mentioned drawbacks and provide a circuit that can perform time gain compensation even after an image signal related to an ultrasonic diagnostic apparatus becomes a still image.

[Features of the invention]

The present invention is capable of time gain compensation for still images related to scanning image information of ultrasound reflected waves of an ultrasound diagnostic apparatus, and is capable of performing time gain compensation on still images related to scanning image information of ultrasound reflected waves output from a digital scan conversion circuit. A frame memory that is written in units and read out in synchronization with display scanning of the CRT display section, a random access memory that stores time gain compensation data of the display screen of the CRT display section, and a random access memory that stores the contents of this random access memory on the CRT display section. address signal generating means for reading in synchronization with the display on the display section; a control circuit for changing the content of stored data in the random access memory; and a readout output of the random access memory and a continuation of the readout of the frame memory. Add and subtract the output and the above C
The present invention is characterized by comprising an arithmetic circuit that supplies information to the RT display section.

The control circuit may also include a microprocessor and a keyboard device connected to the microprocessor, so that data for time gain compensation can be changed from the keyboard device.

(Description by Example) Below, an example circuit of the present invention will be described based on the drawings.

FIG. 1 is a block configuration diagram showing the configuration of a circuit according to an embodiment of the present invention. First, the configuration and connections of this embodiment circuit will be explained. This embodiment circuit includes a time gain compensation circuit 1 according to the present invention, a vertical blanking detection circuit 10, a horizontal blanking detection circuit 11, an OR circuit 12, a digital-to-analog converter 13, and a composite video It is composed of a generation circuit 14, a CRT display 15, and a synchronization signal generation circuit. Further, the time gain compensation circuit 1, which is a feature of the present invention, includes a frame memory 2, an address signal generation circuit 3, a random access memory 4, an arithmetic circuit 5, and a control circuit 6. It is composed of a keyboard device 7 and a microprocessor 8.

The input of the frame memory 2 is connected to the output of a digital scan conversion circuit (not shown), and the frame memory 2
The data output of is connected to one data input of the arithmetic circuit 5. The other data input of the arithmetic circuit 5 is connected to the data output of the random access memory 4. On the other hand, the data input of the microprocessor constituting the control circuit 6 is connected to the data output of the keyboard device 7, and the data output of the microprocessor is connected to the data input of the random access memory 4 and the data input of the vertical blanking detection circuit IO. , and a data input of the horizontal blanking detection circuit 11, respectively.

Further, the horizontal synchronizing signal input and the vertical synchronizing signal input of the address signal generating circuit 3 are respectively connected to the horizontal synchronizing signal output and the vertical synchronizing signal output of the synchronizing signal generating circuit. The address output of the address signal generation circuit 3 is connected to the address input of the random access memory 4 and the address input of the vertical blanking detection circuit 10, respectively. Furthermore, the address input of the horizontal blanking detection circuit 11 is connected to the output of a read clock signal circuit associated with a digital scan conversion circuit (not shown). The output of the vertical blanking detection circuit 1O and the blanking signal output of the horizontal blanking detection circuit 11 are respectively connected to an OR circuit 12.

The data input of the digital-to-analog converter a13 is connected to the data output of the arithmetic circuit 5, and this digital
The blanking signal output of the analog converter 13 is connected to the blanking signal output of the OR circuit 12. The video signal output of the digital-to-analog converter 13 is connected to the video signal input of the composite video generation circuit 14, and the synchronization signal input of the composite video generation circuit 14 is connected to the synchronization signal output of the synchronization signal generation circuit 20. The video signal output of the composite/node video generation circuit I4 is C
Connected to the video signal input of the R7 display 15.

Next, the operation of this embodiment circuit will be explained. Prior to this explanation, FIG. 2 will be explained. Figure 2 shows CRT display screen 7.
7 is a diagram showing the relationship between time gain compensation data 73 and time gain compensation data 73 stored in a memory map 72 of a random access memory. An image is displayed on the display screen 71 from which the blanking signal 55 has been released, each address of the random access memory 72 corresponds to a raster of this image, and the time period at which each address of each random access memory 72 is stored. The gain compensation data 3 is shown on the horizontal axis of the orthogonal coordinate 74.

The vertical axis of this orthogonal coordinate shows the distribution of the memory map of the random access memory. Further, the arrow in the figure indicates the read direction of the random access memory.

The address signal generation circuit 3 uses the horizontal synchronization signal 51 from the synchronization signal generation circuit as a clock, and also uses the vertical synchronization signal 52 as a clock.
This circuit includes a counter that is reset during the blanking period of vertical synchronization based on . The microprocessor 8 decodes the time gain compensation command set by the keyboard device 7 and generates time gain compensation data. Time gain compensation data generated by the microprocessor 8 is written into the random access memory 4 using an address signal 53 generated by the address signal generation circuit 3. Reading of the time gain compensation data written in the random access memory 4 is started from the random access memory 4 in synchronization with the vertical synchronization signal 52. After t, horizontal synchronization signal 51
Each time the address signal 53 is generated, the address signal 53 is counted up, and the time gain compensation data 57 stored at the next address is output to the arithmetic circuit 5.

On the other hand, the scanned image information 1 stored in the frame memory 2
1!5B is read out by the vertical synchronizing signal 52 and horizontal synchronizing signal 51 and output to the arithmetic circuit 5. The time gain compensation data 57 and the scanning image information 58 are subjected to an addition operation by an arithmetic circuit 5. That is, post-processing generates scanned image information 59 that has undergone time gain compensation.

Next, data for setting blanking is stored in the microprocessor 8, and the blanking signal is applied to the vertical blanking detection circuit 10# and the horizontal blanking detection circuit 11, respectively. 55 is a digital-to-analog converter 13 via an OR circuit 12
A time gain-compensated image is generated for the image information of the part where vertical blanking and horizontal blanking have been canceled, and the composite video signal generating circuit 1
4, it is converted into a signal that can be displayed on TV system, and CR7
A time gain compensated image is displayed on a partial screen 71 of the screen 70 of the display 15.

In the above example, the arithmetic circuit 5 was explained to perform addition, but
It is also possible to perform compensation by performing subtraction, or depending on the polarity of the manual data of this calculation circuit, Urushiyoko's circuit performs subtraction, thereby essentially calculating addition.

〔Effect of the invention〕

The present invention has the effect of making it possible to perform time gain compensation control, which could be performed on image information displayed in real time, on static image information, so it can be detected by an ultrasonic spot device. This has the effect of accumulating the diagnostic information obtained and displaying the image with the time gain compensation desired by the image viewer at the time of diagnosis, thereby improving the diagnostic effect.

As a result, even images that are difficult to reproduce, such as images captured in motion, can be made clear by applying desired time gain compensation.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a circuit according to an embodiment of the present invention. FIG. 2 is an explanatory diagram showing the relationship between the CRT display screen and the contents stored in the random access memory. ■...Time gain compensation circuit, 2...Frame memory,
3... Address signal generation circuit, 4... Random access memory, 5... Arithmetic circuit, 6... Control circuit, 7
...Keyboard device, 8...Microprocessor,
10... Vertical blanking detection circuit, 11...
Horizontal blanking detection circuit, 12... OR circuit, 13... Digital-to-analog converter, 14...
Composite video generation circuit, 15... CRT display, 20... Synchronization signal generation circuit, 5I... Horizontal synchronization signal, 52... Vertical synchronization signal, 53.54... Address signal, 55...・Blanking signal, 56... Synchronization signal, 57... Time gain compensation data, 58... Scanning image information, 59... Scanning image information subjected to time gain compensation, 70... CRT display Screen, 71... Blanking signal release screen, 72... Memory map of random access memory, 73... Time gain compensation data, 74
...Cartesian coordinates. Leather 1 Illustration 2 [21

Claims (1)

[Claims] +11 Writes scanned image information of ultrasonic reflected waves output from the digital scan conversion circuit in units of display frames CR
A frame memory that is read out in synchronization with the display scan of the T display section, a random access memory that stores time gain compensation data of the display screen of the CRT display section, and a random access memory that stores the contents of the random access memory on the CRT display section. address signal generation means for reading out in synchronization with display; a control circuit for changing the content of stored data in the random access memory; and addition/subtraction between the readout output of the random access memory and the readout output of the frame memory. A time gain compensation circuit for an ultrasonic diagnostic apparatus, comprising: an arithmetic circuit for providing the information to the CRT display section. (2) The control circuit includes a microprocessor and a keyboard device connected to the microprocessor;
The time gain compensation circuit for an ultrasonic diagnostic apparatus according to claim 11, wherein the time gain compensation circuit is configured such that data for time gain compensation can be changed from the keyboard device.