JPS60109233A - Plasma treatment device - Google Patents
Plasma treatment deviceInfo
- Publication number
- JPS60109233A JPS60109233A JP21713783A JP21713783A JPS60109233A JP S60109233 A JPS60109233 A JP S60109233A JP 21713783 A JP21713783 A JP 21713783A JP 21713783 A JP21713783 A JP 21713783A JP S60109233 A JPS60109233 A JP S60109233A
- Authority
- JP
- Japan
- Prior art keywords
- high frequency
- electrodes
- divided
- treatment container
- container
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000009832 plasma treatment Methods 0.000 title 1
- 239000000758 substrate Substances 0.000 abstract description 23
- 239000004065 semiconductor Substances 0.000 abstract description 14
- 239000007789 gas Substances 0.000 abstract description 13
- 238000005530 etching Methods 0.000 abstract description 11
- MYMOFIZGZYHOMD-UHFFFAOYSA-N Dioxygen Chemical compound O=O MYMOFIZGZYHOMD-UHFFFAOYSA-N 0.000 abstract description 3
- 229910001882 dioxygen Inorganic materials 0.000 abstract description 3
- 230000005684 electric field Effects 0.000 abstract description 2
- POIUWJQBRNEFGX-XAMSXPGMSA-N cathelicidin Chemical compound C([C@@H](C(=O)N[C@@H](CCCNC(N)=N)C(=O)N[C@@H](CCCCN)C(=O)N[C@@H](CO)C(=O)N[C@@H](CCCCN)C(=O)N[C@@H](CCC(O)=O)C(=O)N[C@@H](CCCCN)C(=O)N[C@@H]([C@@H](C)CC)C(=O)NCC(=O)N[C@@H](CCCCN)C(=O)N[C@@H](CCC(O)=O)C(=O)N[C@@H](CC=1C=CC=CC=1)C(=O)N[C@@H](CCCCN)C(=O)N[C@@H](CCCNC(N)=N)C(=O)N[C@@H]([C@@H](C)CC)C(=O)N[C@@H](C(C)C)C(=O)N[C@@H](CCC(N)=O)C(=O)N[C@@H](CCCNC(N)=N)C(=O)N[C@@H]([C@@H](C)CC)C(=O)N[C@@H](CCCCN)C(=O)N[C@@H](CC(O)=O)C(=O)N[C@@H](CC=1C=CC=CC=1)C(=O)N[C@@H](CC(C)C)C(=O)N[C@@H](CCCNC(N)=N)C(=O)N[C@@H](CC(N)=O)C(=O)N[C@@H](CC(C)C)C(=O)N[C@@H](C(C)C)C(=O)N1[C@@H](CCC1)C(=O)N[C@@H](CCCNC(N)=N)C(=O)N[C@@H]([C@@H](C)O)C(=O)N[C@@H](CCC(O)=O)C(=O)N[C@@H](CO)C(O)=O)NC(=O)[C@H](CC=1C=CC=CC=1)NC(=O)[C@H](CC(O)=O)NC(=O)CNC(=O)[C@H](CC(C)C)NC(=O)[C@@H](N)CC(C)C)C1=CC=CC=C1 POIUWJQBRNEFGX-XAMSXPGMSA-N 0.000 abstract 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 5
- 238000007789 sealing Methods 0.000 description 4
- 239000001301 oxygen Substances 0.000 description 3
- 229910052760 oxygen Inorganic materials 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 239000010453 quartz Substances 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 230000010287 polarization Effects 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 239000002699 waste material Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Drying Of Semiconductors (AREA)
Abstract
Description
【発明の詳細な説明】
（ａ） 発明の技術分野
本発明はプラズマ処理装置に係り、特に／＜ツチ処理の
パレ）ｖ型プラズマ処理装置の改良に関する。DETAILED DESCRIPTION OF THE INVENTION (a) Technical Field of the Invention The present invention relates to a plasma processing apparatus, and more particularly to an improvement in a v-type plasma processing apparatus.
（１）） 従来技術と問題点
近年、たとえば半導体基板とからのレジスト膜の除去な
どは薬品によるいわゆるウェット処理から、ガスプラズ
マを用いたドライ処理に移行しつつある。(1)) Prior Art and Problems In recent years, removal of resist films from semiconductor substrates, for example, has been moving from so-called wet processing using chemicals to dry processing using gas plasma.
これは作業の安全性、廃液処理の技術及び経済性、ウェ
ーハ処理工程の開票化、などの理由による。This is due to reasons such as work safety, technology and economy of waste liquid treatment, and ticket counting in the wafer processing process.
と記ドライ処理に用いられる従来のプラズマ処理装置に
ついて第１図（ａ）及び（ｂ）を用いて説明する。A conventional plasma processing apparatus used for dry processing will be described with reference to FIGS. 1(a) and 1(b).
第１図ｖ３．）は玉記装置の模式的縦断ｄ図であり、（
１））はその模式的横断面図である。Figure 1 v3. ) is a schematic longitudinal sectional view of the Tamaki device, and (
1)) is a schematic cross-sectional view thereof.
同図において１は処理容器（円筒形の石英容器）であり
、複数個の噴出口赫有するガス導入管２及び同じく複数
個の排気口を存する排気管８が図示したごとく付設され
ている。該処理容器ｌの外側周囲には対向すると部品周
波電極４及び下部電極５が配設され五部嵯極４には高周
波直源６より高周波成力が供給され、叱方の−Ｆ部［１
ｆｉ５は接地されるように構成されており、７は真空封
止用キャップを示す。In the figure, reference numeral 1 denotes a processing container (a cylindrical quartz container), to which a gas introduction pipe 2 having a plurality of ejection ports and an exhaust pipe 8 having a plurality of exhaust ports are attached as shown. A component frequency electrode 4 and a lower electrode 5 are disposed on the outer periphery of the processing container l when facing each other, and a high frequency power is supplied to the five part electrode 4 from a high frequency direct source 6, and the -F part [1
fi5 is configured to be grounded, and 7 indicates a vacuum sealing cap.
かかる様ＶＣ構成されたプラズマ処理装置を用いてたと
えば半導体基板玉からのレジスト膜を除去する揚重には
、基板載置台８Ｊ：に所定間隔にレジスト膜が選択的に
形成された複数の半導体基板９を図示したごとく載置し
、処理容器１内に挿入してキャップ７によって密閉され
た処理容器ｌ内を排気管８より真空に排気した後、ガス
導入管２より酸素（０２）ガスを導入して所定の真空度
とし。For example, when a plasma processing apparatus having such a VC configuration is used to lift a resist film from a semiconductor substrate ball, a plurality of semiconductor substrates on which resist films are selectively formed at predetermined intervals is placed on the substrate mounting table 8J. 9 is placed as shown in the figure, and inserted into the processing vessel 1, and the inside of the processing vessel l, which is sealed with the cap 7, is evacuated to a vacuum through the exhaust pipe 8, and then oxygen (02) gas is introduced through the gas introduction pipe 2. to the specified degree of vacuum.
対向する高周波電極に高周波電力を印加して前記酸素（
０２）ガスをプラズマ化し、該プラズマガスによって半
＋Ｊ１体基板９ｈのレジスト膜がエツチング除去される
。High-frequency power is applied to opposing high-frequency electrodes so that the oxygen (
02) The gas is turned into plasma, and the resist film on the semi-J1 substrate 9h is etched away by the plasma gas.
しかしながらこの場合基板載置台８ｋに所定間隔に載置
された複数の半導体基板９間において処理容器ｌ内の端
部と中央部に位置する半導体基板とのレジスｌのエツチ
ングレートに差を生ずる現象があった。即ち処理容器ｌ
内の端部に位置する半導体基板９に、のレジスト膜のエ
ツチング蓋は、中央部に位置する半導体基板９とのレジ
スト膜のエツチング故よりもはるかに多く、エツチング
の均一性を著しく低−「させ、半導体基板を損傷するこ
となく均一にレジスト膜を除去することは非常に難かし
いという問題があった。However, in this case, among the plurality of semiconductor substrates 9 placed at predetermined intervals on the substrate mounting table 8k, there is a phenomenon that causes a difference in the etching rate of the resist l between the semiconductor substrates located at the ends and the center of the processing chamber l. there were. That is, processing container l
The etching of the resist film on the semiconductor substrate 9 located at the inner edge is much more than that of the resist film on the semiconductor substrate 9 located at the center, which significantly reduces the etching uniformity. There is a problem in that it is extremely difficult to uniformly remove the resist film without damaging the semiconductor substrate.
（Ｑ） 発明の目的
゛本発明の目的はかかる問題点に鑑みなされたもので、
処理容器内の被処理物のエツチングレートの均一性を向
とさせることがｉｉＪ能なプラズマ処理装置の提供にあ
る。(Q) Purpose of the invention ゛The purpose of the present invention was made in view of the above problems.
An object of the present invention is to provide a plasma processing apparatus capable of improving the uniformity of the etching rate of an object to be processed within a processing container.
■ 発明の構成
その目的を達成するため本発明は処理容器と、該処理容
器の周囲に対向して設けられた１対の高周波電極とを有
し、該高周波電極が中心部から両側端に向って少くとも
８分割され、該分割成極に印加する高周波電力が、それ
ぞれ独立して調整できるようにしたことを特徴とする。■Structure of the Invention In order to achieve the object, the present invention has a processing container and a pair of high-frequency electrodes provided around the processing container to face each other, and the high-frequency electrodes extend from the center toward both ends. It is characterized in that it is divided into at least eight parts, and the high frequency power applied to each of the divided polarizations can be adjusted independently.
（ｅ）＠明の実施例 以下本発明の実施例について図面を参照して説明する。(e) @Ming Example Embodiments of the present invention will be described below with reference to the drawings.
第２図は本発明の一実施例の模式的概略構成図、第８図
は同じく模式的斜視図を示し、前回と同等の部分につい
ては同一符号を付している。FIG. 2 is a schematic diagram of an embodiment of the present invention, and FIG. 8 is a schematic perspective view, with the same reference numerals assigned to the same parts as in the previous example.
第２図及び第８図において、１１は処理容器（円筒形の
石英容り、１２は該処理容器に付設された複数個の噴出
口を有するガス導入管、１Ｂは同じく複数個の排気口を
有する排気管、１４は該処理容器の外側周囲に設けられ
たＬ部高周１＆ｔｍで中央部を極１４−１と両端部電極
１４−２．１４−８に８分割されている。１５はと記上
部高周波ｗＬ極１４に対向して設けられた下部高周波Ｉ
ｌｔ極で同じく中央部１５−Ｌ、両端部１５−２．１５
−８にそれぞれ８分割され接地されている。１６は高周
波電源を示し、中央部１両端部にそれぞれ独立して三つ
）＋％ 周波電源１６−１．１６−２．１６−８が上部
１［（１４−１，１４−２，１４−８）に接続され、各
高周波電源にはそれぞれ高周波電力調整器１７−１．１
７−２゜１７−８が付設されている。１８は真空封止用
キャップ、１９は基板載置台、２０は被処理物、たとえ
ば選択的に形成されたレジスト膜を有する半導体基板を
示す。In FIGS. 2 and 8, 11 is a processing container (cylindrical quartz container), 12 is a gas inlet pipe attached to the processing container and has a plurality of ejection ports, and 1B is a gas inlet pipe that also has a plurality of exhaust ports. The exhaust pipe 14 has an L part high circumference 1&tm provided around the outside of the processing container, and the central part is divided into eight parts, including a pole 14-1 and both end electrodes 14-2 and 14-8. A lower high frequency I provided opposite to the upper high frequency wL pole 14
lt pole, center part 15-L, both ends 15-2.15
-8 are each divided into 8 parts and grounded. Numeral 16 indicates a high frequency power source, and the frequency power source 16-1.16-2. 8), and each high frequency power supply has a high frequency power regulator 17-1.1.
7-2°17-8 are attached. 18 is a cap for vacuum sealing, 19 is a substrate mounting table, and 20 is an object to be processed, for example, a semiconductor substrate having a selectively formed resist film.
本発明のプラズマ処理装置が特に従来と異なる点は処理
容器１１の外側周囲に対向して設けられた高周波１ｔｆ
ｆｌが中央部９両端部とに８分割され、該分ＩＩ電極（
１４−１，１４−２，１４−８＞に印加する高周波電力
がそれぞれ独立して調整できるように調整器（１７−１
，１７−２，１７−８）を付設した点にあ六−
かかる構造のプラズマ処理装置を用いて、被処理物、た
とえば選択的に形成されたレジスト膜を有する半導体基
板２０のレジスト膜を除去する場ヤソプ１８によるで密
閉された処理容器１１内を排気管１８によって真空排気
した後、ガス導入管１２より酸素（０２）ガスを導入し
て真空度を熱ＯＢ〜１，５ Ｔｏｒｒとする。次いで８
分割された高周波電極に高周波電力をそれぞれ目ｊ加し
て酸素ガスをグラズマ化し、該デヲス゛マガスによって
基板２０Ｊ１のレジメト膜をエツチング除去する。この
場き、レジスト膜のエツチングレートが均一になるよう
に各電極に印加する高周波電力を調整器１７によって調
整する。即ち中央部の区（ｉ（１４−１，１５−■）に
印加する高周波電力を、両端部の電極（１４−２，１４
−８，１５−２，１５−８）に印加する高周波成力に比
べて処理容器内に発生する電界密度が約５０％程度品く
なるように各調４ｉｌ器（１７−１，１７−２゜１７−
８）によって調整して印加する。このようにすれば従来
装置における、処理容器ｌｌ内の端部に位置する半導体
基板２０Ｊ：のレジスト膜のエツチング量が、中央部に
位置する半導体基板２０にのレジスト１模のエツチング
量よりも多い現象は解消され、処理容器内に収納された
複数に所定間隔に配列された半導体基板２０に、のレジ
スト膜は均一にエツチング除去され、基板に損傷を与え
ることなく処理することが可能となる。The plasma processing apparatus of the present invention is particularly different from conventional ones in that a high-frequency 1tf
fl is divided into 8 parts, including the center part 9 and both ends, and the II electrode (
14-1, 14-2, 14-8> can be adjusted independently.
, 17-2, 17-8) is added. Using the plasma processing apparatus having such a structure, the resist film of the object to be processed, for example, the semiconductor substrate 20 having the selectively formed resist film, can be removed. After evacuating the inside of the processing container 11, which is sealed by the vacuum cleaner 18, through the exhaust pipe 18, oxygen (02) gas is introduced through the gas introduction pipe 12 to bring the degree of vacuum to 1.5 Torr. then 8
High-frequency power is applied to each of the divided high-frequency electrodes to glazemaize the oxygen gas, and the regimen film on the substrate 20J1 is etched away by the glazema gas. At this time, the high frequency power applied to each electrode is adjusted by the regulator 17 so that the etching rate of the resist film is uniform. In other words, the high frequency power applied to the center area (i(14-1, 15-■)) is applied to the electrodes (14-2, 14-■) at both ends.
-8, 15-2, 15-8) so that the electric field density generated in the processing container is approximately 50% higher than the high frequency force applied to each 4il device (17-1, 17-2).゜17-
Adjust and apply according to 8). In this way, in the conventional apparatus, the amount of etching of the resist film on the semiconductor substrate 20J located at the end of the processing container 11 is greater than the amount of etching of the resist 1 on the semiconductor substrate 20 located at the center. The phenomenon is resolved, and the resist films on the plurality of semiconductor substrates 20 arranged at predetermined intervals housed in the processing container are uniformly etched away, making it possible to process the substrates without damaging them.
（ｆ） 発明の詳細
な説明したごとく本発明によれば、プラズマ発生のだめ
の高周波電極を少くとも８分割し、各１Ｍ間に印加する
電力をそれぞれ独立に調整できるようにして処理容器内
の被処理物のエツチングレートの均一性を向とさせるこ
とが可能となり、製品の歩留向玉８品質向とに効果があ
る。尚本実施例においては処理容器は円筒形で説明した
が４角筒でもよく、又高周波電極は８分割によって説明
したが所望によって４分割、或は５分割としてもよい。(f) As described in detail, according to the present invention, the high-frequency electrode for plasma generation is divided into at least eight parts, and the power applied to each 1M interval can be adjusted independently, thereby reducing the amount of heat in the processing container. It becomes possible to improve the uniformity of the etching rate of the processed material, which is effective in improving the yield and quality of the product. In this embodiment, the processing container is described as being cylindrical, but it may be a rectangular cylinder.Although the high frequency electrode is described as being divided into eight parts, it may be divided into four or five parts as desired.
更にレジスト膜のみならず、酸化膜或は窒化膜のエツチ
ングに適用されることは勿論でめFurthermore, it can of course be applied to etching not only resist films but also oxide films or nitride films.
第１図ｔａ）および（ｂ）は従来例によるプラズマ処理
装置の模式的断面図、第２図は本発明の一実施例の模式
的概略構成図、第８図は同じく模式的斜視図である。
図において、１１は処理容器、１２はガヌ導入管、１８
は排気管、１４は８分割されたＬ部高周波屯物、１５は
同じく８分割された゛「部高周波電極、１６は高周波電
源、１７は高周波電力調整器、１８は真空封止用キャッ
プ、１９は基板載置台、２０は被処理物を示す。
第１図
第 ２図
第３圀Figures 1 (ta) and (b) are schematic sectional views of a conventional plasma processing apparatus, Figure 2 is a schematic diagram of an embodiment of the present invention, and Figure 8 is a schematic perspective view. . In the figure, 11 is a processing container, 12 is a Ganu introduction tube, and 18
is an exhaust pipe, 14 is an 8-divided L-section high-frequency electrode, 15 is a 8-section high-frequency electrode, 16 is a high-frequency power supply, 17 is a high-frequency power regulator, 18 is a vacuum sealing cap, and 19 is a vacuum sealing cap. A substrate mounting table 20 indicates an object to be processed. Fig. 1 Fig. 2 Fig. 3
Claims (1)
対の高周波１極とを有し、該高周波電極が中心部から両
側端に向って少くとも８分割され。 該分割電極に印加する高周波電力が、それぞれ独立して
調整できるようにしたことを特徴とするプラズマ処理装
置。[Claims] A processing container, and a container provided around the processing container to face the processing container.
and a pair of high frequency electrodes, and the high frequency electrode is divided into at least eight parts from the center toward both ends. A plasma processing apparatus characterized in that high frequency power applied to the divided electrodes can be adjusted independently.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP21713783A JPS60109233A (en) | 1983-11-17 | 1983-11-17 | Plasma treatment device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP21713783A JPS60109233A (en) | 1983-11-17 | 1983-11-17 | Plasma treatment device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS60109233A true JPS60109233A (en) | 1985-06-14 |
Family
ID=16699429
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP21713783A Pending JPS60109233A (en) | 1983-11-17 | 1983-11-17 | Plasma treatment device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60109233A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6459819A (en) * | 1987-08-31 | 1989-03-07 | Tokuda Seisakusho | Dry etching |
| JPH01134929A (en) * | 1987-11-19 | 1989-05-26 | Tokuda Seisakusho Ltd | Dryetching process |
-
1983
- 1983-11-17 JP JP21713783A patent/JPS60109233A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6459819A (en) * | 1987-08-31 | 1989-03-07 | Tokuda Seisakusho | Dry etching |
| JPH01134929A (en) * | 1987-11-19 | 1989-05-26 | Tokuda Seisakusho Ltd | Dryetching process |
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