JPS60107791A - Magnetic bubble memory device - Google Patents

Abstract

PURPOSE:To prevent reducting in the processing speed by providing a counter counting a data, a storage device storing the order of data of a bubble memory and a decoder operated in response to the said order so as to releieve the load of a sequencer while simplifying the device. CONSTITUTION:When a command data is received, a data counter 10 is reset and when it is not the 1st access, a pad loop data is read from all parallel magnetic bubble memory devices, the order of data is operated by the sequencer by using the said data and its result is stored in an RAM9. Then program search of pages is attained to all the devices so as to set a bubble command. When the command reaches its end, error check is conducted. When the command end is attained, the presence of read/write request is checked, if no request exists, the device is in standby, and if the request exists, the address of the RAM(ROM)9 is designated by the data counter 10, a gate pulse is fed from a bubble selection decoder 11 to a gate 5 in the order of read data so as to select it.

Description

DETAILED DESCRIPTION OF THE INVENTION - (A) Technical Field of the Invention The present invention relates to a magnetic bubble memory device, and more particularly to a magnetic bubble memory device that improves the manner of accessing magnetic bubble memory devices driven in parallel.

<a> Background of the technology A magnetic bubble memory device is configured with a plurality of magnetic bubble memory devices, and these devices are driven in parallel to increase the transfer rate between the magnetic bubble memory device and the host system. There are things that are.

In this type of magnetic bubble memory device, magnetic bubbles are driven in parallel by utilizing existing circuits, simplifying the configuration, reducing the burden on the sequencer that controls it, and at the same time not reducing processing speed. There is an increasing need to be able to increase the number of memory devices.

However, conventional devices are insufficient to meet the above-mentioned requirements, and there is a strong desire to develop technical means capable of solving these requirements.

(c) Conventional technology and problems In the past, various magnetic bubble memory devices that drive multiple magnetic bubble memory devices in parallel have been developed, but each has a configuration that exhibits its own characteristics. Each device has its own unique functions and effects depending on its configuration.

Therefore, while these devices may provide effective solutions to their own problems, they are no longer capable of meeting the needs described above.

(d) Purpose of the Invention The present invention was devised in view of the drawbacks of the conventional device as described above.The purpose of the present invention is to simplify the configuration of the device, reduce the burden on the sequencer that controls it, and speed up the processing. An object of the present invention is to provide a magnetic bubble memory device in which the number of magnetic bubble memory devices can be easily increased without causing a decrease in performance.

g) Structure of the Invention In order to achieve this object, the device of the present invention sequentially controls data transfer between a bubble memory having a plurality of magnetic bubble memory devices driven in parallel, and a host computer and the bubble memory. a counter that counts a predetermined amount of data accessed under the control of the sequencer; and a storage device that stores the order of data in the bubble memory and outputs the order of the data in response to the value of the counter. and a decoder that outputs gate pulses for the plurality of magnetic bubble memory devices in response to the order of the data.

(F) Embodiments of the Invention The present invention will now be described in detail with reference to the accompanying drawings.

FIG. 1 shows an embodiment of the invention. In this figure, 1
is a sequencer (CP) that controls sequential data transfer between the host system 2 and the bubble memory 3.
CI). 4 are buffers and registers for interfacing with the host system 2; Bubble memory 3 consists of (N-1-1) bubble memory sections #1 to #N, each bubble memory section including a 3-state input/output cover sofa, a gate 5, a bubble controller 6, a bubble drive circuit, and a magnetic bubble memory device. It has 7. 8 is an oscillator that supplies clock pulses to the sequencer 1;

9 is a ROM or RAM in which the order of data in the program ROM and the magnetic bubble memory 3 is stored. Reference numeral 10 denotes a data counter that counts a predetermined amount of access to the magnetic bubble memory 3, for example, data for one page.

Reference numeral 11 denotes a bubble selection decoder that generates gate pulses corresponding to magnetic bubble memory devices driven in parallel.

Next, the operation of the apparatus of the present invention having the above configuration will be explained.

First, the device enters the operating state (step 31 in Figure 2).
) It is determined whether the sequencer 1 is receiving command data from the host system 2 (step 32 in FIG. 2). If command data has not been received, wait until it is received.

When command data is received, the data counter 10
is reset (step s3), and then the access is
It is determined whether there is an access after the first time (step 34).
). If it is not the first access, bunt loop data (BL data) is read from all parallel magnetic bubble memory devices (step S5), the data order is calculated in the sequencer 1 using the bat loop data, and the result is The data is stored in the RAM 9 (step 36).

In the case of a ROM, the process is performed in the same way as the second and subsequent accesses (the calculation results are stored in the ROM in advance). Then, read (Read) or write (Write)
Step S7) to cue the page for all devices, and step S7 to set the bubble command.
8), it is checked whether the command is at the end (command END) or not (step S9).

If it is at the command end, an error check is performed in step 5IO), and if there is no error, the process immediately proceeds to step (step 311), but if there is an error, the error content is set in the interface register 4 in step 312, and the process proceeds to step Sll. Therefore, the command end flag is set, the process returns to step S2, and the same steps as described above are repeated.

Conversely, if it is not at the command end, data reading/
It is checked whether there is a write (R/W) request or not (step 513). If there is no such request, it will wait, but if there is a request, the data counter 10 will store RAM (RO
M) Specify the address of 9 and supply gate pulses from the bubble selection decoder 11 to the gate 5 in the order of data read from there, and perform the selection (step 51
4).

With this selection, data is written/read between the host system 2 and the magnetic bubble memory device 7 of the magnetic bubble memory 3 via the ink face buffer 4, sequencer 1, and bubble controller 6 (step 515).

In this way, it is determined in step 316 whether data for one page has been transferred, and if it has not been transferred, the process returns to step S13 and the same steps are repeated.

Conversely, if the data transfer for one page has been completed, the data counter 1o is reset (step 517), and the process returns to step S9 to begin the process of transferring the next page.

Note that each bubble memory section in the above embodiment may be a single magnetic bubble memory device, or may be composed of a plurality of sequentially accessed magnetic bubble memory devices.

(G) Effects of the Invention As is clear from the above description, according to the present invention, (1) the device can be configured easily, and (2) the load on the sequencer that controls the device is reduced, thereby reducing the processing speed. (2) It is possible to easily increase the number of devices.

[Brief explanation of drawings]

FIG. 1 is a diagram showing an embodiment of the present invention, and FIG. 2 is a flowchart for explaining the embodiment of FIG. In the figure, l is a sequencer, 2 is a host I system, 3 is a bubble memory, 9 is a ROM (RA, M), 10 is a data counter, and 11 is a bubble selection decoder. Patent applicant Fujitsu Limited

Claims (1)

[Claims] A bubble memory having a plurality of magnetic bubble memory devices driven in parallel, a sequencer that controls sequential data transfer between a host system and the bubble memory, and a predetermined amount of data accessed under the control of the sequencer. a counter for counting, a storage device that stores the order of data in the bubble memory and outputs the order of the data in response to the value of the counter, and the plurality of magnetic bubble memory devices that respond to the order of the data. 1. A magnetic bubble memory device comprising: a decoder that outputs a gate pulse for.