JPS60105287A - Semiconductor light-emitting device - Google Patents

Abstract

PURPOSE:To attain current constriction and lateral mode control simultaneously, and to form each crystalline layer by one-time continuous growth by forming recessed sections or projecting sections, inclined planes thereof have high resistance and thickness thereof is approximately the same as or thicker than the thickness of an active layer, to both side edges of a light-emitting region in the active layer. CONSTITUTION:Recessed sections or projecting sections, inclined planes thereof have high resistance and thickness thereof is approximately the same as or thicker than the thickness of an active layer 14, are formed to both side edges of a light-emitting region 14 in the active layer 14. Both sides of width W of a light-emitting region are etched to form grooves 12A and 12B in a substrate such as an n<+> type GaAs substrate 11. An n type Al0.45Ga0.55As clad layer 13, an n type GaAs active layer 14, a p type Al0.45Ga0.55As clad layer 15 and an n type GaAs contact layer 16 are each grown, and patterns of the grooves 12A, 12B are transferred to each layer. An SiO2 film 17 is grown and a striped opening 17A is formed to the film 17, Zn or Cd is diffused to form a p type current guide region 18, and an n-side electrode 19 and a p-side electrode 20 are shaped.

Description

TECHNICAL FIELD OF THE INVENTION The present invention relates to a semiconductor light emitting device having a structure capable of current confinement and transverse mode control.

Prior Art and Problems In general, in semiconductor lasers, reducing the threshold current and changing the oscillation mode to zero-order mode, that is, unimodal light emission, are still technical challenges, and various developments are underway. is being done.

In Figure 1, 1 is an n+ type GaAs substrate, 2 is an n type A
f'GaAs cladding layer, 3 is GaAs active layer, 4bap
AβGaAs cladding layer, 5 a p-type GaAs contact layer, 6 an insulating region formed by proton (H”) irradiation,
7 is gold/germanium/nickel (Au-Ge/Ni)
111 electrodes consisting of gold/zinc/gold (A u
/Zn/Au) respectively.

In this conventional example, the GaAs active layer 3 and others are subjected to MBE (
MOCVD (molecular beam epitaxy) method or MOCVD (metha l o rgani)
c chemical vapor depos i
t ton) method or VPE (Vapour phas)
In particular, the GaAs active layer 3 is formed to be extremely thin (for example, several tens to several hundreds of centimeters), forming a so-called quantum well. QW) It is called a laser.

Although this semiconductor laser has excellent performance in reducing the threshold current, it cannot be said to have good performance in terms of transverse moat control, that is, light confinement.

FIG. 2 is a cutaway front view of main parts showing the structure of a typical conventional semiconductor laser, which is different from that explained in FIG. 1, and the same parts as those explained in FIG. be.

In this semiconductor laser, after growing up to the p-type GaAs contact layer 5 which is the top layer, from the surface of the p-type GaAs contact layer 5 to the n-type GaAs substrate 1 so that the central part remains in a stripe shape. selectively etched, followed by LPE (liquid phas
e epitaxy) method to obtain A7! This is for growing a GaAs confinement layer 9.

Although this semiconductor laser can achieve both current confinement and transverse mode control and has excellent characteristics, it is difficult to grow each semiconductor layer using the MBE method or the AβGa
In order to grow the As confinement layer 9 thickly and with a flat surface, the LPE method must be applied, and it is complicated to apply these different techniques twice. Not even. Furthermore, the LPE method itself is not a particularly excellent growth method in terms of in-plane uniformity or mass productivity, and when MBE or MOCVD is applied,
(cm) φ (2 [inches]) ~7. 5 (cm)φ(3[
吋〕）) has been put into practical use,
When applying the LPE method, there is an in-plane distribution, so 2Cc
m) It must be divided into square pieces and used.

Purpose of the Invention The present invention realizes a structure of a semiconductor light emitting device that can simultaneously achieve current confinement and transverse mode control, and in manufacturing the semiconductor light emitting device, each crystal layer is formed in one continuous growth. be able to do so.

Structure of the Invention In the semiconductor light emitting device of the present invention, the active layer has one or more slopes on both sides of the light emitting region that have a high resistance and have one or more recesses or protrusions with a thickness equal to or greater than the thickness of the active layer. With this structure, not only current confinement but also transverse mode control is possible, and each crystal layer can be obtained by one continuous growth.

Forming the recesses or protrusions is extremely simple. That is, a semiconductor substrate is processed to form a sloped portion, and by utilizing the fact that the flux of host crystal atoms is different between the sloped portion and the flat portion, a high resistance region is formed in the sloped portion, and a current is generated in the high resistance region. I'm trying to do a stenosis.

Embodiment of the Invention FIGS. 3 to 6 are cross-sectional side views of essential parts of a semiconductor light emitting device at key process steps necessary to explain the manufacturing of the first embodiment of the present invention. , will be explained below with reference to these figures.

Refer to Figure 3■ The width W of the light emitting region is 2 on the n+ type GaAs substrate 11.
The grooves 12A and 12B are formed by etching both sides of the grooves 12A and 12B.

For etching at this time, ordinary photolithography techniques and a sulfuric acid/hydrogen peroxide based etching solution (for example, 18 H2S O4 + lH2O□ + l
H2O, etc.) can be applied. In addition, the groove 12A
The depth d of 12B and 12B needs to be equal to or more than the thickness of the active layer, and here, since the goal is to form a quantum well structure, the depth d is set to be about several hundred [people] or more.

See Figure 4 ■ Applying the MBE method, n-type A j! 0.4SGa
o, ssA s cladding layer 13 with a thickness of, for example, 1.5
[μm], the n-type GaAs active layer 14 has a thickness of, for example, about 100 [μm], and the p-type A lo, a5G a
o, ssA The S cladding layer 15 has a thickness of, for example, 1.5 [
The n-type GaAs contact layer 16 is formed to a thickness of, for example, about 0.1 μm. Each is grown to about 3 [μm]. still,
14A indicates a light emitting area.

As is clear from the figure, each layer formed as described above has grooves 12A and 12B formed in the semiconductor substrate 11.
Needless to say, the pattern is transferred.

In this case, the layer structure includes not only the above-mentioned QW layer structure but also a multi-quantum well (multi-quantum well) layer structure.
ll:MQW) structure, GRI N-3CH (graded-4ndex w) with a composition gradient given to the cladding layer.
aveguide separate-confine
In addition, the light guide layer may be separated separately, and it can be applied to any layer structure. Note that silicon (Si) is used as the n-type impurity here.
), and helium (Be) is used as the n-type impurity.

See Figure 5■ Chemical vapor deposition
deposition: CVD) method or sputtering method to form a SiO2 film (or Si3N4 film) 1
7 to a thickness of, for example, about 2000 (people).

■ Applying normal photolithography technology, 5JO
The Z film 17 is patterned to form striped openings 1.
7A is formed.

(2) Using the S i O 2 film 17 as a mask, zinc (Zn) or cadmium (Cd) is diffused to form a p-type current guide region 18 .

This p-made current guide region 18 is formed at least in the cladding layer 1.
6.

Refer to Fig. 6■ By applying the usual technique, the n-side electrode 19 made of A, u-Ge/Au and the p-side electrode 2 made of Au-Zn/Au
form 0.

When the semiconductor light emitting device completed in this manner is operated, as shown in FIG. 6, a current 11 flowing directly below the stripe and a current 12 spreading laterally flow, of which current 12 is ineffective. This is a current that causes an increase in threshold current.

However, according to the present invention, since concave portions (or convex portions) are formed on both side edges of the light emitting region 14A, the inclined surface of that portion has a high resistance, and il>>i2.

The reason why sloped surfaces have such high resistance is that when a crystal layer is grown using the MBE method, the growth conditions are different between sloped surfaces and flat surfaces, and a high resistance region is formed on sloped surfaces. This will be explained in more detail with reference to FIG.

Normally, when growing crystals by applying the MBE method,
Since a plurality of cells containing separate sources are arranged in the radial direction centered on the semiconductor substrate 11, the molecular beams from these cells are directed toward the semiconductor substrate 11 as shown by the arrow 21 in FIG. The light will be incident at an angle.

Therefore, if the semiconductor substrate 11 has a flat surface, the molecular beams from each cell will be incident almost equally and a high-quality semiconductor layer 22A with a desired composition will be grown. As the angle approaches the direction of incidence of the molecular beams, the molecular beams from each cell will not be incident evenly, and for example, the ratio (flux ratio) of molecular beams of group ■/group ■ will change significantly. , the semiconductor layer 2213 grown on the inclined surface does not have a predetermined composition.

According to a study using techniques such as electron diffraction, it was found that the semiconductor layer 22B grown on the inclined surface was not formed and the crystal was formed on the substrate 11.
Compared to the above, it was observed that the crystal axes were shifted, suggesting that grain boundaries were formed. Therefore, this increases the resistance of the semiconductor layer 22B and creates a barrier near the boundary with the semiconductor layer 22A.

The inventor confirmed the above fact through the following experiment.

FIG. 8 is a cutaway oblique view of the main part of the sample used in the experiment.

In the figure, 23 is a semi-insulating GaAs substrate, 24A and 24B are grooves, 25 is an n+ type GaAs semiconductor layer, A, B
, C indicate ohmic electrodes, respectively.

Now, when we measure the current-voltage (I-V) characteristics between each ohmic electrode using such a sample, we get the results shown in Figures 9 and 10.
The data shown in the figure is obtained.

In Fig. 9, the vertical axis shows the current I in units (mA), and the horizontal axis shows the voltage in units [V]. In Fig. 10, the vertical axis shows the current I in units [μA], and the horizontal axis shows the current I in units [μA]. The voltage is expressed as a unit on the axis (
V).

As is clear from each figure, it is clear that the resistance values are extremely low between electrodes A and A, between electrodes B and B, and between electrodes C and C. It can be seen that a barrier with a withstand voltage of about 10 [■] is formed between electrodes B and C, exhibiting so-called break-down characteristics.

In the present invention, current confinement can be achieved by the action of the high resistance region described above, and by forming the groove,
A refractive index change can also be built-in in the lateral direction of the light emitting region, and as a result, the lateral mode is controlled and oscillation in the fundamental mode becomes possible. Incidentally, in the above example, 50 (
rnA) or less, single mode oscillation can be easily achieved.

FIG. 11 is a cutaway front view of essential parts for explaining the second embodiment of the present invention, and the same parts as those explained with reference to FIG. 6 are indicated by the same symbols.

This embodiment differs from the embodiment described with reference to FIG. 4 in that convex portions 26A and 26B are formed on both side edges of the light emitting region 14A instead of grooves. To form the convex portions 26A and 26B, the light emitting region 14
Since this is achieved by etching the portion of the cutting plate 11 facing A, naturally, grooves 27A and 27B are formed adjacent to the convex portions 26A and 26B.

In this way, it is preferable to form a plurality of concavities and convexities in order to achieve complete current confinement and transverse mode control.

FIG. 12 is a cutaway front view of essential parts for explaining the third embodiment of the present invention, and the same parts as those explained with reference to FIG. 11 are indicated by the same symbols.

This embodiment differs from the embodiment described with reference to FIG. 1I in that convex portions 26A and 26B and grooves 27A and 27
The formation position of B has been changed, and there is no change in the effects of current confinement and transverse mode control.

FIG. 13 is a cutaway front view of essential parts for explaining the fourth embodiment of the present invention, and the same parts as those explained with reference to FIG. 6 are indicated by the same symbols.

This embodiment differs from the embodiment described with reference to FIG. 6 in that the n-type GaAs contact layer 16 is replaced with a p-type GaAs contact layer 16', and the Si
This is because the p-side electrode 2° is formed without forming the current guide region 18 while leaving the O2 film 17.

In each of the above embodiments, A jl! Ga As
/GaAs system has been described, but the present invention can also be applied to other systems in which crystals can be grown by applying the MBE method, such as, for example, InGaAsP/InP systems.

Effects of the Invention In the semi-dedicated light emitting device of the present invention, the active layer has one or more recesses or protrusions on both sides of the light emitting region, the slopes of which have a high resistance and are approximately equal to or more than the thickness of the active layer. Because of the structure, current confinement is easily performed due to the high resistance of the slope, and by forming the concave portion or convex portion, the light emitting region is formed on both sides of the light emitting region. Light confinement will also occur since there will be a cladding layer with a refractive index lower than that of the region.

In this way, although current confinement and transverse mode control are possible, each crystal layer can be formed by one continuous growth using the MBE method, which is different from the conventional technique.
It is easy to manufacture because it does not require stepwise growth.

[Brief explanation of drawings]

Figures 1 and 2 are cutaway front views of main parts showing the conventional example;
Figures 6 to 6 are cutaway front views of essential parts of a semi-dedicated light emitting device at key points in the process to explain the manufacturing of an embodiment of the present invention, and Figure 7 shows crystal growth performed by the MBE method. Figure 8 is a cutaway front view of the main part of the semi-dedicated light emitting device to explain why high resistance is generated when high resistance is generated. FIGS. 9 and 10 are diagrams showing the results of the experiment, and FIGS. 11 to 13 are cutaway front views showing other embodiments of the present invention. In the figure, 11ban+ type Ga A sil plate, 12A
and 12B is a groove, 13ban type A n . , 45G a
6.5sAs cladding layer, 14 is n-type GaAs active layer, 14A is light emitting region, 15 is p-type A#o, 4sGao,
55 As cladding layer, 16 n-type GaAs contact layer, 16' p-type contact layer, 17 5102 film, 17
A is a striped opening, 18 is a p-slide current guide region,
19 is an n-side electrode, 20 is a p-side electrode, 21 is a molecular beam, 22
A is a high quality semiconductor layer, 22B is a high resistance semiconductor layer, 23
is a semi-insulating GaAs substrate, 24A and 24B are grooves, 25
is an r1+ type GaAs semiconductor layer, 26A and 26B are convex portions, 27A and 27B are grooves, W is the width of the light emitting region, d is the depth of the groove, 11 and 12 are currents, and A, B, and C are ohmic electrodes. be. Patent Applicant Fujitsu Ltd. Representative Patent Attorney Akira Aitani Representative Patent Attorney Hiroshi Watanabe - Figure 1 Figure 2 Figure 3 Figure 4 Figure 5 Figure 6 Figure 7 Figure 9 Figure 10 Figure 10v [■] Fig. 11 9 Fig. 12 Fig. 13 0 17

Claims (1)

[Claims] 1. A semiconductor light-emitting device comprising one or more recesses or protrusions on both sides of a light-emitting region in an active layer, the slopes of which have a high resistance and are approximately the same or thicker than the active layer.