JPS60103789A - Scramble system of television signal - Google Patents

Abstract

PURPOSE:To obtain difficulty of analysis and to simplify constitution by changing at ramdom the inserting section of a pulse train signal every field in scrambling. CONSTITUTION:An interger-time pulse train signal P5 of a horizontal frequency is inserted to a vertical synchronizing part period VS of a television composite image signal intead of a vertical synchronizing pulse P2 or an equivalent pulse P3 whithin the period, and scrambling is executed. At that time, the inserting period of the pulse train signal P5 within the vertical synchronizing part period VS is changed at random every field, therefore, the waveform within a vertical blanking period VB always changes even synchronizing forcedly in an oscilloscope, etc., this waveform cannot be analyzed easily.

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Industrial Application Field The present invention is applicable to pay television broadcasting systems such as 0ATV, in which only subscribers can reproduce received television signals, and non-subscribers can Related to how to scramble a television signal so that it cannot be played back even if the signal can be received.

(1) Prior Art Although various methods of scrambling television signals have been proposed in the past, the present applicant previously proposed one effective method of scrambling in Japanese Patent Application No. 58-26485.

This method lowers the level of the video signal (2) by 6 constant levels from the pedestal level and inverts it, and
In the horizontal synchronizing signal and vertical synchronizing signal sections, a pulse train (fit code) having an integral multiple of the horizontal frequency is inserted and transmitted instead of each synchronizing signal.

By the way, in the case of the above method, the pulse train signal is always transmitted continuously across the first to ninth lines C: within the vertical blanking period including the vertical synchronization pulse and the synchronization pulses before and after the vertical synchronization pulse. Therefore, when receiving a still image signal (Z is synchronized by making the video signal act as a synchronization signal (2), it is possible to stop the received image. Therefore, in such a state The disadvantage was that the scrambled waveform could be observed using an oscilloscope, etc., and non-subscribers could therefore find a way to descramble it.

(C) Purpose of the Invention The present invention has been made in consideration of the above points, and it is difficult to analyze the descrambling method by observing waveforms using an oscilloscope, etc., and the descrambling device itself has a relatively simple configuration. This paper proposes a scrambling method that can be implemented.

2) Structure of the Invention The present invention proposes to remove the vertical synchronizing signal within the vertical blanking period and the equivalent pulses before and after it from the complex image sacrum, and to remove the vertical synchronizing signal within the vertical blanking period of seven (two horizontal integers of 14 wave numbers). A double pulse train signal is inserted.At this time, the insertion period of this pulse train signal within the above-mentioned blanking period is changed every one or several fields. Even if you try to display the video signal by applying forced (-) synchronization on an oscilloscope, etc., the waveform within the vertical blanking period will always be 1: inverted. Therefore, this waveform cannot be easily analyzed.

(E) Embodiment 1 FIG. 16+ shows the vertical blanking period (VB) of the odd field of the TV composite video signal and the signal waves 3I, etc. in the periods before and after the vertical blanking period (VB) of the TV composite video signal, (Sl) is the video signal, (S
2) is the color burst signal, (P+) is the horizontal synchronization pulse, (F2) is the scanning synchronization pulse divided by the cutting pulse (F5) - 2, and (F4) is the equal number of pulses before and after it. (bl[clal is this]) Three states of the (i) waveform obtained by applying the scrambling of the present invention to the composite video signal are shown.

That is, the '-1' bl ~ (dl (- indicates the null pulse?) Your signal must first be the complex iron (a! is removed, and within the period (VS) from line 1 to line 9 after the pulse removal (hereinafter referred to as vertical synchronization pulse), a pulse train signal with a frequency 64 times the horizontal frequency fH is generated. (F5) and framing code (1
The number (Fl) (F2) is inserted.

At that time, the length of the insertion period (T p) of these signals is
In each odd field, the state changes from the state shown in Fig. 1'bl to the state shown in Fig. @ the last of the 6th quin and the last of the 9th line in the vertical sync pulse (VS) as in each 8 TO period (T Q===1764 f 09950557 in B
Two locations (μs) are determined.

And these two periods (Fl) (F2)E sandwiched $
For lines 7 to 9, the previous 64 f Bo) signal is always inserted, but in the 1st to 6th lines before the F1 period, the 112'? l('l'1~((11) Any state C is changed randomly within the second field.

On the other hand, the previous statement? Framing code signal (Fl) (F2)
For example, as shown in Figure 2, -1TO is 1
It is of 7-8 pinto during the bit period, and is continuously combined with 64fH number (F5) before and after that.

There are many possible code configurations for an 8-bit framing code with a 1-bit error correction function, but here we select three types from among them, 2, and insert any two of them into each field. is allocated to each of the two periods (F1) and (F2).

That is, 1, for example, 3 of A, B, 0 as a framing code.
Assuming that the type is prepared in advance, in the odd field consisting of, a framing code (Bl is inserted in the F1 period. Issue 1, F2 period: The framing code IAI is inserted in the F1 period. : A framing code (0) is inserted and the F2 period (a framing code FBI is inserted).

In this way, two of the three types of framing codes are randomly selected for each field (two are selected each period (Fl) (F
2).

In addition, in period 1 from the 10th line to the 21st line within the vertical blanking period (VB), all lines within the 10th to 21st lines ( The signal of 64fll in the second row is inserted, or the signal of 64fH is inserted in the same figure (axidl) (2) Some lines selected from the 10th to 21st fins are inserted. It has become.

At this time, the line into which the 64fH signal is inserted in the 10th to 21st lines is also C2 for each field (2nd C2 is selected).
The 4fH signal is as follows except for the burst signal (8, 2) period.
It is also continuously inserted within the horizontal synchronization pulse-(Pl) period.

Figure 1 [aj is the signal waveform in an even field of the composite video signal, and in the same figure (el shows one of the three states when this signal I: is scrambled. The case of an even field is substantially the same as the case of an odd field described above, except that a framing code signal is inserted during the illustrated period CF+')(F2')l2. Therefore, the framing code signals inserted in the periods (F1') and (F2') are also selected from the three types described above.

In this way, the vertical blanking period (V
From within B), the vertical sync pulse (F2) and the equivalent pulse (
F4) and this vertical blanking period 1'J(v
The reason why a 64fF1 pulse train signal is inserted in B) and scrambled is to destroy the waveform of the vertical synchronization signal part so that vertical synchronization will not occur even when received by a general television receiver. be. At that time, for each field (; within vertical synchronization pulse (V 8) (54fg
Changing the signal insertion interval (TII) length and 64f
The reason for changing the 10th to 21st lines in which the H signal is inserted is because the waveform of the scrambled signal during the vertical blanking period can be observed using an oscilloscope. : This is to change and make it unobservable.

In addition, the framing code signal (Fl) (F2) [or CF +') (F2')) is used as a time reference when descrambling (2) creating horizontal and vertical synchronization signals on the receiving side. The reason why this framing code signal (Fl) (F2) was randomly selected from three types and assigned was to make it difficult to analyze using the waveform observation port. It is.

Note that for both odd and even fields, the framing code period (Fl) (F2) [or (FM') (F2'))
The reason why the 64fH signal is always inserted continuously within the intervening period is that the duration of the 64fH4g signal is at least this long for PLL control of the 64fH oscillation circuit on the receiving side.

In addition, in the present invention, horizontal synchronization is not required in a normal television receiver (in order to avoid horizontal synchronization, see Tl in FIG. 1).
(As partially shown in 11 and to+, in the period outside the vertical blanking period (VB), the aforementioned 64fH pulse train signal is inserted instead of the horizontal synchronizing pulse (Pl). Furthermore, in order to ensure the crackling, the video signal portion (Sl) is shifted by a portion of the level from the pedestal level.

Figure 6 shows how such a video signal portion (Sl) is shifted by a certain level, tal in Figure 6 is the video signal before scrambling, (P1) is the horizontal synchronizing pulse, and (S2) represents a color burst signal, +Ll represents a pedestal level, and (Sl) represents a video signal portion. Third
(bl is the video signal part (Sl) of the video signal (al)
) is shifted downward by a certain level. For example, if the distance from the pedestal level [, T, l to the white peak level is 70, and the distance from the pedestal level to the tip of the horizontal synchronizing pulse (Pl) is -60, then the amount of shift is 55 minutes, half of the above 7D ( In addition, as mentioned above, a 64tn pulse train signal (P5) is also inserted in the -horizontal synchronizing pulse (Pl) part,
In this case, the average level of the signal (P5) is made to substantially match the pedestal level +L+. In this case, 1. In a normal television receiver, horizontal synchronization is not applied, and the brightness of the video signal changes more than in the normal case, making the scrambling even more difficult.

Next (=, as mentioned above, when C2 is applied to shift the video signal portion (Sl) by a certain level, as shown in FIG.
! The 10th to 21st lines within the vertical blanking period shown in Figure 2 (even if there is one line, it is more advantageous in terms of the circuit configuration of the transmitting side to shift only part of the level as described above. If only these lines are used, there will be many wide negative direction pulses (or one very long pulse), and there is a risk that vertical synchronization will occur in this part.Therefore, these 10th to 21st lines As mentioned above, the 64fH pulse train signal (P5) is inserted into the second part (C1 is the 64fH pulse train signal (P5) as described above.
In the same figure, d and l show the state in which the 64fa signal is inserted into this line.The average DC level of the 64fHdi line is the same as the pedestal level (LIC). Further, the color burst signal (S2) is left at 27 as described above.

The above points are the same in the case of an even field, but in the case of an even field, the
Since the video signal (Sl) exists in the second half of the line, it should be noted that the 64fH signal is inserted only in the first half of the 21st line as shown in the figure (el).

Note that for lines where a color burst signal exists, the color burst signal (82) remains as it is, regardless of whether it is during the vertical blanking period or other periods. Then, it is the corridor that descrambles on the receiver side, and when descrambling, the frequency and phase of the burst signal collapses, causing deterioration of the reproduced image (-).

Next, the television signal is processed and output as described above.
The scrambling device on the ATV broadcasting station side will be explained with reference to FIGS. 4 and 5.

In Figure 4, (1) is shown in Figure 1 fa, I and (8'1
This is an input terminal into which composite video signals (hereinafter also simply referred to as video signals) are alternately introduced.
Granb times m (Pedestal level is partially C at 31:
Get crushed. (4) is a synchronization separation circuit which separates the composite synchronization signal shown in FIG. 5(a) from the video signal that has passed through the amplification circuit (2). (6) is a blanking pulse generation circuit, which generates a first gate pulse that is synchronized with the horizontal synchronization pulse (Pl) in the composite synchronization signal (a) and has a slightly wider width than the horizontal blanking pulse. (71
(-, and the vertical blanking circuit (8) receives a second date pulse corresponding to the vertical synchronization period (VS) C.
I can do it. And this horizontal and vertical blanking circuit f7
1 (81), each horizontal synchronizing pulse (Pl) is detected from the composite video signal output from the first clamp circuit (3).
and the vertical synchronization period (VS) portion are removed.

Therefore, the output of the 5-direction blanking circuit (8) is as shown in Figure 5).

The next 1m (9) is a level shift circuit, and the level of the output signal (b) of the vertical blanking circuit (8) except for the burst toy No. 1 (S2) and the minute periods before and after it, is the level shift circuit. ? It works by lowering it by a certain level. Then, the signals output from this level shift circuit (9) are aligned as shown in FIG. Ru.

On the other hand, the composite synchronization signal t (+ is equal to 4111 pulses (P4) in this signal) derived from the synchronization separation circuit (4)
is removed by the removal game H21, and then the phase comparator circuit (1
Input to 3+. In addition, this phase comparator circuit (131+
- is input with the horizontal pulse derived from the gate pulse generation circuit [I41, and the phase difference with the horizontal synchronization pulse in the composite synchronization signal is detected. Then, according to this detection output (2), a 64 fl voltage controlled oscillation circuit (151 is P
LL control is performed, and a 64 fB pulse train signal from this oscillation circuit is input to the gate pulse generating circuit (2).

The gate pulse generation circuit (141 is composed of a combination of various counters, etc., and 64 from the oscillation circuit 115+)
The fH signal is obtained and three types of gate pulses shown in FIG. 5 (E), (F), and (G) are created. Of these, the gate pulse corresponds to the horizontal synchronizing pulse (Pl) period 1 in each field. In addition, the gate pulse (T) is the framing code period (Fl) (F
2) (or (F 1') (F 2') ) This is a pair of windows. This gate pulse N(g) is constant between odd and even fields.

However, since the gate pulse -1 is not constant in each field (-) but changes, this point will be explained below.

That is, FIG. 4C: Returning to FIG.
After being latched in step 7), it is decoded in the decoder circuit α. This scramble data includes the insertion period length (T'p) of the 64fB signal within the vertical synchronization period (VS) of each field and 64fI! of the 10th to 21st lines within the vertical bookkeeping period (VB). It is an appropriate code signal type that indicates the number of the line (see Figure 1) into which the signal is inserted, and each code signal changes for each field, and is randomly selected from six predetermined ways. Change. Then, this code signal (scrambled data) is decoded by the decoder circuit S and supplied to the gate pulse generating circuit (2) described above. Therefore, this date pulse generating circuit Q41 calculates the insertion interval length (Tp) of the given 6 41' B signal and the 5
4f! ! The aforementioned date pulse (E) corresponding to the signal insertion line C2 is output. Then, this gate pulse 1 and the aforementioned gate pulse (2) are applied to the first gate circuit α, and only during the high level period of each pulse, the 64f[K signal from the oscillation circuit is applied to the first gate circuit α. The signal is output through the gate circuit a1 (see FIG. 5).

In addition, each of the above-mentioned three types of framing code periods (Fl) (F2) [or (F1') (F2')) (see Figure 1) in each field in the scrambled data [2] A code signal indicating which of the framing codes to insert (this code also includes C2random (: changes) for each field within a predetermined range;
Decoded by J barrel and sent to framing code generation circuit (2
Shouji is given. Therefore, each of the code generation circuits derives each designated framing code signal within the two periods indicated by the aforementioned gate pulse (g). Then, each of the derived framing code signals is replaced with the signal of 64fH in the first gate circuit (to the output signal of 19) by the second gate circuit [211C] which is switched by the gate pulse ()Ic. , synthesis circuit (
till- Therefore, after being synthesized with the video signal of FIG.
(- derived.

Therefore, from this output terminal 0, +1)1 to (1
This means that a scrambled television signal like No. 31 is obtained.

Next, a receiver-side device for descrambling the thus scrambled television signal will be described with reference to FIGS. 6 and 7 L2.

Figure 6 (2), the input terminal (31) is shown in Figure 7 (A).
A scrambled video signal as shown in C is input.

(321 is a low-pass filter that attenuates color signal components including color burst, g3 is a DC granbe circuit, f3 is
4) is a slicer circuit for partially adjusting the amplitude of the pulse representing the fleming code tFl to the value C2 since the width of one pulse representing the fleming code tFl changes during transmission. C351 is 64fEI
This is a ringing filter for signal extraction, and the 64fB filter extracted from the composite video signal is sent to the phase comparison circuit (361+2) by this filter.

The phase comparator circuit C36) receives the 64fB signal from the three filters C and the voltage controlled oscillation circuit (64fB signal from lη).
The phase of the H oscillation signal is compared, and its output (therefore, the oscillation circuit f37) &pLL is controlled. The output signal of this oscillation circuit is then given as a counter input to the first counter.

On the other hand, the output signal of the shifter circuit C341 is
- Mink code signal detection circuit C3Gc is input. This detection circuit is transmitted in advance from the transmitting side and stored in the receiving side's memory (the above-mentioned six types). -1
゜4. Yo, I'1iJ-je□,44-,,. 9ill
). Detecting the coincidence of ``Yokai'' and ``Accordingly,'' the out-of-order position of the framing code Hakugo is detected. Therefore,
This detection circuit is designed for framing code (Fs) (Fs).
2) (+j% Fig. 7 (a)) generates the same output [Fig. synchronize.

Next (=timing pulse generation circuit (40) is composed of a combination of various counters, etc., and obtains the output of the horizontal period pulse and framing code detection circuit (39) output from the above-mentioned Kakunta country, and outputs odd and even fields. It creates and outputs a field composite synchronization signal.The timing pulse creation circuit +41 also creates a gate signal as shown in Figure 7.This gate signal is used for the first to The period excluding the vertical synchronization period extending over the 9th line and the color burst signal period within the 10th to 21st lines (including minute periods before and after the period)
Two "high" C- becomes. In addition, this date signal is used outside the blanking period (VB) during each horizontal synchronizing pulse period (including the minute periods before and after it) and between the latter half of the 266th line (in the case of an odd field) or the j4421st line. First half period (in case of even field) 1-゛High° (2).

) (- applied, 11th level /L/ of this gate signal
The video signal is held at the reference level only for a period. Therefore, the output of this '131 L/bell shift circuit (411) is as shown in Figure 7 (b).This output signal (c71
In the next synchronous mixing circuit (4), the composite synchronous signal from the timing pulse generation circuits f and ll mentioned above is inserted, so the output signal of this mixing circuit is as shown in the same figure (c).
becomes.

However, since the color burst signal (S2) has still moved one (two) way below the pedestal level, this part of the color burst signal (S2) is shifted upward by the next second level shift circuit (431). This shift operation is performed by the gate signal [7th t!It)l)l- from the timing pulse generation time!'!410).

Therefore, the signal Jl derived to the output terminal (14) is the seventh
As shown in Figure (2), the original composite video signal has been reproduced (-).

Note that the counter color mark indicates the framing code detection circuit CV.
9) Output (Since it is synchronized by Tomoji, only the first time reception is started [E is sure that composite synchronization No. 45 is created (-, but this is only the first field, so (Specially, it doesn't become a problem.

Here, the above-mentioned operation of the apparatus shown in FIG.

As you can see from Etsumei so far, the vertical blanking period H
i! In (vg): - inserted 64fH No. 3 PLT in front of the voltage controlled oscillation circuit, used only for control.

The insertion position and length of the insertion section within the blanking period (vB) of this 64fFI No. 3 are not directly related to the descramble operation. Furthermore, the contents of the framing code inserted in the middle of the 64fB signal are not directly related. Therefore, for example, no matter which of the odd field signals [Fig. Therefore, descrambling on the receiving side can be performed relatively easily.

(F) Effects of the Invention In the present invention, a pulse train signal having an integral multiple of the horizontal frequency is inserted in place of the vertical synchronization pulse or equivalent pulse in the vertical synchronization period of the television composite video signal (2). (2) Since the insertion period of the pulse train signal within the vertical synchronization period is changed in ramp rate for each field, the waveform observation on the receiving side using an oscilloscope etc. 1: Scrambling The analysis of the method can be difficult (-).

Furthermore, the above method (: In addition, the line (;) excluding the vertical synchronization period within the vertical blanking period is also inserted with the pulse train signal (;, and the insertion line is changed for each field, If the framing code to be inserted at a predetermined position within the vertical synchronization period is changed for each field, analysis of the scrambling method can become even more difficult.
Reception by non-subscribers is almost completely impossible.

[Brief explanation of drawings]

Figure 1 is a signal waveform diagram for explaining scrambling using the method (=) of the present invention, and Figure 2 is a signal waveform diagram showing an example of a framing code for binary use. A signal waveform diagram showing in detail a part of the
Figure 4 is a block diagram showing the configuration of the main parts of the scrambler on the transmitting side, Figure 5 is a signal waveform diagram of each part, Figure 6 is a block diagram showing the configuration of the main parts of the descrambler on the receiving side, The figure shows the signal waveforms of each part. (VB): Vertical blanking period, (VS): Vertical synchronization section interval, (F2): Synchronization pulse, (p4): Equivalent pulse, (Ps): Pulse train signal with integral multiple of horizontal frequency, (F
l) (F2): Framing code signal.

Claims (5)

[Claims] (1) A method in which the vertical synchronizing pulse within the vertical blanking period and the equivalent pulses before and after it are removed from the composite video signal, and a pulse train signal having an integral multiple of the horizontal frequency is inserted within the vertical blanking period and transmitted. In this method, the insertion period of the pulse train signal within the blanking period is changed randomly every one or several fields. (2) The pulse train No. 41 is inserted within a vertical synchronization period including a vertical synchronization pulse and an equivalent pulse for a short period (at least for a predetermined period or more).
Scrambling method for television signals as described in section. (3) The pulse train signal is inserted into one to several horizontal lines within a vertical synchronization period including a vertical synchronization pulse and an equivalent pulse and within a vertical blinking period excluding this period. A scrambling method for television signals according to scope 1. (4) A framing code signal set with a predetermined code C as a type of the pulse train signal is inserted at a predetermined position within the vertical synchronization period. A method of scrambling television signals. (5) Several types of the framing codes are prepared in advance, and one of the several types is randomly selected and inserted at the predetermined position (-). Scrambling method for television signals as described in section.