JPS60101935A - Apparatus for semiconductor heat treatment - Google Patents

Apparatus for semiconductor heat treatment

Info

Publication number
JPS60101935A
JPS60101935A JP58208483A JP20848383A JPS60101935A JP S60101935 A JPS60101935 A JP S60101935A JP 58208483 A JP58208483 A JP 58208483A JP 20848383 A JP20848383 A JP 20848383A JP S60101935 A JPS60101935 A JP S60101935A
Authority
JP
Japan
Prior art keywords
heat treatment
substrate
temperature
semiconductor
temperature gradient
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58208483A
Other languages
Japanese (ja)
Inventor
Hironori Inoue
洋典 井上
Takaya Suzuki
誉也 鈴木
Saburo Ogawa
三郎 小川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP58208483A priority Critical patent/JPS60101935A/en
Publication of JPS60101935A publication Critical patent/JPS60101935A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)

Abstract

PURPOSE:To enable high-temperature heat treatment without causing crystalline defects, by constituting a reaction container for heat treatment with an L-shaped reaction container consisting of a vertical part with temperature gradient and a horizontal part with uniform temperature state, and moving an Si substrate positioned horizontally through the vertical part and then through the horizontal part so as to subject it to heat treatment therein. CONSTITUTION:An L-shaped annular furnace 6 is constituted with a horizontal part and a vertical part positioned on the inner end of the horizontal part. A similarly L-shaped reaction container 3 is housed within the furnace. An inlet 5 and an outlet 4 for atmosphere gas are provided, respectively on the ends of the horizontal and vertical parts of the container. A large diameter Si substrate 1 put on a carbon-made support table 2 is inserted into the vertical part having temperature gradient. The table 2 is further pushed up together with the substrate by means of an insert bar 7 to pass through a temperature gradient section. Thereafter, only the substrate 1 is moved with a horizontally moving bar 8 to the horizontal part having a uniform temperature state, where the substrate 1 is heat treated as required. The substrate 2 is then taken out from the apparatus in the reversed order of operations.

Description

【発明の詳細な説明】 〔発明の利用分野〕 本発明は半導体熱処理装置に係シ、特に、室温から熱処
理温度まで昇温する過程、または/および熱処理温度か
ら室温へ降温する過程において、結晶欠陥等の発生を防
止するようにした半導体熱処理装置に関する。
[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to a semiconductor heat treatment apparatus, and in particular, in the process of increasing the temperature from room temperature to the heat treatment temperature, and/or in the process of decreasing the temperature from the heat treatment temperature to room temperature, crystal defects are removed. The present invention relates to a semiconductor heat treatment apparatus that prevents the occurrence of such occurrences.

〔発明の背景〕[Background of the invention]

半導体基体を高温領域に収納し熱処理する工程は、例え
ば、不純物拡散、酸化膜形成等々、LSIなどの半導体
デバイスの製作工程において重要なプロセスの一つであ
る。
BACKGROUND ART The process of housing a semiconductor substrate in a high-temperature region and heat-treating it is one of the important processes in the manufacturing process of semiconductor devices such as LSIs, including, for example, impurity diffusion and oxide film formation.

従来の熱処理プロセスについて、シリコンウェハに酸化
膜形成を行うプロセスを例に採シ、説明する。第1図は
酸化膜形成炉の断面構造を示しており、同図において1
はシリコンウェハ、2は例えば石英製のシリコンウェハ
載置台でシリコンウェハ載置台2にはウェハ1が多数枚
、図に示すようにほぼ垂直に並べて設定される。また3
は石英製の反応容器で、一端はウエノ・の挿入、取り出
しのだめの開口部4が設けられており、他端には雰囲気
ガス導入孔5が設けられている。6は通常用いられる環
状の抵抗加熱炉で炉内の各点A、B。
A conventional heat treatment process will be explained using an example of a process for forming an oxide film on a silicon wafer. Figure 1 shows the cross-sectional structure of the oxide film forming furnace.
1 is a silicon wafer, and 2 is a silicon wafer mounting table made of, for example, quartz. On the silicon wafer mounting table 2, a large number of wafers 1 are arranged substantially vertically as shown in the figure. Also 3
1 is a reaction vessel made of quartz, one end of which is provided with an opening 4 for the insertion and removal of Ueno gas, and the other end provided with an atmospheric gas introduction hole 5. 6 is a commonly used annular resistance heating furnace with points A and B in the furnace.

C,D点の温度分布は第2図に示す分布に保たれている
。シリコンウェハ1に酸化膜を形成する場合には、先ず
反応容器3中に雰囲気ガスとしてN2,02ガスを流入
しつつ加熱炉6を昇温し、B−C領域を所望の温度(例
えばl100C±IC)に保持する。次いで、載置台2
に多数枚(30〜50枚)垂直に設定されたシリコンウ
ェハ1をB−C領域まで移送し、所望の酸化膜が形成さ
れるまで保持する。この場合、必要に応じて雰囲気ガス
は水蒸気を含む雰囲気に換えられる場合もある。
The temperature distribution at points C and D is maintained as shown in FIG. When forming an oxide film on the silicon wafer 1, first, the heating furnace 6 is heated while N2,02 gas is introduced as an atmospheric gas into the reaction vessel 3, and the B-C region is brought to a desired temperature (for example, l100C±). IC). Next, the mounting table 2
A large number (30 to 50) of vertically set silicon wafers 1 are transferred to the B-C region and held until a desired oxide film is formed. In this case, the atmospheric gas may be changed to an atmosphere containing water vapor, if necessary.

所定時間の保持を終え、酸化膜の形成を終えたシリコン
ウェハIFi再び開口部4より容器3外に取り出される
After holding for a predetermined period of time, the silicon wafer IFi on which the oxide film has been formed is again taken out of the container 3 through the opening 4.

以上の過程において、シリコンウェハ1には室温から高
温(〜1100C)の熱サイクルが加えられるため種々
の結晶欠陥が生ずる場合がある。例えば、多数枚のシリ
コンウニ・・を一度に挿入すると挿入物体の熱容量が大
きいためシリコンウェハ間や、面内の熱伝達が不均一と
なる。その結果、シリコンウェハ1は面内温度不拘−を
生じたまま昇降温され、シリコンウェハの面内に熱応力
転位が発生してしまう。このような問題を防ぐ方法とシ
テ、高温領域(B−0間)へのシリコンウニノーの出し
入れを非常にゆつ<如(例えば約50mm/分位の速度
で)行う方法がある。反応容器3内の温度勾配(A−8
間)はシリコンウェハ面に対して垂直方向で大きいこと
から、シリコンウェハ1の送シ速度を遅くすることで熱
容量が大きな挿入物に対しても、均一な熱伝達が達成さ
れるように配慮すればシリコンウェハ面内の不均一を最
小限に抑えることができ(シリコンウェハ間の温度差は
必然的に生じる)、熱応力転位の発生を防ぐことができ
る。
In the above process, the silicon wafer 1 is subjected to a thermal cycle from room temperature to high temperature (up to 1100 C), so that various crystal defects may occur. For example, if a large number of silicon wafers are inserted at once, heat transfer between silicon wafers or within the plane becomes uneven because the heat capacity of the inserted object is large. As a result, the temperature of the silicon wafer 1 is raised or lowered while the in-plane temperature is not restricted, and thermal stress dislocations occur within the plane of the silicon wafer. There is a method to prevent such problems, and a method is to move the silicone in and out of the high temperature area (B-0) very slowly (for example, at a speed of about 50 mm/min). Temperature gradient inside reaction vessel 3 (A-8
1) is large in the direction perpendicular to the silicon wafer surface, consideration must be given to achieving uniform heat transfer even to inserts with a large heat capacity by slowing down the feeding speed of the silicon wafer 1. For example, non-uniformity within the silicon wafer surface can be minimized (temperature differences between silicon wafers inevitably occur), and thermal stress dislocations can be prevented from occurring.

しかしながら、近年半導体基体直径が4インチ5インチ
と大きく成ると共に、ウェハ破tjA’c防ぐ意味から
その厚さも0.6 rrrm〜0,7喘と益々、厚くな
る傾向にあり、前述した対策によっても結晶欠陥発生の
問題を防ぐことができなくなりつつある。
However, in recent years, as the diameter of semiconductor substrates has increased to 4 inches and 5 inches, the thickness has also tended to increase from 0.6 mm to 0.7 mm in order to prevent wafer damage. It is becoming impossible to prevent the problem of crystal defect generation.

即ら、従来法ではシリコンウェハの反応容器への出し入
れ時に生ずるウェハ面内の温度不均一を防ぐだめ、ウェ
ハを垂直に載置したが大口径基板では前述した直径、厚
みの大型化から重量が大幅に増し、このような垂直載置
法では荷重の局所集中全招き、その箇所から結晶欠陥が
発生してしまうことが判った。
In other words, in the conventional method, the wafer is mounted vertically in order to prevent temperature unevenness within the wafer surface that occurs when the silicon wafer is taken in and out of the reaction vessel, but with large diameter substrates, the weight increases due to the aforementioned increase in diameter and thickness. It was found that such a vertical mounting method causes a local concentration of load, and crystal defects are generated from that location.

このような大口径基板の熱処理上の新だな問題の解決方
法として、第3図に示すように多数枚の基体10をスペ
ーサ7を介して重ね合せて反応容器3内に挿入した後加
熱炉6をゆっくり昇降温し、所定温度とする方法がある
。しかしながら、スペーサ7への荷重集中は従来法に比
べ減少しても本質的に0とすることは不可能であシ、結
晶欠陥発生の問題を解決するには至らない。
As a solution to this new problem in heat treatment of large-diameter substrates, as shown in FIG. There is a method of slowly raising and lowering the temperature of 6 to a predetermined temperature. However, even if the load concentration on the spacer 7 is reduced compared to the conventional method, it is essentially impossible to reduce it to zero, and the problem of crystal defect generation cannot be solved.

また、この方法の別な欠点は均一なガスの供給が難しく
形成する膜に厚みの不均一が生じることである。
Another disadvantage of this method is that it is difficult to supply a uniform gas, resulting in non-uniform thickness of the formed film.

〔発明の目的〕[Purpose of the invention]

本発明の目的は、従来装置の問題点を改善し、大口径半
導体基体に対しても結晶欠陥等の発生を防止し高温度の
熱処理を可能とする半導体熱処理装置を提供することに
ある。
SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor heat treatment apparatus that improves the problems of conventional apparatuses, prevents the occurrence of crystal defects, etc. even on large-diameter semiconductor substrates, and enables high-temperature heat treatment.

〔発明の概要〕[Summary of the invention]

前記目的を達成するだめ、本発明においては、半導体基
体を熱処理装置の反応容器内における高温度領域へ挿入
/取シ出しする場合に温度勾配を有する領域において、
半導体基体の表面が重力方向及び温度勾配の方向に対し
て垂直となるように半導体基体を配列して移送すること
を%徴とするものである。
In order to achieve the above object, in the present invention, when a semiconductor substrate is inserted into/taken out from a high temperature region in a reaction vessel of a heat treatment apparatus, in a region having a temperature gradient,
The purpose of this method is to arrange and transport the semiconductor substrates so that the surfaces of the semiconductor substrates are perpendicular to the direction of gravity and the direction of the temperature gradient.

〔発明の実施例〕[Embodiments of the invention]

本発明の実施例を第4図乃至第6図に基づいて説明する
An embodiment of the present invention will be described based on FIGS. 4 to 6.

第4図には本発明には本発明に係る半導体熱処理装置の
一実施例の概略構成が示されている。第4図において、
第1.第3図の従来装置と同−箇B「には、同一符号を
付しである。同図において6はL型状の環状炉で、その
内部には同様にL副反応容器3が挿入されている。第5
図に反応容器3内の温度分布を示す。反応容器の開口部
4側の領域A−B間では室温から反応温度までの温度勾
配を有しているが、B−0間の領域は均一加熱ゾーンと
なっている。反応容器3の一端には雰囲気ガスの導入口
5が設けられている。大口径(φ5インチ)のシリコン
ウニノS10は石英またはSiC被覆したカーボン製載
置台2上に水平にセットされ、容器開口部4から挿入棒
7によ)点Bまで送シ込寸れる。この時、温度勾配はシ
リコンウェハ表面に対して垂直方向に大きいことから、
熱容量の点から挿入速度に注意すればウェハ面内温度不
均一を最少に維持することができる。また、シリコンウ
ェハ10は水平状態で高温領域に挿入されることからシ
リコンウェハの重量が一点に集中することはない。この
ため、大口径シリコンウェハ10には熱応力転位の発生
を招くことなく高温領域に挿入できる。次いで均一加熱
ゾーン内の導入孔5側に水平移動棒8で移送され容器内
の所定位置にセットされる。同様な操作によって数枚の
シリコンウェハ10の収納を終えると、酸化膜を形成す
るための雰囲気ガスが導入孔5より導入され所望時間の
酸化膜形成熱処理が行なわれる。所定膜ノ9の酸化膜の
形成を終え雰囲気ガスの切換えがなされた後、シリコン
ウェハ10は挿入時と逆の操作によって容器3外に取シ
出される。
FIG. 4 shows a schematic configuration of an embodiment of a semiconductor heat treatment apparatus according to the present invention. In Figure 4,
1st. The same reference numerals are given to the same parts B as in the conventional apparatus in FIG. 5th
The figure shows the temperature distribution inside the reaction vessel 3. There is a temperature gradient from room temperature to the reaction temperature between area A and B on the opening 4 side of the reaction vessel, but the area between B and 0 is a uniform heating zone. An atmospheric gas inlet 5 is provided at one end of the reaction vessel 3 . A large-diameter (φ5 inch) silicone unit S10 is set horizontally on a quartz or SiC-coated carbon mounting table 2, and is fed from the container opening 4 to point B by an insertion rod 7. At this time, since the temperature gradient is large in the direction perpendicular to the silicon wafer surface,
Temperature non-uniformity within the wafer surface can be kept to a minimum by paying attention to the insertion speed from the standpoint of heat capacity. Further, since the silicon wafer 10 is inserted into the high temperature region in a horizontal state, the weight of the silicon wafer is not concentrated at one point. Therefore, the large diameter silicon wafer 10 can be inserted into a high temperature region without causing thermal stress dislocation. Next, it is transferred to the introduction hole 5 side in the uniform heating zone by the horizontal movement rod 8 and set at a predetermined position in the container. After several silicon wafers 10 have been stored in the same manner, atmospheric gas for forming an oxide film is introduced through the introduction hole 5, and heat treatment for forming an oxide film is performed for a desired time. After the formation of the predetermined oxide film 9 has been completed and the atmospheric gas has been changed, the silicon wafer 10 is taken out of the container 3 by the reverse operation of the insertion.

本実施例によれば大口径の半導体基体においても、基体
面内温度分布を均一に保ら高温領域への出し入れが行な
われること、捷た半導体荷重の集中を防ぎ高rAA熱処
理が可能であること、更には雰囲気ガスの供給が均一に
行なわれることなどの理由から結晶欠陥の発生を防止で
き、且つ均一な酸化膜の形成が可能となる。
According to this example, even in a large-diameter semiconductor substrate, the in-plane temperature distribution of the substrate can be maintained uniformly and the substrate can be moved in and out of a high-temperature region, and the concentration of the chipped semiconductor load can be prevented and high rAA heat treatment can be performed. Furthermore, since the atmospheric gas is supplied uniformly, the occurrence of crystal defects can be prevented and a uniform oxide film can be formed.

次に第6図に本発明を連続熱処理装置に適用した場合の
実施例を示す。反応容器3の両端部に垂直方向に室温か
ら反応温度まで、または反応温度から室温までの温度勾
配を有するウェハ出し入れ用の開口部4が設けられてい
る。シリコンウェハ10は一方の開口部4から挿入され
水平の均一加熱ゾーン9を移動中に所望の酸化膜の形成
を終えた後他方の開口部4から連続的に取り出される。
Next, FIG. 6 shows an embodiment in which the present invention is applied to a continuous heat treatment apparatus. Openings 4 for loading and unloading wafers are provided at both ends of the reaction vessel 3 in the vertical direction and have a temperature gradient from room temperature to reaction temperature or from reaction temperature to room temperature. The silicon wafer 10 is inserted through one opening 4 and, after completing the formation of a desired oxide film while moving through the horizontal uniform heating zone 9, is continuously taken out from the other opening 4.

以上に説明したように本実施例によれば作業能率良く大
口径半導体基体の熱処理が可能となる。
As explained above, according to this embodiment, it is possible to heat-treat a large-diameter semiconductor substrate with high work efficiency.

本発明の第4図に示した半導体熱処理装置Rによッテφ
6インテウエハに5000人の厚みの酸化膜kl100
rで形成したところスリップライン(熱応力転位に起因
する直線状の結晶欠陥)の発生は見られなかった。
The semiconductor heat treatment apparatus R shown in FIG. 4 of the present invention
5000mm thick oxide film kl100 on 6-inch wafer
No slip lines (linear crystal defects caused by thermal stress dislocations) were observed when the film was formed using R.

尚、上記実施例においてはシリコンウェハ・の酸化膜形
成の熱処理について説明しだが不純物拡散及びCVD膜
形成装置、エピタキシャル成長装置等高温熱処理工程を
有する装置への適用は十分可能である。
Although the above embodiment describes heat treatment for forming an oxide film on a silicon wafer, the present invention can be applied to equipment having high-temperature heat treatment steps such as impurity diffusion, CVD film forming equipment, and epitaxial growth equipment.

〔発明の効果〕〔Effect of the invention〕

本発明によれば大口径の半導体基体に対しても結晶欠陥
等の発生を引き起こすことなく高温熱処理が可能となる
According to the present invention, even large-diameter semiconductor substrates can be subjected to high-temperature heat treatment without causing crystal defects or the like.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の半導体熱処理装置の一例を示す構成図、
第2図は従来の半導体熱処理装置における反応容器内の
温度分布を示す図、第3図は従来の半導体熱処理装置の
他の例を示す構成図、第4図は本発明に係る半導体熱処
理装置の一実施例を示す構成図、第5図は本発明に係る
半導体熱処理装置における反応容器内の扇度分布を示す
図、第6図は本発明を半導体連続熱処理装置に適用した
場合の実施例を示す構成図である。 1.1010.半導体基体、2・・・載置台、3・・・
反応容器、4・・・開[]部、5・・・雰囲気ガス導入
孔、6・・・力1]熱炉。 代理人 弁理士 鵜沼辰之 招IJ 箔 2m 第 31¥l 箔 4(2111
FIG. 1 is a configuration diagram showing an example of a conventional semiconductor heat treatment apparatus.
FIG. 2 is a diagram showing the temperature distribution inside the reaction vessel in a conventional semiconductor heat treatment apparatus, FIG. 3 is a block diagram showing another example of the conventional semiconductor heat treatment apparatus, and FIG. 4 is a diagram showing a semiconductor heat treatment apparatus according to the present invention. FIG. 5 is a diagram showing the fan degree distribution in the reaction vessel in a semiconductor heat treatment apparatus according to the present invention, and FIG. 6 is a diagram showing an example in which the present invention is applied to a semiconductor continuous heat treatment apparatus. FIG. 1.1010. Semiconductor substrate, 2... mounting table, 3...
Reaction container, 4... Open [ ] part, 5... Atmosphere gas introduction hole, 6... Power 1] Heat furnace. Agent Patent Attorney Tatsuyuki Unuma Invited IJ Haku 2m No. 31 ¥l Haku 4 (2111

Claims (1)

【特許請求の範囲】[Claims] 1、半導体基体の高温熱処理を行う反応容器と、該反応
容器内に所定の温度勾配を形成させる加熱手段と、半導
体基体を反応容器内に出し入れする移送手段とを有する
半導体熱処理装置において、前記反応容器内における温
度勾配を有する領域において半導体基体の表面が重力方
向及び温度勾配の方向に対して垂直となるように半導体
基体を配列して移送することを特徴とする半導体熱処理
装置。
1. A semiconductor heat treatment apparatus having a reaction vessel for performing high-temperature heat treatment on a semiconductor substrate, a heating means for forming a predetermined temperature gradient in the reaction vessel, and a transfer means for transferring the semiconductor substrate into and out of the reaction vessel, A semiconductor heat treatment apparatus characterized in that semiconductor substrates are arranged and transferred in a region having a temperature gradient in a container so that the surfaces of the semiconductor substrates are perpendicular to the direction of gravity and the direction of the temperature gradient.
JP58208483A 1983-11-07 1983-11-07 Apparatus for semiconductor heat treatment Pending JPS60101935A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58208483A JPS60101935A (en) 1983-11-07 1983-11-07 Apparatus for semiconductor heat treatment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58208483A JPS60101935A (en) 1983-11-07 1983-11-07 Apparatus for semiconductor heat treatment

Publications (1)

Publication Number Publication Date
JPS60101935A true JPS60101935A (en) 1985-06-06

Family

ID=16556908

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58208483A Pending JPS60101935A (en) 1983-11-07 1983-11-07 Apparatus for semiconductor heat treatment

Country Status (1)

Country Link
JP (1) JPS60101935A (en)

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