JPS5998598A - Module for superposing memory plate - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed description of the invention] background The present invention relates to stacked circuit board structures.

Various devices are used for stacking circuit boards. Examples are U.S. Pat. No. 3,832,603;
No. 958.155; No. 3.904.934; No. 3.4
No. 59.998; No. 3.346.773; No. 3.27
No. 8.806; No. 3.270.251 and No. 3.24
No. 3.661.

However, none discloses a memory board stacking module that can be adjusted to suit the specific needs of the user and that can be easily expanded to meet the changing needs of the user.

SUMMARY Accordingly, the present invention comprises a module for stacking memory boards that can be expanded to suit the needs of the user and that allows defective memory boards to be easily replaced.

A stack of memory boards is disclosed. The plates are mounted behind each other in a piggyback configuration with stacking contacts and are supported by the mother plate.

The plates have similarly arranged memory chips which are connected to similarly arranged stacking contacts by the same input/output conductor arrangement. Since the design of the memory board is substantially the same, each row of stacking contacts can be common.

The stacking contact data inputs are input to one board's memory chip according to the board selection circuit on each board. To ensure that data is entered into the memory chip of only one board.

The board select circuits on each board are somewhat different from each other. Other than this difference in the board selection circuitry, the memory boards in the stack are the same and each can be said to constitute a memory unit.

The plates are removably attached to each other and the number of memory units and thus the memory footprint of the stack can be varied as desired in accordance with the invention.

It is therefore an object of the present invention to provide an improved memory module.

It is also an object of the invention to provide an easily expandable memory module.

It is also an object of the present invention to provide a memory board stacking module in which the boards have identical memory units and can be easily added or removed to change the memory capacity.

It is also an object of the present invention to provide a module for stacking memory boards in which the boards can be easily replaced.

These and other objects, advantages and novel features of the present invention will become apparent from the following detailed description of the invention taken in conjunction with the accompanying drawings.

DESCRIPTION OF THE EMBODIMENTS The memory board stacking module 1 of the present invention is supported by a motherboard 10. As shown in FIG. The stacking module or memory module 1 consists of a first memory board 20°, a second memory board 40.
It has a third memory board 60 and a fourth memory board 80, all of which are in a piggyback (back mounted) configuration as shown in FIG.

Plates 20, 40, 60, 80 are substantially the same and plate 20 will be described first. A plurality of memory chips 22 are mounted on the first memory board 20. 'M220 is rectangular and has a first edge region 24 and an opposite second edge region 26.

The first edge region 24 includes one or several rows 28 of stacking contacts 32a. Similarly, the second edge region 26 has one or several rows 30 of stacking contacts 32a as shown.
Contains ffi.

FIG. 2 clearly shows the structure of the stacking contact 32a.

The volume chamber contact 32a has a female socket end 34a fixed within the memory board 20 and an opposite male end 36a'. Each male end 36a is removably secured within a suitable socket or plated opening 12 in the motherboard 10.

The socket end 34a is electrically connected to a bin (not shown) of the memory chip 22 by an input/output conductor mechanism (not shown) either directly or via a circuit in a tub on the board. This input/output mechanism is the same for each board. Therefore, contact 32a
has input/output bins that electrically interconnect memory chips 22 on board 20 to circuitry (not shown) on motherboard 10.

An advantage of the present invention is that a second substantially identical memory board 40 can be stacked on top of, or back-mounted, memory board 20 to expand the memory capacity of module 1.

A similarly arranged memory chip f22 is mounted on the substantially identical second memory board 40, which is connected to the stacking contact 32h by the same input/output mechanism (not shown). The memory board 40 has a first edge area 44 and an opposite, twentieth green area 46 . - rows or rows 48 of stacking contacts 32h are arranged along the edge region 44; Similarly, a row or several rows 50 of stacking contacts 32h are arranged in the edge region 46.

In FIG. 2, each stacking contact 32b has a female socket end 34h fixed in the plate 40 and a male end 36h on the opposite side.
have. Each end 36h is removably secured within the female socket end 4a of the corresponding stacking contact 32a of the first memory board 20. The tip 22 of the board 40 is the board 20
The stacking contacts 32b are electrically interconnected and each contact 32h is electrically interconnected to the stacking contacts 32b by the same input/output circuitry as that for the plate 2.
The memory tips 22 of the second memory board 40 are electrically interconnected to the corresponding stacking contacts 32a of the second memory board 40.
are electrically interconnected with the board 100 circuitry via contacts 32a, 32h.

As described above, substantially the same third memory board 60 is similarly mounted on the back surface of the stacking contact 32c4Cj board 40. Similarly, substantially the same fourth memory 1ffi8
0 is mounted on the back side of the sixth memory board 60 by the stack contact 32d.

The memory boards 20, 40, 60, and 80 have the same chip 22 arrangement and each chip 22 stacking contact 32a-3.
The stacking contacts 32a-32d are all substantially similar in that they have the same input/output conductor arrangement connecting to the plates 20, 40, 6.
0.80 and are stackable. Although the configuration between the memory boards 20.40.60 and 80 is thus the same, each board 20.40°60.80
are referred to as "substantially the same" because they contain somewhat different board selection circuitry and allow input data to be input to only one intended memory board.

FIG. 3 shows the board selection circuit 90 provided on each board 20.40, 60.80. Circuit 90 is industry standard 74F139
．． TTL 2-4 decoder, has a chip 92, which has 2
Human power 94.96 and 4 outputs 98.100, 102 and 1
04.

Each data group input to module 1 includes 2-bit board selection digital data. Each of these two bits moves up a designated column of contacts 32a132h132CI326 and is input to a chip 92 on each board. Chip 92 then decodes the signals received via inputs 94 and 96 to determine which outputs 98, 100, 102, and 104 are enabled. For example, if "0" is used to display a low level signal and "1" is used to display a high level signal, an input of "o, o" will enable output 98 and "0,
1” enables output 100, “1.0” enables output 1
02'tl-enabled.

"1.1" enables output 104. Output 98.1 on each board 1 20.40.60 or 80
Only one of the outputs 00.102 or 104 is electrically connected to the plate conductor system, and the remaining outputs are open. In this way, the output 98 is electrically connected on the plate 20, and the output 10
0, 102 and 104 are open; output 1 on board 40
Only output 00 is connected and outputs 98, 102 and 104 are open; on board 60 only output 102 is connected and output 98 is connected.
°100 and 104 are open; output 10 on board 80
4 is connected and outputs 98, 100 and 102 are open. FIG. 3 shows the electrical connections of the plate 80 consisting of jumpers connected from the output 104 to the conductor arrangement 112 of the plate 80 by dotted lines 110.

Therefore, when inputting a group of data to the memory chip 22 of the board 80, the board selection 2 bits input to 94.96 are 1
, 1''. In response to input ``1.1'', Tetoon 92 on each board enables output 104. However, output 104 is opened on plates 20, 40 and 60, and plate 8
Since it is electrically connected only on board 8, the data is
Only 0's are input to the 2 memory chip. In this way, when a group of data is input to the module 1 via the stacking contact rows 32ae32h*32c and 32d, the data is transmitted to each board 20, 4.
0.60.80, but it is input to the memory chip 22 of only one plate determined by the plate selection 2 bits of the data group.

Having described the basic structure of the present invention, its advantages as a memory module assembly can be understood.

First, plates 20.40.60.80 have the same memory chip arrangement and each has the same memory capacity. Therefore, each plate can be regarded as a 20.40°60.80't memory unit. Furthermore, the plates are removably fastened to each other. Memory plates can therefore be added to or removed from module 1 in order to expand or change the memory capacity of module 1. This feature is particularly advantageous in that the capacity of the memory module can be tailored to the user's needs and expanded as the user's needs change with minimal effort and expense.

In addition, even if one plate 20.40, 60.80 is defective, it can be easily removed and the conductor system can provide the appropriate output 98,
A jumper connected to 100, 102 or 104 allows replacement with the same board.

Although embodiments of the invention have been disclosed, many modifications and variations are possible in light of its teachings. Accordingly, the invention is limited only by the scope of the claims appended hereto.

[Brief explanation of drawings]

FIG. 1 is a partially exploded view of a memory stacking module of the present invention, FIG. 2 is a sectional view showing a stacking contact of the present invention, and FIG.
The figure is a perspective view showing the board selection circuit of the present invention. Explanation of symbols 1...Memory module 10...Base material 20.40, 60.80...Memory board 22...Memory chip 24.26.44.46...Edge area 32a, 32h, 32 'c, 3:2d...Stacking contacts 34a, 34h...Female socket ends 36a, 36h...Male end 90...Board selection circuit agent Akira Asamura 5

Claims (1)

[Scope of Claims] (1) A motherboard having a plurality of input/output female sockets electrically connected to a motherboard circuit. A first memory board mounted with a memory chip connected to a first row of input/output stacking contacts by an input/output conductor mechanism, wherein a valley of the stacking contacts is supported by the first memory plate thickness. having a female socket end and a male end opposite thereto;
The male end of the stacking contact is removably secured to one of the female sockets of the mother plate.
and a second memory board mounted with a memory chip f connected to the input/output stacking contacts of the first row by an input/output unit mechanism, wherein the valleys of the stacking contacts are provided with the memory chips f connected to the first row of input/output stacking contacts. a female socket end supported by the memory plate of No. 2 and a male end on the opposite side;
each male end of the stacking contact of the second memory board is removably secured to one of the female socket ends of the stacking contact of the first memory board;
with memory board. the stacking contacts electrically connect the memory chips of the first memory board and the memory chips of the second memory board to the circuits of the motherboard. (2. In the module according to claim 1, the first memory board is rectangular and has a first edge area and a second edge area on the opposite side thereof, and A stacking contact is disposed along the first edge region and a stacking contact is disposed along the first edge region;
a row of stacking contacts is disposed along the second edge region, the second row of stacking contacts electrically connected to the tip by the input/output mechanism, and the second row of stacking contacts is electrically connected to the tip by the input/output mechanism; the board is rectangular and has a first edge area and an opposite second edge area, and the first row of stacking contacts is disposed along the first edge area of the second memory board. a second row of stacking contacts is disposed along the second edge region of the second memory board, and the second row of stacking contacts is connected to the second memory board by the input/output mechanism. q! of the male ends of the second row of stacking contacts of the second memory board are electrically connected to the memory chips of the second memory board. rk is a memory board stacking module which is removably secured to one of the female socket ends of the second row of stacking contacts of the first memory board. (3) The module of claim 2, wherein the first memory board and the second memory board have substantially the same input/output conductor arrangement connecting the steps to the stacking contacts. Module for board stacking. (4) The module according to claim 6, wherein the first memory board and the second memory board are substantially the same. (5) The module according to claim 4, further comprising a device provided on the first and second memory boards for selectively inputting data to the first or second memory board. Module for stacking memory boards. 161. The module of claim 5, wherein said first and second memory boards are the same except for said selection input data device. (7) In the module according to claim 5, the first memory board and the second memory board each include a memory module having a memory capacity. The memory module and the memory capacity may be expanded by operatively securing a third memory board to the second memory board in a piggyback configuration, wherein the third memory board is connected to the first and twentieth memory boards. the edge region and each said first
and a second edge region IICG.
rows of stacking contacts, and the male ends of the first and second rows of stacking contacts of the sixth memory board are for stacking the first and second rows, respectively, of the second memory board. A memory board stacking module, wherein a receptacle is removably retained within the female socket end of the contact, and wherein the third memory board is substantially the same as the first and second memory boards.