JPS599743A - Classifying circuit - Google Patents

Abstract

PURPOSE:To discriminate quickly necessary information, by providing a memory circuit for inputting the classifying information added to real information, in a classifying circuit for classifying whether the real information on a system bus is necessary to its own station or not. CONSTITUTION:In each of plural stations coupled by a system bus, all information frames on the system bus are inputted, and the first and the second classifying informations of the information frame are latched to the first and the second latching circuits A1, A2. Address information of classifying information is read out of the latching circuit, and in this case, when it is necessary information to its own station, the first coincidence information is obtained from the first classifying memory B1, and if it is unnecessary, specified information is obtained. In the second classifying memory B2, too, the second coincidence information or specified information is outputted in accordance with whether the information is necessary or not. In case when it is necessary to the own station, a necessity deciding signal is outputted from a deciding circuit, and full processing information is outputted from each processing memory D1-DN.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a selection circuit that selects whether or not actual information flowing on a system bus is necessary for its own station, and an object of the present invention is to speed up the selection and reduce processing for the actual information. With the goal.

Generally, in an information transmission system in which multiple stations are connected via a system bus and information is received and passed between arbitrary stations, each station that wants to transmit information has to specify the type of actual information that it wants to transmit. An information frame as shown in FIG. 1 is constructed by adding selection information representing the information, and the information frame is sent to the system bus. As shown in the figure, this sorting information consists of first sorting information and second sorting information; for example, the first sorting information represents the device on the receiving or receiving side;
The second selection information represents the type of actual information.

On the other hand, each of the other stations takes in all the information frames flowing on the system bus, and the first . Based on the second selection information, it is determined whether or not the actual information is necessary for the own station.

By the way, in a conventional sorting circuit of this kind, each of a plurality of stations is provided with a sorting memory in which each piece of sorting information of the actual information necessary for the own station is written, and the memory address of each sorting memory is written. It scans to sequentially detect a match between the written selection information and the received selection information, and upon detecting this match, the currently received information is taken as necessary information and incorporated into its own station.

However, according to the conventional sorting circuit, it is necessary to scan the sorting memory every time information is received to detect a match between the two sorting information, so the sorting takes a lot of time and moreover, there is a large amount of received information. Since there are hundreds to thousands of species, a considerable amount of time is required, which is inconvenient.

This invention was made with the above points in mind,
A plurality of stations connected by a system bus each take in all the information flowing on the system bus, and whether or not the actual information of each information is necessary for the own station is added to the actual information to indicate its type. 1st. In a sorting circuit that sorts based on second sorting information, the first sorting information and a part of the second sorting information are input, and the first sorting information and a part of the second sorting information of actual information necessary for the own station are input. a first sorting memory in which different first-number information is written for each of the actual information, and the same specific information is written in addresses other than the above; and output information of the first sorting memory. When the other part of the second sorting information is inputted and is real information necessary for the own station, the addresses of the first-number information and the other part of the second sorting information each have a second address that is different for each piece of real information. - A second sorting memory in which numerical information is written and the same specific information written in addresses other than the above, and the output information of the first sorting memory and the output information of the second sorting memory are input. said the first
- processing memory in which processing information for the actual information is written in addresses based on the - number information and the second - number information, and output information of the second sorting memory;
The present invention is a selection circuit characterized by comprising a determination circuit that determines the actual information as necessary information when the output information is the specific information, and determines the actual information as unnecessary information when the output information is the specific information.

Therefore, the first part of the information imported into your own station. The first sorting information and part of the second sorting information of the second sorting information are input to the address of the first sorting memory, and the output information of the first sorting memory and the other part of the second sorting information are inputted. By inputting the address of the second sorting memory, if the actual information of the information is necessary for the own station, the first-number information is output from the first sorting memory and the second sorting memory also outputs the first number information. If the second-number information is obtained and it is not necessary for the own station, specific information can be obtained from the first second sorting memory, so the judgment result can be obtained more quickly than the judgment circuit that makes a judgment based on the output information of the second sorting memory. It is possible to quickly select real information and speed up the process, and furthermore,
If the actual information is necessary for the own station, the matching information from both screening memories is input to the address of the processing memory, so the processing information for the actual information can be obtained from the processing memory at the same time as the screening. By adding this processing information to the actual information and transmitting it to the own terminal, processing at the terminal can be facilitated and the processing for the actual information can be reduced.

Next, the present invention will be explained in detail with reference to FIG. 2 showing one embodiment thereof and the above-mentioned FIG. 1. Note that the first . Each of the second selection information is 8-bit information data, and the numbers surrounded by circles in FIG. 2 each indicate the number of bits.

In FIG. 2, (AI) and (A2) are first . Second latch circuit, (Bl), (B2)
consists of ROM (read only memory) and address 1
2 bits, data 8 bits configuration. This is a second sorting memory, and the first latched by the first latch circuit (Al).
12 hits of the 8 bits of sorting information and the upper 4 bits of the second sorting information latched in the second latch circuit (A2) are input to the address of the first sorting memory (B1), and The 12 bits of the 8 bits of the output information of the memory (B1) and the lower 4 bits of the second sorting information latched by the second latch circuit (A2) are stored in the second sorting memory (
B2) is input to the address. In this first sorting memory (B1), the addresses represented by the 8 bits of the first sorting information and the upper 4 bits of the second sorting information of the real information required by the own station are stored in different addresses for each piece of real information. predetermined first
- In addition to writing the number information, the same specific information (for example, FFH) is written to each address other than the above, and the second selection memory (B2) contains the actual information required by the own station. The first sorting memory (
Predetermined second-number information that differs for each actual information is written to the address represented by the first-number information from Bl) and the lower 4 bits of the second sorting information, and the same second-number information is written to the addresses other than the above. Specific information (e.g. FF
H) is written.

(0 is a determination circuit that receives the output information of the second sorting memory (B2) and determines whether or not the currently captured actual information is necessary for the own station based on the output information;
If the output information in 2) is specific information, an unnecessary determination signal is output, and if the output information is second-number information, a necessity determination signal is output.

(DI), (B2),..., (DN) are RO
The first .M consists of 12 bits of address and 8 bits of data. Second. ....

This is the Nth processing memory, and 12 bits of the 8 bits of the output information of the first sorting memory (B1) and the upper 4 bits of the output information of the second sorting memory (B2) are manually input to each address. . Memory for each process (January), (B2
), . . . , (1)N) are the addresses represented by the 1st-number information and the 142nd digit 4 bits of the second-number information, respectively, when the actual information is needed by the own station. 1. Regarding the actual information. Second. . . . Nth processing information is written.

Next, the operation of the above embodiment will be explained.

First, each of the plurality of stations connected by the system bus takes in all the information frames flowing through the system bus ``2'', and each time this information frame is received, the first . The second sorting information is transferred to the first sorting information. The second latch circuits (AI) and (A2) are respectively latched.

Then, in the first sorting memory (B1), the 8 bits of first sorting information from the first latch circuit (Al) and the second sorting information are stored.
The address information represented by the upper 4 bits of the second selection information from the latch circuit (A2) is read out, and here,
If the actual information in the received information frame is necessary information for the own station,
First-number information corresponding to the actual information is obtained from the first sorting memory (B1), and if the received actual information is unnecessary information, specific information F F H is obtained. Furthermore, the second
In the sorting memory (B2), the first sorting memory (
8 bits of output information from B1) and the second latch circuit (A
The address information represented by the lower 4 bits of the second sorting information from 2) is read out, and if the received actual information is the necessary information, the first number information and the second sorting information are used to 2-If the number information is obtained and the received actual information is unnecessary information, the output information of the first sorting memory (B1) is specific information, so the specific information is output from the second sorting memory (B2). can get. That is, 1st. Second: Of the 16 bits of screening information, first the upper 12 bits are checked to see if they match the own code, then all 16 bits including the lower 4 bits are checked to see if they match the own code. Only when they finally match, the second-number information is output.

Then, when the second-number information is obtained from the second sorting memory (B2), a necessity determination signal is output from the determination circuit 0, and it is determined that the currently captured information is necessary information for the own station. Memory for each process (Di).

(B2),... (DN), the address information represented by the 8 bits 1. of the first number information and the upper 4 bits of the second number information is read out, and the first . Second. ..., the Nth processing information is obtained, and this entire processing information is added to the actual information and transferred to the own terminal.

Also, when specific information is obtained from the second sorting memory (B2), an unnecessary judgment signal is output from the judgment circuit (Q), and it is judged that the currently captured information is unnecessary for the own station, and the received information is thrown away.

Therefore, according to the embodiment, the first . The second sorting information is used as the first sorting information. By causing the second latch circuits (Al) and (A2) to latch, the first. The second sorting information is a double sorting memory (Bl),
It is input to the address of (B2), and the determination circuit checks the total number of bits of the 1st and 2nd sorting information to see if it matches the own station code.
It is possible to quickly determine whether or not the actual information is necessary for one's own station, and the considerable amount of time required for conventional scanning is not required, making it possible to speed up the selection process. If the received actual information is necessary for the own station, the 1st, 2nd, .・
. . . Since the Nth processing information is obtained, by adding this to the actual information and transmitting it to the terminal, processing at the terminal becomes easier and the processing for the actual information can be reduced.

[Brief explanation of the drawing]

FIG. 1 is a configuration diagram of an information frame in a general information transmission system, and FIG. 2 is a schematic block diagram of one embodiment of the selection circuit of the present invention. (Bl), (B2)... 1st. Second sorting memory, 0
...judgment circuit, (Di), (B2), ..., (DN
)... 1st. Second. .... Nth processing memory. Agent: Patent Attorney Ryutabe Fujita

Claims (1)

[Claims] ■ Each of the multiple stations connected by the system bus takes in all the information flowing on the system bus, and determines whether or not the actual information of each piece of information is necessary for its own station, by checking the type of information that is added to the actual information. In a sorting circuit that sorts based on first and second sorting information represented by the first sorting information and the second sorting information,
A part of the screening information is input and the first part of the actual information necessary for the own station is input.
a first sorting memory in which first-number information that is different for each piece of actual information is written in addresses corresponding to the sorting information and a part of the second sorting information, and the same specific information is written in addresses other than the above; , according to the first number information and the other part of the second sorting information when the output information of the first sorting memory and the other part of the second sorting information are input and are actual information necessary for the own station. a second sorting memory in which second-number information different for each actual information is written in the addresses and the same specific information written in addresses other than the above; output information of the first sorting memory; a processing memory in which the output information of the second sorting memory is inputted and processing information for the actual information is written in addresses according to the first number information and the second number information, respectively; It is characterized by comprising a determination circuit that determines the actual information as necessary information when the output information of the memory is the second-number information, and determines the actual information as unnecessary information when the output information is the specific information. screening circuit.