JPH0737385Y2 - wireless device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (Industrial field of application) The present invention relates to a wireless device, and more particularly to a wireless device having a memory channel function.

(Prior Art) A radio that selectively communicates with a partner radio by using a predetermined carrier frequency channel is widely adopted in amateur radios.

In this type of conventional radio device, each frequency channel of a plurality of carrier frequency channels is associated with one memory to be a memory channel, and a plurality of frequency channels (hereinafter referred to as memory channels) are prepared. Also treated as one group (bank) and processed.

(Problems to be Solved by the Invention) As described above, in the conventional wireless device, all memory channels are always treated as one bank for processing regardless of the number of memory channels. Problems occur.

That is, for example, as shown in FIG. 9, the sum of CH1 to CH100
When 100 channels are prepared, these 100 channels are handled as one bank, so when communicating with the communicating stations A, B, C, etc., the frequency range of the channels used by each of the communicating stations is predetermined. The CH1 to CH1 scan operation to search for the frequency of the partner station.
It is necessary to perform sequentially over all 00. When the radio waves from the partner station and the radio waves from other stations are mixed, the search stops on channels other than the desired partner station channel, so accurate detection is difficult, and the scan operation must be performed again. Not efficient.

Also, when changing or adding memory channels, the memory channels are not arranged in frequency order, the frequency difference between memory channels may increase, and it takes time to lock the synchronization PLL. .

Further, frequency data may be randomly stored in a plurality of memory channels, and data may not be stored in a memory channel in the middle (blank data). In this case, the correspondence between the memory channel and the frequency data may be incorrect. Be clear.

Therefore, an object of the present invention is to provide a radio device having a plurality of memory channels, having high efficiency, and capable of shortening the PLL lock time.

(Means for Solving the Problems) In order to solve the above-mentioned problems, a radio device according to the present invention has a predetermined memory among a plurality of memory channels in which a plurality of carrier frequency channels are associated with each other and stored in a memory. In a radio that selects and communicates with a channel, the plurality of memory channels are divided into a plurality of banks, and memory bank processing means for connecting and separating the banks, and frequency data stored in the memory channels are checked. It comprises at least one of a memory correction processing means for collecting only memory channels in which data is stored, and a memory sort processing means for rearranging the frequency data stored in the memory channel in order of frequency.

(Operation) In this invention, a plurality of memory channels are divided into a plurality of banks, a memory bank function for connecting and separating the banks, and frequency data stored in the memory channels are checked to store the data. It has at least one of a memory correction function that collects only memory channels and a memory sort function that sorts the frequency data stored in the memory channels in the order of frequency, and selects a predetermined memory channel from a plurality of memory channels. By configuring a radio that communicates with each other, the PLL lock time can be shortened with high efficiency.

(Example) Next, this invention is demonstrated, referring drawings.

FIG. 1 is a block diagram showing the configuration of an embodiment of a radio device according to the present invention.

In this embodiment, a key 1 for designating various functional processes described below, an encoder 2 for setting a memory channel and the like, a signal processing unit for receiving outputs from the key 1 and the encoder 2 and performing predetermined signal processing. 3, a display element 4, and a display drive circuit 5 for displaying the display information from the signal processing unit 3 on the display element 4.

According to the program procedure stored in the ROM 34, the signal processing unit 3 includes a CPU 31 that performs arithmetic processing at a clock timing from a clock generator 36, a RAM 35 that stores data required for arithmetic processing, a key 1 and an encoder 2. Has an input port 32 for sending the data to the CPU 31, and an output port 33 for outputting the display data from the CPU 31 to the display drive circuit 5.

The radio device according to the present invention has three functions: a memory bank function, a memory correction function, and a memory sort function.

The memory bank function is a function of dividing a plurality of memory channels into a plurality of groups (banks) and connecting or separating the banks. For example, in FIG. 2, a group of 100 channels as shown in FIG. 9 is divided into 1 group (1 bank) for every 20 channels, and each bank is divided into partner stations A, B, C, D,
The state assigned to E is shown.

The memory correction function is a function of checking the contents of memory channels and collecting only the memory channels in which data is stored. FIG. 3 (A) shows CH1, CH3, CH when, for example, bank 1 and bank 2 in FIG. 2 are connected.
5, CH20, CH39 have data stored in them, and other CHs have no data stored.The memory correction function shows that only the channels that store data are sequentially arranged. There is. Also, FIG. 3 (B)
In the case where bank 5 is not connected to another bank,
CH84, CH83, CH100 stores data but other channels do not store data, but channels that store data by the memory correction function CH82, CH83, CH100 are CH81, CH82, CH83 , And the remaining CH84 to CH100 are shown as memories in which no data is stored.

The memory sort function is a function of rearranging the data stored in the memory channels in order of frequency.

FIG. 4 shows a state in which the frequency data is stored in each of CH1 to CH20 as shown in the figure, and is sorted by the sorting function in the order of memory channels for each frequency. Here, the memory channel in which no data is stored is the final channel CH20.

The operation procedure of various processing functions in the present invention will be described below with reference to the flow charts of FIGS.

The memory bank function 4, the memory correction function, and the memory sort function are designated by pressing and operating the keys A, B, and C of the key 1 in FIG.

In Fig. 5, after initial setting, operate key 1 to select key A,
Press either B or C to specify the required function (step S1).

When it is determined in step S2 that the key A is pressed, memory bank function processing (step S3) is performed, and when it is determined that the key B is pressed in step S4, memory correction function processing is performed ( If it is determined in step S5) that the key C has been pressed in step S6, memory sort function processing is performed (step S7).

The processing of the memory bank function in step S3 is performed according to the processing procedure shown in FIG.

When the memory bank function process is started, in step S31, the key 1 is pressed, the memory D is pressed by the operation to connect or separate the memory banks, and the encoder 2 is pressed.
Set the channel CH number by. The channel CH number is displayed on the display element 4 (step S32), and it is determined whether or not the key D is pressed (step S3).
3) If it is not pressed, the process returns to step S31. If it is pressed, it is determined whether or not the CH is 20, 40, 60, 80 (step S34).

If the determination in step S34 is "YES", the specified bank and the bank above it are combined (step S35), and the process ends. For example, when CH is 20, CH1 to CH20 in the designated bank are combined with CH21 to CH40.

If the determination in step S34 is "NO", CH is 21,41,61,81
Is determined (step S36), the process is terminated if "NO", and if "YES", the bank of the designated channel and its subordinate bank are separated (step S3).
7), the process ends.

Operations such as scanning and the like are performed in the thus obtained combining and separating banks.

Memory correction function processing of FIG. 5 (step S5)
Is performed according to the processing procedure shown in FIG.

When the memory correction function process is started, the initial value of the check CH is set to check whether or not data is stored in the memory channel (step S5
1). For example, if the display CH is "5", the minimum CH of the bank is set to "1".

Next, in step S52, the check CH data is detected, and it is determined whether or not there is memory data (step S53).
If it is determined that there is no memory data, the blank CH number is stored (step S54). On the other hand, if it is determined in step S53 that there is memory data, check
The CH number is incremented (step S62), and it is determined whether or not the channel is ended (step S63). If not ended, the process returns to step S52, and if ended, the process is ended.

After the process of step S54, the number of the check CH is incremented (step S55), it is determined whether or not the channel is ended (step S56), the process is ended if it is ended, and if it is not ended, it is checked in step S57. The CH data is detected to determine the presence / absence of memory data (step S5
8).

If it is determined that there is no memory data in step S58, the process returns to step S55, and if it is determined that there is memory data,
Write check CH data to blank CH (step
S59), blank data (no data) is written to the check CH (step S60). After that, the number of the blank CH is set to the number of the check CH (step S61), and the process of step S62 is transferred.

When the memory sort function process is started, a process of rearranging the contents stored in the memory channels in the order of frequency is performed in step S71 of FIG. 8 and the process is ended.

In the above processing, the data is stored in the RAM 35.

In the memory correction function, the case where data is not written in the memory channel can be considered as a kind of data and can be substituted by the memory sort function.

(Effect of Device) As described above, according to the wireless device of the present invention, it is possible to divide a plurality of memory channels into arbitrary groups, so that it is possible to use the memory channels according to the other party and the purpose, and to scan. Search can be performed efficiently.

Further, since the memory channels storing the data can be preferentially arranged, it becomes easy to associate the memory channels with the frequencies, and it is possible to eliminate the existence of the memory channels in the continuous memory channels in the middle of which the data is not stored.

Furthermore, since the memory channels can be arranged in frequency order, the frequency difference between the memory channels becomes small, and the lock time of the synchronization PLL can be shortened.

[Brief description of drawings]

FIG. 1 is a block diagram of the configuration of a radio device according to the present invention, FIG. 2 is a diagram for explaining the channel bank function of the present invention, and FIGS. 3 (A) and 3 (B) are the present device. FIG. 4 is a diagram for explaining the memory collection function of FIG. 4, FIG. 4 is a diagram for explaining the memory sort function of the present invention, and FIG. 5 is an operation processing procedure showing an embodiment of a radio device according to the present invention. Flowcharts, FIGS. 6, 7, and 8 are flowcharts showing procedures of the memory bank function processing, memory correction function processing, and memory sort function processing according to the present invention, and FIG. 9 is a memory channel of a conventional radio device. It is a figure for explaining. 1 ... Key, 2 ... Encoder, 3 ... Signal processing unit, 4 ... Display element, 5 ... Display drive circuit, 31 ... CPU, 32 ... Input port, 3
3 ... Output port, 34 ... ROM, 35 ... RAM, 36 ... Clock generator.

Claims (2)

[Scope of utility model registration request] 1. A radio apparatus for selecting and communicating with a predetermined memory channel among a plurality of memory channels in which a plurality of carrier frequency channels are stored in association with a memory, respectively. A radio device characterized by comprising memory bank processing means for dividing into banks and connecting and separating the banks. 2. A radio device for selecting and communicating with a predetermined memory channel among a plurality of memory channels in which a plurality of carrier frequency channels are associated with each other and stored in a memory, and stored in the memory channel. A radio device comprising memory correction processing means for checking frequency data and collecting only memory channels in which the data is stored. (3) In a radio that selects and communicates with a predetermined memory channel among a plurality of memory channels in which a plurality of carrier frequency channels are respectively associated with a memory and stored, frequency data stored in the memory channel And a memory sort processing means for rearranging in order of frequency.