JPS599698A - Automatic rhythm performer - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an improvement of an automatic rhythm performance device for a m-shaped musical instrument such as a choushi organ.

Conventionally, this rice automatic rhythm performance device has been able to generate rhythm patterns using instrument-specific drive data for each rhythm instrument for each rhythm (
In addition to providing a rhythm pattern memory stored as binary logic data), a rhythm sound source circuit that generates an instrument sound signal for each rhythm instrument is provided, and instrument-specific drive data of a predetermined rhythm is provided from the rhythm pattern memory according to the count value of the tempo signal. There is a device in which the rhythm tuning circuit is driven by sequentially reading out the musical instrument-specific driving data.

In such an automatic rhythm performance device, the rhythm volume is usually adjusted to an appropriate value by operating the volume of the rhythm sound.

By the way, in actual rhythm performance, when changing the rhythm volume, the playing method of each rhythm instrument (percussion instrument) is also slightly changed, so if the rhythm cover is different, the instrumental sound of each rhythm instrument will naturally be different. However, in the conventional automatic rhythm sound performance device described above, even if the rhythm volume is changed, only the volume changes and the instrument sound itself, that is, the pitch, timbre, envelope, etc. of the instrument sound, does not change, so the actual rhythm There was a general consensus that I couldn't give a better impression than the performance.

In view of the above circumstances, it is an object of the present invention to provide an automatic rhythm performance device in which when the rhythm volume is changed, the sounds of each musical instrument generated are also changed in accordance with the change in the rhythm volume. Rhythm sound generated from the turn memory (when the rhythm sound source circuit is driven by the turn to generate the instrument sound signal of each rhythm instrument, the rhythm sound control means changes the instrument sound idg according to the rhythm volume) DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of an automatic rhythm performance device according to the present invention will now be described in detail with reference to the drawings.

FIG. 1 is a block diagram showing the schematic configuration of this embodiment. In this figure, the rhythm pattern memory 1 contains selectable famous rhythms (e.g. waltz, swing, rumba, jazz rock, etc.) [each rhythm instrument (e.g. cymbal,
The drive data for each musical instrument (bass drum, conga, bongo, etc.) is stored in a single memory (ROM). That is, in this rhythm pattern memory 1, each bit corresponds one-to-one to each rhythm instrument, and instrument-specific drive data in which one kat is the same number of bits as the rhythm instruments are arranged corresponding to each rhythm. lll in the order of rhythm progression! It is remembered.

Next, the rhythm selection switch 2 is a switch for selecting the rhythm desired by the performer from the above-mentioned rhythms, and is provided at the operation knob of the limited instrument. This rhythm selection switch 2 sends a signal indicating the selected rhythm)
t S L (code No. 46) is output. Reference numeral 3 denotes a slide-type operator for adjusting the rhythm tempo provided in the control panel section, and the tempo control data generator 4 is connected to a variable resistor (not shown) that is slow-acting to this operator 3. The rhythm pattern output circuit 5 outputs rhythm control data TMP indicating the rhythm tempo corresponding to the slide position of the operator 3 according to the resistance (m). address i9A
1 to the address input terminal A of the rhythm pattern memory 1.
D, and the rhythm selection switch 2 is supplied from the same memory 1 to the rhythm selection switch 2.
The rhythm pattern of the rhythm selected by , that is, the data of the striated organ-specific drive data of the same rhythm are sequentially read out. That is, the rhythm pattern generation circuit 5 sets the address signal A1 based on the signal R8L to designate the area in the rhythm nok turn memory 1 where the group of instrument-specific drive data of the selected rhythm is stored. On the other hand, this address JrPX No. A1 is made into a lateral complex at the rhythm tempo indicated by the data TMI', and thereby the drive data for each instrument in the area is sequentially repeated at the rhythm tempo corresponding to the sliding position vt of the operator 3. read out. Instrument-specific drive data RD read out from this rhythm pattern memory 1
k':i is supplied to a rhythm sound source circuit 6, which will be described later. Next, reference numeral 97' indicates the rhythm sound tl provided in the operation panel section.
! 1. Slide-type control for adjustment (volume volume)
The volume control data generator 8 is linked to the controller 7 and generates rhythm volume control data indicating the rhythm volume corresponding to the slide position of the controller 7 according to the resistance value of the variable resistor (not shown). Output VOL. The rhythm sound source circuit 6 inputs l? to each bit of the instrument-specific drive data HD. j l is provided with instrument sound signal generation means for rhythm instruments of different types, and each musical instrument has drive data R.
When D is supplied, it drives the musical instrument sound signal generating means corresponding to the bit 01'' in the data RD, and
The pitch, timbre, envelope, etc. of the musical instrument sound signals generated by these musical instrument sound signal generating means are determined by the rhythm sound t'ff1.
It is changed according to lJ control data VOL. The musical instrument sound signals generated by the respective musical instrument sound signal generating means of the rhythm sound source circuit 6 are synthesized and supplied to the multiplier 9 as a rhythm sound signal R8G (digital one-wave control). The multiplier 9 controls the rhythm sound, and outputs the rhythm sound signal R8G mixed with the rhythm volume control data VOI.

The rhythm sound (N-q RS
G' (rhythm sound signal whose volume has been adjusted) is transmitted through a digital-to-analog converter (hereinafter abbreviated as a D/A converter) 10
After being converted into an analog signal by
The sound is supplied to the speaker 12, where it is amplified and supplied to the speaker 12, where it is produced as a rhythm sound.

Next, the detailed configuration of the rhythm sound source "!" path 6 in FIG. 1 will be explained with reference to the block diagram in FIG. 2.

First, to give an overview of the rhythm sound source circuit 6 shown in FIG. 2, this rhythm sound source circuit 6 uses a so-called continuous wave memory method, and is capable of processing instrument sound signals of 16 types of rhythm instruments over time. It is constructed so that it is generated in a divided manner, and the generated musical instrument sound No. 1g can be changed in four stages according to the rhythm volume. That is, as shown in FIG. 3, the waveform memory 13 in FIG.
The sounds of 6 types of rhythm instruments (cymbals, bass drums, ikonga, ..., maracas) are stored using PCM codes in 4 types according to the rhythm volume for each instrument. ing. In this case, taking as an example the instrumental sound of Cymbal I, cymbal #1 is the cymbal instrumental sound when the rhythm volume is at its lowest level, and cymbal #2 is the sound at which the rhythm volume is 1fs2 higher than this. The following shows the areas where the cymbal instrumental sounds when the rhythm volume is high are stored in the order of cymbal #3 and cymbal #4.Also, the areas where the cymbal instrumental sounds when the rhythm volume is high are stored.
...The same applies to each musical instrument sound of the maracas. When the instrument-specific drive data RD is supplied and the instrument sound of the rhythm instrument corresponding to the 1'' bit in the data RD is extracted from the waveform memory 13, the Instrument sounds are read out according to the rhythm tone control data 'VOL.

Each part of the rhythm sound source circuit 6 will be described in detail below.The sound discrimination circuit 14 divides the rhythm sound wave indicated by the data VOL into four stages, and outputs each of these stages as a 2-bit signal. In other words, this volume discrimination circuit 14 outputs a signal of 100" when the rhythm volume is at the lowest stage, outputs a signal of 11" when the rhythm volume is at the highest stage, and outputs a signal of 11" when the rhythm volume is at the lowest stage. In two stages, if the rhythm volume is on the smaller side, it is 001'', and if it is on the louder side, it is lO.
These 2-pit signals are supplied as the lower bits of the address signal to AD of the address memory 16, which will be described later. This channel counter 15 is a 4-bit binary counter that determines the readout order and readout timing for time-divisionally reading out the rhythm instrument sounds (that is, information for 16 channels).This channel counter 15 constantly counts the clock. Then, the 1' value is output as a 4-bit signal.

Note that the period of the block diagram is sufficiently shorter than the minimum rhythm unit time of this M child instrument. The 4-bit signal g output from the channel counter 15 is supplied to the address input terminal AD of the address memory 16 as the upper bit of the address signal. The address memory 16 is a read-only memory (ROM) that stores a starting address (start address) and a starting word count (range) when starting an instrument sound from the waveform memory 13. . In this case, 'the waveform memory 1
Notes on each instrument sound in 1. are the starting addresses L1, L2, L3 . ...λL64 is the start address memory 16a in this address memory 16.
to L1%L2, L3. . . . are stored in the order of L64, and the number of words in each storage area is N1%N2, N3, .
..., N 64 is stored in the range memory 16b of this address memory 16 as N1, N2, N3,...
..., N64's 1st grade, dself 1. is being treated. When address signals are supplied from the volume discrimination circuit 14 and the channel counter 15, the address memory 16 reads data from the start address memory 16a and the range memory 16b in parallel. That is, for example, when a signal "0000" is supplied from the channel counter 15 and the sound is discriminated M
If a signal from at 14 to 00'' is supplied, 6go,
Data "LIJ" is output from the start address memory 16a, and data "N1" is output from the range memory 16b.
'' is read out, and for example, if the channel counter 15 supplies a signal OOOl'' and the volume discrimination circuit 14 supplies a signal 11'' (
Then, the data “N8” is read from the start address memory 16a, and the data “N8” is read from the range memory 16b.
Data N-5J is read. The data SA read from the start address memory 16a is supplied to one input terminal A of the Kayu0 circuit 17, and the data RG read from the range memory 16b is supplied to the comparator 18.
is supplied to one input terminal A of the .

On the other hand, the instrument-specific drive data RD (16-bit data in this case) extracted from the rhythm pattern memory 1 in FIG. Supplied. When the P/SK conversion circuit 19 takes in the data RD in parallel, it serially outputs the data RD in 11th order bits at a time according to the clock.

The serial data output from the P/E3G conversion circuit 19 is supplied to a 1-bit 16-stage shift register 21 via an OR gate 20, and taken into the shift register 21 by the same clocker. The serial output of this shift register 21 is supplied to the read command terminal RO of the waveform memory 13, and when the output signal of the inverter 22 is a "'1" signal, it is further passed through an AND gate 23 and an OR gate 20 at the j-th order. The signal is supplied to the input terminal of the shift register 21. Therefore, the ``1'' bit output from this shift register 21 is
If the output signal of the inverter 22 is a "1" signal at that point, the shift register 2 is used by the next clock.
It will not be absorbed and lost.

tM- obtained at output terminal 0 of this shift register 21
It is also supplied to the enable terminal EN of the H+* gate 24.

Next, a portion consisting of a gate 24, a shift register 25, and an adder circuit 26 is used to time-divisionally advance the data address in the storage area of each musical instrument sound when each musical instrument sound is generated from the waveform memory 13. belongs to. In this part,
The shift register 25 has the number of words N1-N for each station card TJ.
It is a shift register with enough bits to match the maximum number of beats of 64, and the clock l
Shifts are made according to the order.

The output data D1 of the shift register 25 is supplied to the other input terminal B of the adder circuit 17 and also to one input terminal A of the adder circuit 26. This addition circuit 2
The other input terminal B of the circuit 26 is supplied with data in which only LSE is 1'', so the output data D2 of this adder circuit 26 is obtained by adding the value "1" to the data D1. Become. This data D2 is supplied to the other input terminal B of the comparator 18 and also to the gate 24. This gate 24 becomes an open gate when a "1" signal is supplied to its enable terminal IN, and the data D
2 is supplied to the input cursor of the shift register 25. Therefore, in the part consisting of the gate 24, the shift register 25 and the adder circuit 26, when the 'l' signal is supplied to the enable terminal 1cN of the gate 24, the data D1 output from the shift register 25 has the value rl.
J is added (that is, incremented) and taken into the shift register 25 again, while the data Di output from the shift register 25 while the "0" signal is being supplied to the enable terminal EN of the gate 24 is not lost. and becomes the value "0".

Next, the overall operation of the rhythm tone generator circuit 6 shown in FIG. 2 will be explained below.

First, assume that the performer has set the rhythm volume to the loudest axis. In this case, the volume discrimination circuit 14 outputs the iM number 11'. Now, from the rhythm pattern memory 1 in Fig. 1, the instrument-specific drive data R'D, which makes only the sounds of each instrument, simpal and bass drum, are generated, that is, 16-bit data of "110·τ...01" is obtained. Suppose that it has been read.

In this case, the data RD is taken into the shift register 21 bit by bit +tllJ through the P/S conversion circuit 19, and all the bits (16 bits) are taken into the shift register 21. At this point, the output terminals are arranged in rows l' and b from the output terminal 0 side to the input A terminal l side. Also, at this point, the count output signal .multidot. of the channel counter 15 becomes '0000' (synchronization is achieved in this way).

Therefore, at this point, the value "L4" is read out as data SA from the start address memory 16a, and the value "1" is read out as data RG from the range memory 16b.
N4" is read out. Also, at this point, the processing operations for the current instrument-specific drive data I (one of D) iJ for the instrument-specific drive data RD are all photon, so
All data in each stage of the shift register 25 is rOJ
, and the data D1 is "0". Therefore, at this point, the addition result of the output data D3 of the adder circuit 17, that is, the data SA and the data D1 is ([rL
4J, and this data D3 is supplied to the address input terminal AD of the waveform memory 13 as an address signal. Also, at this time, since the read command terminal RO of this waveform memory 13 is supplied with the "1" signal from the output terminal O of the shift register 21, the data at address L4 of the same memory 13, that is, the 1η range of cymbal #4. The POM data of the eye is starting to emerge.

This POM data is supplied to the accumulator 27. Also, at this point, the output data D of the adder circuit 26
2 is the value "1", the comparator 18 outputs the "0" signal, which is the comparison result between the value "N4" and the value "1", to the output terminal IcQ.
The signal is outputted from and supplied to the inverter 22. Therefore, the output signal of this inverter 22 is an IT III signal. Therefore, at this point, the "1" signal output from the shift register 21 is sent to the AND gate 23.
and the OR gate 20 through the j-order shift register 2
1 input is supplied to the factory. Further, since the "1" signal outputted from the shift register 21 opens the gate 24, the data D2, that is, the value rN, is supplied to the input terminal (2) of the shift register 25.

Now, suppose that the next clock door occurs. In this case, the output confidence of the channel counter 15 is 0001'', so the value "L8" is read out as data SA from the start address memory 16a, and the value "N8" is read out as data RG from the range memory 16b. Also, in this case, since the shift registers 21 and 25 are each shifted by one stage, the contents of the shift register 21 are output Q.
1″, '0″, from the terminal 0 side to the input terminal 1 side.
..., "O"l"l', and from the output terminal 0 side of the shift register 25 to the input agent side [01, ..., "Ol, ``mouth''. That is, in this case, data D1 is "0" and data D3 is "L".
8'' data D2 is ``l'', No. 475 of the output terminal IQ of the comparator 18 is a 60'' signal, the output signal of the shift register 21 is a ``1'' signal, and the input data of the shift register 25 is ``1''.
”. Therefore, in this case, the L of the waveform memory 13 is
Data of 8 plans, that is, P of the first candy of bass drum #4
The OM data is extracted and the 1trJ p c M data is supplied to the accumulator 27 .

Assume that the next clock door occurs. in this case,
Since the output IH of the channel counter 15 is 0010'', the data SA is transferred from the start address memory 16a.
While the value "L12-1" is read out as data RG from the range memory 16b, the value "N12. shift register 21
0) The contents are o' from the output terminal 0 side to the input terminal side.
,..., "0", 'l'°, 1'', and the contents of the shift register 25 are "O" from the output terminal 0 side toward the input terminal j,... ..., "0", f'l
J, rlJ. That is, in this case, the data Di is "
0”, data D3 is “L12”, data D2 is “1”,
The signal of the output terminal FiGl of the comparator 18 is a "0" signal, the output signal of the shift register 21 is "'O" signal, and the input data of the shift register 25 (gorOJ). Therefore, in this case, the address of the waveform memory 13 is Although the value [, 1zJ is supplied to the input terminal AD, since the "O" signal is supplied to the output command terminal RO, the data in the waveform memory 13 is not read out.

Until the count output signal of the shift register 15 reaches 1111'' (since the output signal of the shift register 21 is 0 in any case, the POM of the waveform memory 13
No data is read.

The above is the operation of the 1st scan in the time-division readout process of musical instrument sounds for the current instrument-specific drive data RD described above. In this first scan, the POM of each instrument sound digitally synthesized by the take-cumulator 27
The data, that is, the rhythm sound signal R8G, is supplied to the multiplier 9 shown in FIG. 1 to adjust the volume, and then the D/
After being converted into an analog signal by the A converter 10,
The signal is supplied from the amplifier 11 to the speaker 12, and optical sound is produced.

Next, suppose that the next black puffer occurs following this point. In this case, the output signal of the channel counter 15 becomes "o o o o" again, so data "L4" is transferred from the start address memory 162L as data SA.
is read out, and data RG is read out from the range memory 16b.
Data "Nh" is read out as follows. Also in this case,
The contents of the shift register 21 are changed from the output terminal O side to the input terminal 1, and then the contents of the shift register 25 are changed from the output terminal O side to the input terminal 1. ,...
..., becomes "0". That is, in this case, data D1 is "1", data D3 is "L4+1", and data 1)2 is "
2'', the signal at the output terminal EQ of the comparator 18 is 1''0'', the output signal of the shift register 21 is I'1'', and the input data of the signal register 25 is r2J. Therefore, in this case, the waveform memory 13 The data at address (L4+1) of
That is, the second POM data of cymbal #4 is read out.

And, as mentioned above, when the next black puffer occurs! kl
Jf+: In the same way as (I, 8 +
1) The origin data 1, the second POM data of bass drum #4, are read out, and the following jll! Data is not read from the waveform memory 13 while the i-th clock is generated and the count output m of the channel counter 15 changes from "0010" to "1111".

The above is the second scan operation in the time-division readout process of each musical instrument sound for the data HD.

Similarly, every time the data other than "0" in each stage of the shift register 25 is shifted by 16 stages (every scan), it is incremented, thereby causing the 3 The POM data after the @th one are read out sequentially.

Now, suppose that the N4th scan operation has started (
However, Nh (assumed to be N8). In this case, when the channel counter 15 outputs a signal of 0000'', the start address memory 16a outputs the data SA as ``L''.
4" is read out, and the value "Nh" is also read out from the range memory 16b as data RG. Also in this case,
The contents of the shift register 21 are 1", 1", 10", etc. from the output terminal 0 side to the input terminal 1 side.
'0'' and the contents of the shift register 25 are output y.
From Mengo 09114 to input terminal A1IIJ,
h-1", "Nh-IJ, "0", ..., "0
”. Therefore, in this case, the data Di is “
u4-1", data D2 is "Nh", output terminal of comparator 18]1iQ signal is data RG and data D2 are both I
Since it is tlkrN4J, the l” signal, shift register 2
The output number of 1 is "l" signal, and the same shift register i1/2
1 human power signal is o” because AND gate 23 closes.
The input data of the shift register 25 is (m"
It becomes N A J. L7 Therefore, in this case, the data at address (T, A+NA-1) of the waveform memory 13, that is, the N4th word FOM data (M end data) of cymbal #4 is read out.

Then, when the next clock pulse occurs, the contents of the shift register 21 are transferred from the output terminal o (II!+ to the input terminal 11
``1'', 0'', . It disappears.

Furthermore, when the N8th scan operation is performed, the 1'' bit corresponding to the bass drum in the shift register 21 is set to f in the same manner as the N4th scan operation.
The POM data of the bass drum 4L4 is no longer read out after that.

As described above, the current instrument-specific drive data R
Time-division readout of musical instrument sounds for D is performed. The readout operation described above is based on the following instrument-specific drive data R.
Everything is completed by the time D is supplied. In addition, when the above-mentioned instrument-specific drive data RD is supplied, if the rhythm lid is set to the most difficult state, cymbal #
1 and bass drum #l will be read out.

However, according to this embodiment, the pitch, timbre, envelope, etc. of each instrument sound in the rhythm sound that is played can be changed in four stages according to the rhythm volume, and this makes it possible to change the pitch, timbre, envelope, etc. You can get close performance effects. In this embodiment, the sounds of each musical instrument in the rhythm sound and the rhythm sound source circuit 6 of the continuous wave memory type are used. It may be configured with a conventional rhythm sound circuit using circuits, opening/closing circuits, and the like. In addition, the rhythm selection signal gRSL is supplied to the volume discrimination circuit 14 in this actual bIM example as shown by the broken arrow in FIG. It may be changed.

As is clear from the above explanation, according to the automatic rhythm performance klR according to the present invention, when the rhythm sound source circuit is driven by the rhythm pattern read from the rhythm pattern (turn memory) to generate the instrument sound No. 1g of each rhythm instrument, Since this instrument sound signal is changed according to the rhythm volume by the rhythm sound control means, the pitch, timbre, envelope, etc. of each instrument sound in the rhythm sound can be changed according to the rhythm volume. Automatic rhythm performance can be performed using instrument sounds that are extremely close to actual rhythm performance.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of an embodiment of an automatic rhythm playing device according to the present invention, FIG. 2 is a block diagram showing the detailed configuration of the rhythm sound source circuit 6 in the same embodiment, and FIG. 3 is the same embodiment. Notes of the waveform memory 13 in t, *
It is a figure showing h valley. 1 ゛"-rhythm pattern memory, 2. °゛°-rhythm selection switch, 4 '-°" tempo control circuit (tempo control data generator), 6-----°! J rhythm sound source circuit,
7...Controller for adjusting sound 1, 8...Living control data % generator, 13...Waveform memory, 14...
... 1st 1 path by sound M publication, 15-°-channel counter, 16-°-address memory. Applicant: Nippon Musical Instruments Manufacturing Co., Ltd. Figure 3 Unoharu (1) ■ ■ ■; Maracas (16) 625-

Claims (2)

[Claims] (1) Rhythm selection switch, tempo control circuit for controlling rhythm tempo, and each rhythm nomi turn are recorded.8
a rhythm pattern memory that is biased by .degree., and a rhythm that generates a rhythm sound signal in accordance with a rhythm pattern read out from the rhythm pattern memory based on the output of the rhythm selection switch and the control output of the tempo control circuit; An automatic rhythm equipped with a sound source circuit? J! # The apparatus is provided with a rhythm f control means for changing the rhythm sound signal generated by the rhythm sound source circuit based on the rhythm volume control signal, so that each Φ instrument sound constituting the rhythm sound changes according to the rhythm volume. An automatic rhythm performance device characterized by: (2) The rhythm sound 0 circuit is configured by storing a plurality of instrument sound signals for each instrument specified by the rhythm pattern, and the rhythm sound control means is configured to store a plurality of instrument sound signals for each instrument specified by the rhythm pattern, and the rhythm sound control means is configured to store a plurality of instrument sound signals for each instrument specified by the rhythm pattern, and the rhythm sound control means Item 1 of the scope of the patent application is characterized in that the storage area of the musical instrument sound signal according to the rhythm tone control signal is specified for each musical instrument from the storage area of the musical instrument sound signal of The automatic rhythm playing device described.