JPS5996918U - High frequency amplifier circuit - Google Patents

High frequency amplifier circuit

Info

Publication number
JPS5996918U
JPS5996918U JP19169982U JP19169982U JPS5996918U JP S5996918 U JPS5996918 U JP S5996918U JP 19169982 U JP19169982 U JP 19169982U JP 19169982 U JP19169982 U JP 19169982U JP S5996918 U JPS5996918 U JP S5996918U
Authority
JP
Japan
Prior art keywords
high frequency
amplifier circuit
frequency amplifier
gate
agc voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19169982U
Other languages
Japanese (ja)
Inventor
正幸 鈴木
Original Assignee
株式会社富士通ゼネラル
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社富士通ゼネラル filed Critical 株式会社富士通ゼネラル
Priority to JP19169982U priority Critical patent/JPS5996918U/en
Publication of JPS5996918U publication Critical patent/JPS5996918U/en
Pending legal-status Critical Current

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  • Amplifiers (AREA)
  • Control Of Amplification And Gain Control (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の高周波増幅回路の回路図、第72図はデ
ュアル・ゲートのMOS、FETのVCl、に対する順
伝達アドミッタンスの特性図、第3図は本考案の一実施
例の高周波増幅回路の回路図、第4図は第3図の回路の
■。1.に対する電力利得特性    。 図、第5図はAGC電圧に対する電力利得特性図である
Figure 1 is a circuit diagram of a conventional high frequency amplifier circuit, Figure 72 is a characteristic diagram of forward transfer admittance for dual gate MOS and FET VCl, and Figure 3 is a diagram of a high frequency amplifier circuit according to an embodiment of the present invention. Circuit diagram, Figure 4 is the circuit shown in Figure 3. 1. Power gain characteristics for . FIG. 5 is a power gain characteristic diagram with respect to AGC voltage.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] デュアル・ゲートのFETの第1ゲートに入力、   
信号が、第2ゲートにAGC電圧が印加されるよう構成
された高周波増幅回路において、上記第1ゲートの電位
が上記AGC電圧により変化するようにしたことを特徴
とする高周波増幅回路。
Input to the first gate of the dual gate FET,
1. A high frequency amplification circuit configured such that a signal is applied to a second gate of an AGC voltage, wherein the potential of the first gate is changed by the AGC voltage.
JP19169982U 1982-12-18 1982-12-18 High frequency amplifier circuit Pending JPS5996918U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19169982U JPS5996918U (en) 1982-12-18 1982-12-18 High frequency amplifier circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19169982U JPS5996918U (en) 1982-12-18 1982-12-18 High frequency amplifier circuit

Publications (1)

Publication Number Publication Date
JPS5996918U true JPS5996918U (en) 1984-06-30

Family

ID=30412738

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19169982U Pending JPS5996918U (en) 1982-12-18 1982-12-18 High frequency amplifier circuit

Country Status (1)

Country Link
JP (1) JPS5996918U (en)

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