JPS5996741A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS5996741A
JPS5996741A JP20736182A JP20736182A JPS5996741A JP S5996741 A JPS5996741 A JP S5996741A JP 20736182 A JP20736182 A JP 20736182A JP 20736182 A JP20736182 A JP 20736182A JP S5996741 A JPS5996741 A JP S5996741A
Authority
JP
Japan
Prior art keywords
semiconductor pellet
pellet
solder
semiconductor
magnetic field
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP20736182A
Other languages
Japanese (ja)
Inventor
Shiyougo Kondou
近藤　松悟
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Home Electronics Ltd
NEC Corp
Original Assignee
NEC Home Electronics Ltd
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Home Electronics Ltd, Nippon Electric Co Ltd filed Critical NEC Home Electronics Ltd
Priority to JP20736182A priority Critical patent/JPS5996741A/en
Publication of JPS5996741A publication Critical patent/JPS5996741A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/75—Apparatus for connecting with bump connectors or layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8312—Aligning
    • H01L2224/83121—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06—Polymers
    • H01L2924/078—Adhesive characteristics other than chemical
    • H01L2924/07802—Adhesive characteristics other than chemical not being an ohmic electrical conductor

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Die Bonding (AREA)

Abstract

PURPOSE:To improve the yield and reliability of semiconductor pellet by a method wherein a semiconductor pellet mounted on molten solder is lifted up to the even level of solder thickness by the action of external magnetic field to be cooled down as it is. CONSTITUTION:When a semiconductor pellet 2 containing magnetic metal in the backside electrode layer 2' thereof comes below a magnet 4 as if it is mounted on a molten solder 3, the pellet 2 is supplied with the magnetic field H generated by a magnet 4. The power of the supplied magnetic field H is sufficient to attract the magnet layer 2' of the semiconductor pellet 2 and lift the pellet 2 a bit not to separate it from the molten solder 3'. At this time, even if the semiconductor pellet 2 is tilted a little, any creeping molten solder 3' lifted by the magnetic field H is absorbed underneath the lifted semiconductor pellet 2 to make the solder thickness below the semiconductor pellet 2 even. When the entire semiconductor pellet 2 is cooled down to solidify the solder 3, the pellet 2 may be fixed in parallel with a metallic substrate 1.

Description

【発明の詳細な説明】 技術分野 この発明は半導体ペレットマウント工程における製造方
法に関する。DETAILED DESCRIPTION OF THE INVENTION Technical Field The present invention relates to a manufacturing method in a semiconductor pellet mounting process.

背景技術 一般に、放熱板等の金属基板上への半導体ペレットのマ
ウントは予め加熱された金属基板上に定量の半田を供給
して金属基板の熱で溶かし、次にこの溶融半田上に半導
体ペレットを供給してから全体を冷却する過程で行われ
る。このようなペレットマウントにおいて金属基板の予
熱温度や金属基板上に供給された半田の量、或は金属基
板上の溶融半田に加わる半導体ペレットρ加重などの種
々のマウント条件に変化が生じると、例えば第１図に示
すように金属基板（１１上にマウントされた半導体ペレ
ット（２）下の半田（３）の厚さにバラツキが生じて半
導体ペレット（２）が傾くことがある。このように半導
体ペレット（２）が傾いてマウントされると半導体ペレ
ット（２）の熱放散性が半田厚のバラツキによって悪く
なり、また半田（３）は半導体ペレット（２）と金属基
板＋ｔｉの熱膨張係数の差により半導体ペレット（２）
に加わる発熱−冷却の繰り返し時の応力を吸収するアブ
ソーバ効果を有するが、半田厚にバラツキがあるとアブ
ソーバ効果が薄れ、寿命を短くすることがある。BACKGROUND ART Generally, semiconductor pellets are mounted on a metal substrate such as a heat sink by supplying a certain amount of solder onto a preheated metal substrate, melting it with the heat of the metal substrate, and then placing the semiconductor pellet on top of the molten solder. This is done in the process of cooling the whole thing after supplying it. In such pellet mounting, if various mounting conditions such as the preheating temperature of the metal substrate, the amount of solder supplied onto the metal substrate, or the semiconductor pellet ρ load applied to the molten solder on the metal substrate change, for example, As shown in Figure 1, the thickness of the solder (3) under the semiconductor pellet (2) mounted on the metal substrate (11) may vary, causing the semiconductor pellet (2) to tilt. If the pellet (2) is mounted at an angle, the heat dissipation of the semiconductor pellet (2) will deteriorate due to variations in the solder thickness, and the solder (3) will be affected by the difference in thermal expansion coefficient between the semiconductor pellet (2) and the metal substrate +ti. Semiconductor pellets (2)
It has an absorber effect that absorbs the stress caused by repeated heat generation and cooling, but if there are variations in solder thickness, the absorber effect weakens and the lifespan may be shortened.

そこで従来はペレットマウント工程で連続してマウント
されて送られてくる半導体ペレットの傾きを選択的に検
査して、傾きが許容範囲内にあればペレットマウント動
作を続行させ、傾きが許容範囲を超える大きさになって
いるとベレットマウント動作を中断させて原因を調べ、
傾きが小さくなるようマウント条件を正常に戻してから
ベレットマウント動作を続行させたりしている。しかし
、半導体ペレットの傾きは半田の熱抵抗を測定して半田
厚を算出する方法などで検査されているが、正確な傾き
を知ることが非常に困難であるがため、傾きが大きくて
不良品に近いものが製品化される可能性が大きく、これ
によって半導体装置の信頼性が損なわれることがあった
。Therefore, conventionally, in the pellet mounting process, the inclination of the semiconductor pellets that are continuously mounted and sent is selectively inspected, and if the inclination is within the allowable range, the pellet mounting operation is continued, and if the inclination exceeds the allowable range. If the size is too large, interrupt the bullet mount operation and investigate the cause.
The mount conditions are returned to normal so that the tilt becomes smaller, and then the bullet mount operation is continued. However, although the inclination of semiconductor pellets is tested by measuring the thermal resistance of the solder and calculating the solder thickness, it is very difficult to know the exact inclination, so products with large inclinations are rejected. There is a high possibility that something similar to the above will be commercialized, and this may impair the reliability of the semiconductor device.

発明の開示 本発明は上記問題点に鑑みてなされたもので、半導体ペ
レットのマウント時で半田が溶融状態にある時に半導体
ペレットの姿勢を修正する工程を加えた半導体装置製造
方法を提供する。DISCLOSURE OF THE INVENTION The present invention has been made in view of the above-mentioned problems, and provides a semiconductor device manufacturing method that includes a step of correcting the posture of a semiconductor pellet when the solder is in a molten state when mounting the semiconductor pellet.

本発明は半導体ペレットに磁性体が含まれていることを
前提にしたもので、この磁性体を有する半導体ペレット
が金属基板上の溶融半田上に塔載されている時に半導体
ペレットに外部から磁界を作用させて半導体ペレットを
その下の半田厚が均一化する高さまで引き上げ、その状
態を保持して溶融半田を冷却して硬化させること全特徴
とする。半導体ペレットを引き上げる磁界は半導体ペレ
ットの上方に配置した電磁石などで発生させる。また半
導体ペレットが磁界で必要以上の高さまで引き上げられ
るのを防止する工夫として、半導体ペレットの上方定位
置に排磁性体のストッパーを配備することも可能である
。このように半導体ペレットの姿勢修正をペレットマウ
ント工程で行うことにょシ、半導体装置の良品率、信頼
性が大幅に向上する。The present invention is based on the premise that the semiconductor pellet contains a magnetic material, and when the semiconductor pellet containing the magnetic material is mounted on molten solder on a metal substrate, a magnetic field is applied to the semiconductor pellet from the outside. The entire feature is that the semiconductor pellet is raised to a height where the thickness of the solder underneath becomes uniform, and the molten solder is cooled and hardened while maintaining this state. The magnetic field that pulls up the semiconductor pellet is generated by an electromagnet placed above the semiconductor pellet. Furthermore, as a measure to prevent the semiconductor pellet from being pulled up to an unnecessarily high height by the magnetic field, it is also possible to provide a stopper made of magnetically expelling material at a fixed position above the semiconductor pellet. By correcting the posture of the semiconductor pellet in the pellet mounting process in this way, the yield rate and reliability of semiconductor devices are greatly improved.

発明を実施するだめの最良の形態 第２図及び第８図に本発明の一実施装置例を示すと、こ
れは金属基板（１＋上に半田（３）でマウントされた半
導体ペレット（２）の上方定位置に磁界発生手段として
の電磁石（４）を配置したものである。半導体ペレット
（２）はトランジスタやＩＣなどの半導体ペレットであ
って、通常その裏面にはオーミック性を良くする目的で
ニッケルなどの磁性金属を含む複数の金属を蒸着で多層
に被着形成した電極層（２′）がある。そこで電磁石（
４）の下方に裏面電極層前に磁性金属を含む半導体ペレ
ット（２）が溶融状態の半田（３）上に塔載された状態
でくると電磁石（４）に通電して発生する磁界Ｈを半導
体ペレット（２）に付与する。この磁界Ｈは半導体ペレ
ット（２）をその裏面電極層（２）の磁性金属層を上方
に吸引する方向で付与され、且つ半導体ペレット（２）
が溶融半田（３′）から離れない程度まで少し引き上げ
る強さで付与される。すると半導体ペレット（２）が仮
りに第２図に示すように傾いていても、これを磁界Ｈで
少し持ち上げると第８図に示す如く半導体ペレット（２
）から食み出していた溶融半田（３）が上昇した半導体
ペレット（２）の下に吸い込まれ、これにより半導体ペ
レット（２）下の半田厚が均一化する。後は第８図の状
態を保持させて全体を冷却させて半田（３）を固化させ
れば半導体ペレット（２）は金属基板［１１と平行な修
正された姿勢で固定される。DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 2 and FIG. 8 show an example of an apparatus for carrying out the present invention. An electromagnet (4) as a magnetic field generating means is placed at a fixed position above.The semiconductor pellet (2) is a semiconductor pellet for transistors, ICs, etc., and usually has nickel coated on its back surface for the purpose of improving ohmic properties. There is an electrode layer (2') formed by depositing multiple metals, including magnetic metals, in multiple layers by vapor deposition.
4) When the semiconductor pellet (2) containing a magnetic metal is placed on the molten solder (3) below the back electrode layer, the electromagnet (4) is energized to generate a magnetic field H. Apply to semiconductor pellets (2). This magnetic field H is applied to the semiconductor pellet (2) in a direction that attracts the magnetic metal layer of the back electrode layer (2) upward, and the semiconductor pellet (2)
is applied with a strength that slightly lifts the solder (3') to the extent that it does not separate from the molten solder (3'). Then, even if the semiconductor pellet (2) is tilted as shown in Fig. 2, if it is slightly lifted by the magnetic field H, the semiconductor pellet (2) will be tilted as shown in Fig. 8.
) The molten solder (3) that had protruded from the semiconductor pellet (2) is sucked under the elevated semiconductor pellet (2), thereby making the solder thickness under the semiconductor pellet (2) uniform. After that, if the state shown in FIG. 8 is maintained and the whole is cooled and the solder (3) is solidified, the semiconductor pellet (2) is fixed in the corrected posture parallel to the metal substrate [11].

第４図及び第５図は上記電磁石（４）と半導体ペレット
（２）の間の定位置にアルミニウム板などの非磁性スト
ッパー（５）を配置した実施装置例を示す。この場合は
電磁石（４）で半導体ベレツ）（２１を各トラパー（５
）に当る位置寸で吸引してそのまま冷却して固定化する
もので、ストッパー（５）を半導体ペレット（２）が正
常な位置で止まる高さに設定しておくことにより、安定
したペレット姿勢修正動作が実行される。FIGS. 4 and 5 show an example of an embodiment in which a non-magnetic stopper (5) such as an aluminum plate is placed at a fixed position between the electromagnet (4) and the semiconductor pellet (2). In this case, the electromagnet (4) is used to connect the semiconductor bezel (21) to each trapper (5).
), and then cools and fixes the pellet. By setting the stopper (5) at a height where the semiconductor pellet (2) stops at the normal position, stable pellet posture can be corrected. Action is performed.

尚、半導体ペレットには裏面電極層に磁性金属層を含ま
ないものもあるが、このような半導体ペレットに対して
は例えばその表面の特性上問題のない周辺部に磁性金属
層を塗布や埋め込み等の手段で予め形成しておけば本発
明の適用が可能となる。Note that some semiconductor pellets do not include a magnetic metal layer on the back electrode layer, but for such semiconductor pellets, a magnetic metal layer may be coated or embedded in the peripheral area where there is no problem with the surface characteristics. The present invention can be applied if it is formed in advance by the method described above.

また溶融半田上の半導体ペレットを持ち上げる磁界は永
久磁石の磁界を用いることも可能であり、更に電磁石や
永久磁石の磁界発生手段を上下動させて半導体ペレット
を適宜持ち上げることや、半導体ペレットの両端を交互
に吸引する磁界を付与してから全体を均一に吸引する磁
界を付与する等の工夫も可能である。It is also possible to use the magnetic field of a permanent magnet to lift the semiconductor pellet on the molten solder, and it is also possible to lift the semiconductor pellet appropriately by moving the electromagnet or permanent magnet magnetic field generating means up and down, or to lift the semiconductor pellet at both ends. It is also possible to apply a magnetic field that attracts alternately and then apply a magnetic field that uniformly attracts the entire area.

【図面の簡単な説明】[Brief explanation of drawings]

第１図は半導体装置の部分断面図、第２図及び第３図は
本発明の一実施装置例を示す各動作時での側断面図、第
４図及び第５図は本発明の他の実施装置例を示す各動作
時での側断面図である。 ＋１）・・・金属基板、　（２）・・・半導体ペレット
、（３）・・・半田、　（４）・・・（磁界発生手段）
。FIG. 1 is a partial sectional view of a semiconductor device, FIGS. 2 and 3 are side sectional views showing an example of a device implementing the present invention during each operation, and FIGS. FIG. 3 is a side sectional view showing an example of the implementation device during each operation. +1)...Metal substrate, (2)...Semiconductor pellet, (3)...Solder, (4)...(Magnetic field generating means)
.

Claims (1)

【特許請求の範囲】[Claims] ｆｉ＋　　磁性体を有する半導体ペレットを金属基板上
に半田でマウントする工程において、溶融状態にある半
田上に塔載された半導体ペレツ゛トを外部からの磁界の
作用で゛半導体ベレ７）下の半田厚が均一化する高さま
で引き上げた後その状態を保持して半田冷却させる工程
を加えたことを特徴とする半導体装置の製造方法。fi+ In the process of mounting a semiconductor pellet having a magnetic substance on a metal substrate with solder, the thickness of the solder under the ``semiconductor plate 7'' is reduced by the action of an external magnetic field on the semiconductor pellet mounted on the molten solder. A method for manufacturing a semiconductor device, comprising the step of raising the solder to a uniform height and then cooling the solder while maintaining that state.
JP20736182A 1982-11-25 1982-11-25 Manufacture of semiconductor device Pending JPS5996741A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20736182A JPS5996741A (en) 1982-11-25 1982-11-25 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20736182A JPS5996741A (en) 1982-11-25 1982-11-25 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5996741A true JPS5996741A (en) 1984-06-04

Family

ID=16538455

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20736182A Pending JPS5996741A (en) 1982-11-25 1982-11-25 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5996741A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004109792A1 (en) * 2003-06-04 2004-12-16 Infineon Technologies Ag Electronic component as well as semiconductor wafer and component support for the production of said component

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004109792A1 (en) * 2003-06-04 2004-12-16 Infineon Technologies Ag Electronic component as well as semiconductor wafer and component support for the production of said component
US7397111B2 (en) 2003-06-04 2008-07-08 Infineon Technologies, Ag Semiconductor wafer, an electronic component, and a component carrier for producing the electronic component

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