JPS599463Y2 - Sawtooth wave generation circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a sawtooth wave generating circuit used in a vertical deflection circuit of a television receiver.

A multi-vibration system is being considered for the vertical deflection circuit of a television receiver.

An example of this circuit is shown in FIG. 1, and its operation will be explained with reference to FIGS. 2, 3, and 4.

That is, in FIG. 1, Q1 is a switching transistor, Q2 is a sawtooth wave power amplification transistor, and C
1 and C2 are integrating capacitors for generating sawtooth waves, C3 is a coupling capacitor whose one end is connected to the collector of transistor Q2, L1 is a choke coil for blocking AC components, and L2 is a deflection yoke.

Also, R1 is the base bias resistance of transistor Q1, R
2 is a charging resistor that connects the DC power supply EB to the capacitor C1,
Charge C2.

Further, R3 is an emitter resistance of the transistor Q2, and R4 is a resistance inserted on the ground side of the capacitor C2 to improve the linearity of the sawtooth wave.

Terminal a is a vertical synchronization signal input terminal.

According to this circuit, the oscillation operation when no synchronizing signal is applied is performed by a multivibrator circuit composed of transistors Q1 and Q2.

Now, considering the case where the transistor Q1 becomes conductive, the transistor Q2 is cut off due to the potential drop of the resistor R2, and the potential across the deflection yoke L2 increases.

This waveform is divided by resistors R5 and R6 and fed back to the base of transistor Q1 through capacitor C4.

As shown in FIG. 2, the waveform passing through the capacitor C4 is a differentiated waveform at both ends of the deflection yoke L2.

Due to this lowered voltage at the trailing edge, the transistor Q1 moves from the saturation region to the active region, the collector voltage of the transistor Q1 increases, the feedback voltage rapidly decreases, and the I transistor Q1 sharply cuts off.

In such an operation, the on-level of the transistor Q1 becomes a negative potential of the capacitor C2 by the difference between the DC bias supplied to the base by the resistors R1 and R2 and the feedback pulse supplied by the resistors R5 and R6. Determined by the amount of charge.

Since the oscillation period changes depending on the on-level of transistor Q1, it is thought that the period changes depending on the amount of feedback determined by the resistors R5 and R6, the charging/discharging time constant of capacitor C4, and the DC bias voltage at the base of transistor Q1. It will be done.

In the vertical deflection circuit, it is necessary to synchronize the oscillation cycle with the vertical synchronization signal, and it is necessary to keep the cycle stable during asynchronous oscillation in order to maintain synchronization characteristics, but in the circuit shown in Figure 1, the amplitude adjustment resistor R2 is controlled. When the amplitude is changed, the degree of increase in the collector voltage of transistor Q1 when transistor Q1 is off changes, and the base voltage of transistor Q1 is changed via bias resistor R1.
The oscillation period changes.

On the other hand, as shown in FIG. 3, when the on period of transistor Q1 changes, the amount of charge charged to capacitor C4 changes, and the timing of applying negative bias to the base of transistor Q1 changes, so the oscillation cycle changes.

Now, the on period of transistor Q1 is Tr, and the deflection yoke L is
The inductance of 2. Ly, resistance Ry, resistance R3
If the value of is RE, the power supply voltage is EB, and the peak-to-peak value of the deflection current flowing through the deflection yoke L2 is ■ypp, then the following equation 1 is obtained.
It can be understood from this that the oscillation period changes when the amplitude is changed.

These states are shown in FIG.

FIG. 4A shows the relationship between amplitude and period that occurs due to the presence of resistor R0, and FIG. 5B shows the relationship between amplitude and period that occurs when the on period of transistor Q1 changes.

If the feedback circuit constants of resistors R5, R6 and capacitor C4 and the values of bias resistor R1 are appropriately selected and there is no need to change them, the period fluctuation due to changing the amplitude will be as shown in Figure 4. Although it can be suppressed slightly by the combination of the characteristics of A and H, due to the synchronization characteristics of the vertical circuit, the values of resistors R1, Rs, R6 and capacitor C4 are arbitrarily selected, and it is very difficult to stabilize the period due to amplitude changes. Become something.

The present invention has been made in consideration of the above points, and its purpose is to provide a sawtooth wave generation circuit that can reduce the influence on the sawtooth wave period when the amplitude of the conetooth wave is adjusted. There is.

Embodiments of the present invention will be described in detail below with reference to FIGS. 5 and 6.

That is, in FIG. 5, 11 is a vertical synchronizing signal input terminal, and this input terminal 11 is connected to the base of a switching transistor 12 and also connected to the collector of this transistor 13 via a resistor 14.

The emitter of this transistor 12 is grounded, and the collector is connected to a power supply terminal EH via a variable resistor 15 for charging.

The power supply terminal EB includes a voltage dividing resistor 16 and a variable resistor 17.
The resistor 16 and the variable resistor 17 are connected to the ground through a resistor 18 in series, and a midpoint between the resistor 16 and the variable resistor 17 is connected to the transistor 12 through a resistor 18.

The collector of the transistor 12 is connected to the transistor 13.
connected to the base.

The base of this transistor 13 is the capacitor 20, 2
1 in series to one terminal of the resistor 23.

The other terminal of this resistor 23 is grounded.

The emitter of the transistor 13 is grounded via an emitter resistor 24, and the collector is connected via a choke coil 25 to the power supply terminal EB.

Further, the collector of the transistor 13 is connected to one electrode of a coupling capacitor 26.

The other electrode of the capacitor 26 is connected to one terminal of the resistor 23 via a deflection yoke 27.

The other electrode of the capacitor 26 is connected to a voltage dividing resistor 28 . 29 in series.

Furthermore, resistance 28. The midpoint of connection 29 is connected to the base of the transistor 12 via a feedback capacitor 30.

The circuit of the present invention is constructed as described above, and its basic operation is almost the same as that of the circuit shown in Figure 1.However, in the circuit of the present invention, the base bias circuit of the switching transistor has two systems: a self-bias circuit and a fixed bias circuit. ing.

As a result, when the amplitude of the sawtooth wave is adjusted, the effect on the sawtooth wave period is reduced.

Next, to briefly explain the operation, the oscillation operation when no synchronizing signal is applied is performed by a multivibrator circuit constituted by transistors 12 and 13.

Now, considering the case where the transistor 12 is conductive, the transistor 13 is cut off due to the potential drop of the variable resistor 15.
The potential across the deflection yoke 27 increases.

This voltage is applied to resistor 28. 29 and fed back to the base of transistor 12 through capacitor 30.

The waveform passing through the capacitor 12 has a form obtained by differentiating the waveform at both ends of the deflection yoke 27, as illustrated in FIG. 2 above.

This lowered voltage at the trailing edge moves transistor 12 from the saturation region to the active region, the collector voltage of transistor 12 increases, the feedback voltage rapidly decreases, and transistor 12 sharply cuts off.

In such an operation, the on level of the transistor 12 is determined by the DC bias supplied to the base by the resistor 14.15, the amount of feedback determined by the resistor 28.29, the charging/discharging time constant of the capacitor 30, and the transistor 12. The period can be changed by the DC bias of the base.

By the way, in the circuit of the present invention, the effect on the oscillation frequency when the sawtooth wave amplitude is adjusted by changing the value of the amplitude adjustment resistor 15 will be described as follows.

That is, when increasing the amplitude, the value of the resistor 15 becomes smaller and the collector voltage of the switching transistor 12 becomes higher.
If the fixed bias circuit consisting of 7.18 is not provided, the potential between the base and emitter of the switching transistor 12 will be increased by the resistor 14.

Then, the on level of the transistor 12 becomes faster and the oscillation period becomes shorter, resulting in the characteristics shown in FIG. 6A.

Furthermore, when the amplitude increases, the on period of the transistor 12 becomes longer, and the oscillation period becomes longer, resulting in the characteristics shown in FIG. 6B.

The characteristics shown in FIGS. 6A and 6B are the resistance 15 and the resistance 28 of the feedback circuit, respectively, which greatly affect the synchronization holding characteristics.
It is very disadvantageous in terms of circuit properties to reduce the fluctuation of the oscillation period, which is determined by the value of the 29 capacitor 30 and occurs when the amplitude is changed, by canceling it out using the characteristics shown in FIG. 6A and B. Difficult to design.

Therefore, in the circuit of the present invention, by providing a fixed bias circuit consisting of resistors 16 and 18 and variable resistor 17 at the base of switching transistor 12, the characteristics shown in FIG. 6A can be relaxed as shown in FIG. 6C. I can do it.

The level of relaxation can be arbitrarily controlled by the values of the resistors 16 and 18, the variable resistor 17, or the base-collector resistor 15.

Therefore, the overall characteristic as shown in FIG. 6D is obtained, and the sawtooth wave period due to the change in the sawtooth wave amplitude is stabilized.

As described above, according to the circuit of the present invention, the change in the sawtooth wave period that occurs when the sawtooth wave amplitude is changed in a sawtooth wave generation circuit using a multi-vibration evening type can be made very small, and this can be used in the production of television receivers, etc. - There is an advantage that the influence on the vertical oscillation frequency can be reduced during vertical amplitude adjustment that occurs during adjustment, and there is no adverse effect on vertical synchronization retention characteristics.

In this way, the present invention uses two base bias circuits for the switching transistor, a self-bias circuit and a fixed bias circuit, to maintain a stable frequency.
It is possible to provide a sawtooth wave generation circuit that has a greater degree of freedom in amplitude adjustment.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing an example of a vertical deflection circuit used in the present invention, FIGS. 2 and 3 are operation signal waveform diagrams shown to explain the operation of the circuit in FIG. 1, and FIG. , Fig. 1 is a characteristic diagram showing the adjustment characteristics of the oscillation frequency and amplitude of the circuit, Fig. 5 is a circuit diagram showing an embodiment of the sawtooth wave generating circuit of the invention, and Fig. 6 is a characteristic diagram showing the oscillation frequency and amplitude adjustment characteristics of the circuit of the invention. FIG. 3 is a characteristic diagram shown to explain amplitude adjustment characteristics. 11... Input terminal, 12.13... Transistor, 14, 16, 18, 23, 24, 28.2
9... Resistor, 15.17... Variable resistor, 20.21... Integrating capacitor for sawtooth wave generation, 25... Choke coil, 27・・・・・・
...Deflection yoke, 30... Container, Eo
...One power supply terminal.

Claims (2)

[Scope of utility model registration request] (1) In a multi-vibration type sawtooth wave generation circuit, a base bias circuit of a switching transistor to which a synchronizing signal is applied is replaced by a self-bias circuit consisting of a resistor provided between the base and one controlled electrode, and a self-bias circuit consisting of a resistor provided between the base and one controlled electrode. 1. A sawtooth wave generation circuit characterized by having two systems: a fixed bias circuit provided between a power source and a power supply and biased through a resistor. (2) The sawtooth wave generating circuit according to claim 1, wherein the fixed bias circuit has a variable resistor for varying the bias.