JPS5992869U - electronic circuit equipment - Google Patents
electronic circuit equipmentInfo
- Publication number
- JPS5992869U JPS5992869U JP18925682U JP18925682U JPS5992869U JP S5992869 U JPS5992869 U JP S5992869U JP 18925682 U JP18925682 U JP 18925682U JP 18925682 U JP18925682 U JP 18925682U JP S5992869 U JPS5992869 U JP S5992869U
- Authority
- JP
- Japan
- Prior art keywords
- electronic circuit
- conductive pattern
- mounting holes
- mounting
- circuit equipment
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Tests Of Electronic Circuits (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は本考案の一実施例を示す分解斜視図、第2図は
同実施例のブロック線図である。
図面中、1はプリント基板(絶縁基板)、2及び3は第
1及び第2の取付孔、4は導体パターン、5は直流電源
、6はcpu(電子回路)、7乃至9は導体パターン、
10は抵抗器、11はケース、14及び15は取付ねじ
を示す。FIG. 1 is an exploded perspective view showing an embodiment of the present invention, and FIG. 2 is a block diagram of the same embodiment. In the drawing, 1 is a printed circuit board (insulating board), 2 and 3 are first and second mounting holes, 4 is a conductor pattern, 5 is a DC power supply, 6 is a CPU (electronic circuit), 7 to 9 are conductor patterns,
10 is a resistor, 11 is a case, and 14 and 15 are mounting screws.
Claims (1)
取付孔を有しこれらの取付孔の内の一つたる第1の取付
孔が導体パターンを介して直流電源の負端子に接続され
た絶縁基板と、この絶縁基板の導体パターンに接続され
チェック端子が導体パターンを介して前記複数個の取付
孔の内の他の一つたる第2の取付孔に接続された電子回
路と、この電子回路のチェック端子と前記直流電源の正
端子との間に接続された抵抗器と、前記絶縁基板が前記
複数個の取付孔を介して取付ねじにより取付けられる金
属製のケースとを具備してなる電子回路装置。An insulated substrate on which a large number of conductive patterns are formed and a plurality of mounting holes, one of which is a first mounting hole, is connected to a negative terminal of a DC power supply via the conductive pattern. and an electronic circuit connected to the conductive pattern of the insulating substrate and having a check terminal connected to a second mounting hole, which is another one of the plurality of mounting holes, via the conductive pattern; An electronic circuit comprising: a resistor connected between a check terminal and a positive terminal of the DC power supply; and a metal case to which the insulating substrate is mounted with mounting screws through the plurality of mounting holes. Device.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18925682U JPS5992869U (en) | 1982-12-15 | 1982-12-15 | electronic circuit equipment |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18925682U JPS5992869U (en) | 1982-12-15 | 1982-12-15 | electronic circuit equipment |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5992869U true JPS5992869U (en) | 1984-06-23 |
JPS6222854Y2 JPS6222854Y2 (en) | 1987-06-10 |
Family
ID=30408082
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP18925682U Granted JPS5992869U (en) | 1982-12-15 | 1982-12-15 | electronic circuit equipment |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5992869U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI818976B (en) * | 2019-04-12 | 2023-10-21 | 博計電子股份有限公司 | Low voltage drop electronic load connections |
-
1982
- 1982-12-15 JP JP18925682U patent/JPS5992869U/en active Granted
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI818976B (en) * | 2019-04-12 | 2023-10-21 | 博計電子股份有限公司 | Low voltage drop electronic load connections |
Also Published As
Publication number | Publication date |
---|---|
JPS6222854Y2 (en) | 1987-06-10 |
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