JPS5992692A - Carrier signal generating circuit - Google Patents

Carrier signal generating circuit

Info

Publication number
JPS5992692A
JPS5992692A JP20192182A JP20192182A JPS5992692A JP S5992692 A JPS5992692 A JP S5992692A JP 20192182 A JP20192182 A JP 20192182A JP 20192182 A JP20192182 A JP 20192182A JP S5992692 A JPS5992692 A JP S5992692A
Authority
JP
Japan
Prior art keywords
signal
circuit
frequency
output
fsc
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP20192182A
Other languages
Japanese (ja)
Other versions
JPH0133079B2 (en
Inventor
Mitsuru Kudo
満 工藤
Himio Nakagawa
一三夫 中川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP20192182A priority Critical patent/JPS5992692A/en
Publication of JPS5992692A publication Critical patent/JPS5992692A/en
Publication of JPH0133079B2 publication Critical patent/JPH0133079B2/ja
Granted legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N9/00Details of colour television systems
    • H04N9/79Processing of colour television signals in connection with recording
    • H04N9/80Transformation of the television signal for recording, e.g. modulation, frequency changing; Inverse transformation for playback
    • H04N9/82Transformation of the television signal for recording, e.g. modulation, frequency changing; Inverse transformation for playback the individual colour picture signal components being recorded simultaneously only
    • H04N9/83Transformation of the television signal for recording, e.g. modulation, frequency changing; Inverse transformation for playback the individual colour picture signal components being recorded simultaneously only the recorded chrominance signal occupying a frequency band under the frequency band of the recorded brightness signal
    • H04N9/84Transformation of the television signal for recording, e.g. modulation, frequency changing; Inverse transformation for playback the individual colour picture signal components being recorded simultaneously only the recorded chrominance signal occupying a frequency band under the frequency band of the recorded brightness signal the recorded signal showing a feature, which is different in adjacent track parts, e.g. different phase or frequency

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)

Abstract

PURPOSE:To eliminate the need for an expensive filter and to improve performance by operating a limiter so that a signal of fSC(chrominance subcarrier frequency) with a 90 deg. phase shift is increased in amplitude equivalently and sufficiently and a dynamic range is not deficient. CONSTITUTION:A signal of 160fH (horizontal scanning frequency) outputted by a VCO1 is frequency-divided by a 1/4 frequency dividing circuit 2 to output four 90 deg.phase shift 40fH signals to a phase selecting circuit 3. Those signals are switched and outputted at intervals of a horizontal scanning period H by a horizontal synchronizing pulse signal from a terminal 14 and beaten again through D-type FFs 4 and 5 by the 160fH signal. Then, Q outputs of the D-type FFs 4 and 5 have higher-hamonic components reduced through LPFs 6 and 7 and are applied to multipliers 8 and 9. The output of an oscillator 13 which oscillates at a frequency fsc is applied to a limiter circuit 25 through a 90 deg. phase shifting circuit 11 and then supplied to the multipliers 8 and 9. The outputs of the multipliers 8 and 9 are added together and outputted as a carrier signal to an output terminal 15 through a BPF.

Description

【発明の詳細な説明】 〔発明の利用分野〕 本発明は磁気記録再生装置(VTR)の色信゛号の周波
数変換に必要なキャリアを発生するた。
DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention is for generating carriers necessary for frequency conversion of a color signal of a magnetic recording/reproducing apparatus (VTR).

めのキャリア信号発生回路に関するものである。。The present invention relates to a carrier signal generation circuit. .

□〔従来技術〕10 家庭用VT)Lでは、色信号はF’M変調される“輝度
信号周波数帯域より低い周波数の低域周波・数帯に帯域
変換されて記録再生される。この低・域変換された色信
号搬送波周波数が40fH(fH:・水平走査周波数)
となる方式のVTRでは、こ13の帯域変換に必要なキ
ャリア信号は周波数がフ。
□ [Prior Art] 10 In home VT) L, the color signal is F'M modulated and is band-converted to a low frequency band with a frequency lower than the luminance signal frequency band and is recorded and reproduced. The range-converted color signal carrier frequency is 40fH (fH: horizontal scanning frequency)
In the VTR of the following system, the frequency of the carrier signal required for these 13 band conversions is off.

ロマサブキャリア周波数fsc+40fHすなわち、約
Loma subcarrier frequency fsc+40fH, ie approx.

4、21 MHaである。つまり記録時には搬送波周波
4.21 MHa. In other words, the carrier wave frequency when recording.

数がfscの色信号とこのキャリア信号を掛算し、。Multiply the color signal whose number is fsc by this carrier signal.

生じる和と差の周波数成分のうち、差周波数酸、。Among the resulting sum and difference frequency components, the difference frequency acid,.

分をとり出すと、搬送波周波数が40fHの低域変。If you take out the minute, the carrier frequency is a low frequency change of 40fH.

換色信号が得られる。一方、再生時にはこの低“域変換
色信号とキャリア信号を掛算し、やはり。
A color changing signal is obtained. On the other hand, during playback, this low range converted color signal is multiplied by the carrier signal.

差周波成分をとり出すと、もとの搬送波周波数。When the difference frequency component is extracted, it is the original carrier frequency.

であるfscの色信号が再生できるわけである。′上記
のような帯域変換を行なうキャリア信号の”発生回路の
一例としで、キャリア信号発生回路。
This means that the fsc color signal can be reproduced. 'A carrier signal generation circuit is an example of a carrier signal generation circuit that performs band conversion as described above.

がある。第1図にキャリア係号発生回路をVT。There is. Figure 1 shows the carrier coefficient generation circuit.

Rの色信号系に適用したブロック図の一例を示。An example of a block diagram applied to an R color signal system is shown.

す。第1図において1は160fHで発振する第110
の電圧制御形見振器(以下■COと略す)、2゜は十分
周回路、3は信号切換回路、4,5はD・形フIJ ツ
ブフロップ(以下り形F’、F’、と略す)、・6.7
はLPF、8は周波数fscで発振する第・2(7)V
Co、9.10はコンバータ、11は加算器−12は9
0度移相回路、13はBPF114は水平同期。
vinegar. In Figure 1, 1 is the 110th oscillating at 160 fH.
voltage-controlled oscillator (hereinafter abbreviated as ■CO), 2° is a sufficient circuit, 3 is a signal switching circuit, 4 and 5 are D-type F-IJ tube flops (hereinafter abbreviated as F', F') ,・6.7
is the LPF, and 8 is the 2nd (7)th V that oscillates at the frequency fsc.
Co, 9.10 is converter, 11 is adder - 12 is 9
0 degree phase shift circuit, 13 BPF114 is horizontal synchronization.

パルス入力端子、15はキャリア出力端子である。A pulse input terminal, 15 is a carrier output terminal.

キャリア信号発生回路は、2つのコンバータ9.。The carrier signal generation circuit includes two converters 9. .

10を設け、この2つのコンバータに入力する各。10, each input to the two converters.

々の40fH信号の位相差とf8o信号の位相差をそ2
.。
The phase difference between the respective 40fH signals and the phase difference between the f8o signals is
.. .

れぞれ90度にし、2つの出力における和周波数成分を
除去するものである。第1図を説明する。
The angle of each output is 90 degrees, and the sum frequency component in the two outputs is removed. FIG. 1 will be explained.

V、COlの出力である160fHの信号は十分周回路
2でj分周され、90度ずつ位相のずれたOo、90’
、 180’ 、 27o°の位相をもつ40fHの信
号が位相選択回路3に出力される。位相選択回路3は、
゛この4つの40fH信号を入力端子14からの水平開
The 160 fH signal that is the output of V and COl is divided by j in the sufficient frequency circuit 2, and the signal of 160 fH, which is the output of V and COl, is divided by j and outputted with a phase shift of 90 degrees, Oo and 90'.
, 180', and a 40 fH signal having phases of 27 degrees is output to the phase selection circuit 3. The phase selection circuit 3 is
゛These four 40fH signals are horizontally opened from the input terminal 14.

期パルス信号により、水平走査周期(以下Hと゛略す)
毎に切換えて出力し、H毎に90度ずつ位。
The horizontal scanning period (hereinafter abbreviated as H) is determined by the periodic pulse signal.
It is switched and outputted every time, and the output is about 90 degrees every H.

相のずれた40fH信号にする。この40f1(信号は
、′。
Create a 40fH signal with a phase shift. This 40f1 (signal is '.

さらに90度の位相関係が正確に保たれるように。Furthermore, the 90 degree phase relationship is maintained accurately.

D形F、F、4.5で160fH信号番こよりたたき直
される≦この位相推移処理は隣接トラックからのクロス
D type F, F, 4.5, 160fH signal number is re-done from this ≦ This phase shift processing is a cross from an adjacent track.

トーク分を低減するために行なわれる。なおこ。This is done to reduce the amount of talk. Naoko.

の時のD形F、F、45のD入力に入力される。4Qf
HI5信号は、D形F、F、 4のD入力に入力される
信号が常にD形F、F、5のD入力に入力される信号よ
・す90度進んでいる。D形F、F、4.5の各々のQ
出力。
It is input to the D input of the D type F, F, 45 when . 4Qf
In the HI5 signal, the signal input to the D input of the D type F, F, 4 always leads the signal input to the D input of the D type F, F, 5 by 90 degrees. Q of each of D type F, F, 4.5
output.

である40fH信号は一般に矩形波のため40fHの高
The 40fH signal is generally a rectangular wave, so the signal is 40fH high.

調波成分を多く含むのでLPF6.7でこの高2゜・ 
3 ・ 調波成分を低減したのち、コンバータ8,9に。
Since it contains many harmonic components, this height of 2° with LPF6.7
3. After reducing harmonic components, to converters 8 and 9.

それぞれ供給される。さらに周波数fscで発振゛する
発振器13の出力は90度移相回路24に入力さ。
Each is supplied. Further, the output of the oscillator 13 which oscillates at the frequency fsc is input to a 90 degree phase shift circuit 24.

れ、90度移相回路11からコンバータ8,9に、。from the 90 degree phase shift circuit 11 to the converters 8 and 9.

コンバータ9に入力されるfscの信号の位相よ5す9
0度遅れたfscの信号がコンバータ8に入力゛される
。コンバータ8,9に行なわれる周波数。
The phase of the fsc signal input to the converter 9 is
The fsc signal delayed by 0 degrees is input to the converter 8. Frequency applied to converters 8 and 9.

の掛算を式で表わすと次のようになる。   。The multiplication of is expressed as follows.   .

コンバータ8では m1an ’ (2πfsc” −+ ) X n+■
(2g−4of、t + l ”W−−1(、、2πげ
5 (+40f a ) t 十(Xm (2π(、f
8j−4Of、)t・−π)〕 = 7 (−2”げ5゜+4OfH)t−ccm2πげ
5c−40fH)t)  ・コンバータ9では m−2xf8ot X n−2yr*40fHt   
       15−JQFJI2(01152πげ、
、、−)−4Qf、)を十cm 2π(、f8.−40
.f、) t )   。
In converter 8, m1an' (2πfsc” −+ ) X n+■
(2g-4of, t + l ”W--1(,, 2π 5 (+40f a ) t 10(Xm (2π(, f
8j-4Of,)t・-π)] = 7 (-2" 5°+4OfH)t-ccm2π 5c-40fH)t) ・For converter 9, m-2xf8ot X n-2yr*40fHt
15-JQFJI2 (01152πge,
,,-)-4Qf,) is 10 cm 2π(,f8.-40
.. f,) t).

ここでrro、mzはfscの振幅成分n1.n2は4
0fHの振幅成分 このコンバータ8,9の出力を加算器1oで加算。
Here, rro and mz are amplitude components n1. of fsc. n2 is 4
The outputs of the converters 8 and 9, which are amplitude components of 0fH, are added together by an adder 1o.

すると(−fsc +40fH)成分は・ 4 ・ + (m1nl +mzn2 )          
 ・・・・・・(0式。
Then, the (-fsc +40fH) component is ・4 ・+ (m1nl +mzn2)
・・・・・・(Type 0.

(fsc−4OfH)成分は 4 (mtnt −m2n2)        ・・・
・・・(2)式となる出力信号を得ることができる。キ
ャリア5信号発生回路では、この回路をICに集積化す
(fsc-4OfH) component is 4 (mtnt -m2n2)...
...It is possible to obtain an output signal expressed by equation (2). In the carrier 5 signal generation circuit, this circuit is integrated into an IC.

ることにより、ICの最大の長所である素子同。By doing so, the greatest advantage of ICs is the sameness of the elements.

志の比精度が極めて高い(同一形状の抵抗値の゛絶対値
精度で1〜3%以下)ことを利用し、差。
By taking advantage of the fact that the ratio accuracy of the target is extremely high (absolute value accuracy of 1 to 3% or less of the resistance value of the same shape), it is possible to calculate the difference.

成分である( f8o−40fH)成分をなくし、(f
8dO−4OfH)信号のトラップを削除し、コストダ
ウ・ン、性能向上を計るものである。この差周波成・分
が残ること番こより生じる4OfH信号の位相、振・幅
の歪について説明する。
The component (f8o-40fH) is eliminated, and (f
8dO-4OfH) signal traps are removed to reduce costs and improve performance. Distortion in the phase, amplitude, and width of the 4OfH signal caused by the remaining difference frequency components will be explained.

今、キャリア信号に対して位相差ψの色信号15が入力
されたものとすると、以下の式に示され。
Assuming that the color signal 15 having a phase difference ψ with respect to the carrier signal is input, it is expressed by the following equation.

るような形で周波数変換される。The frequency is converted in such a way that

(2)(2π−fsc−t+ψ)・02πCf8c+ 
4Of、) t   。
(2) (2π-fsc-t+ψ)・02πCf8c+
4Of,)t.

+alla(2πf8cmt+ψ) *ays2rrげ
、c+4ofH)t。
+alla(2πf8cmt+ψ) *ays2rr,c+4ofH)t.

十面(2πf8c ” を十ψ)・kcos 2πげ、
。−4of、) t  2゜=+〔C1ys2π((2
f8c+4ofH)t+ψ)−)−co8(2rc *
 4QfH$ t−ψ)〕+4(a2π((2fsc 
−40fH) t+ψ)十■(2π・40fH−t+ψ
)〕     ・・・・・・(3)5(但し、kはキャ
リア(f8o+4ofH)に対す。
Ten faces (2πf8c ” to 1ψ)・kcos 2π,
. -4of,) t 2゜=+[C1ys2π((2
f8c+4ofH)t+ψ)-)-co8(2rc*
4QfH$ t-ψ)]+4(a2π((2fsc
-40fH) t+ψ) 1■(2π・40fH-t+ψ
)] ・・・・・・(3)5 (However, k is for the carrier (f8o+4ofH).

ルスブリアス(f8o−4ofH)のレベル比) 。Level ratio of Rusubrias (f8o-4ofH)).

LPF5で40fH周波数成分だけをとり出すと(3)
When only the 40fH frequency component is extracted with LPF5 (3)
.

式から容易に分るように、次式のようをこなる。As can be easily seen from the equation, the following equation is performed.

+■(2π・40fH@を一ψ)+4−a(2π・40
f1t+ψグl=+■(2πφ4OfH−を−ψ)+)
(2)((2π番40f1、φt−ψ)。
+■(2π・40fH@1ψ)+4−a(2π・40
f1t+ψgl=+■(2πφ4OfH- to -ψ)+)
(2) ((2π number 40f1, φt−ψ).

十2ψ)   ・ =+1(2π・40f1(・を−ψ)+←(2π・40
fH−t−ψ)(9)2ψ”−+ affl (2π*
4of、@を一ψ戸in2ψ=−4−(1+kcm2ψ
)cxs(2π・40fH−t−ψ)1)−+ 映2ψ
5in(2π*40fH”t−ψ)つまり、色信号の位
相(すなわち色相)によ−リ、変換された色信号の振幅
は(1−k)から(1+k)まで、すなわち、本来の振
幅から、±にだけ振幅比が変動する。位相も本来の位相
12ψ) ・ =+1(2π・40f1(・−ψ)+←(2π・40
fH−t−ψ) (9)2ψ”−+ affl (2π*
4of, @ in 2ψ=-4-(1+kcm2ψ
) cxs (2π・40fH−t−ψ)1)−+ ei2ψ
5in (2π*40fH"t-ψ) In other words, depending on the phase of the color signal (i.e. hue), the amplitude of the converted color signal will vary from (1-k) to (1+k), that is, from the original amplitude. , the amplitude ratio changes only in ±.The phase is also the original phase.

ψから±arctank変動する。このように、色消5
号の位相(すなわち色相)により色飽和度2色。
It fluctuates by ±arctank from ψ. In this way, achromatic 5
Two colors of color saturation depending on the phase (i.e. hue) of the number.

相が変化させられてし才う。The phase can be changed.

ところがこの回路を第2四で示す回路で実現。However, this circuit was realized with the circuit shown in Section 24.

する時次の問題を生じる。なおR1−R17は抵゛抗、
C1〜C18はトランジスタ、E1〜E3は10定電圧
源、C1〜C4は容量、17はf8Cの入力。
When doing so, the following problem arises. Note that R1-R17 are resistors,
C1 to C18 are transistors, E1 to E3 are 10 constant voltage sources, C1 to C4 are capacitors, and 17 is an input of f8C.

端、16と18はLPF6.7の出力端である。 。Terminals 16 and 18 are the output terminals of LPF6.7. .

すなわち−fscの90度位相推移回路は抵抗R2゛と
容zc2からなるIC内蔵抵抗と容量で作ら。
That is, the 90 degree phase shift circuit of -fsc is made of the built-in resistor and capacitor of the IC, which consists of resistor R2' and capacitor zc2.

れるLPFの抵抗と容量の両端信号を得ること15によ
り90度位相差を得る。しかし内蔵抵抗と内・蔵容量の
絶対値精度は両者ともほぼ±30%程度・と大きくばら
つく。このため両者の交流インビ。
By obtaining signals at both ends of the resistance and capacitance of the LPF (15), a 90 degree phase difference is obtained. However, the absolute value accuracy of the built-in resistance and built-in capacitance varies widely, approximately ±30%. For this reason, there is an exchange between the two parties.

−ダンスが大きくばらつきfscの90度位相差の。-Dance varies widely due to 90 degree phase difference of fsc.

信号振幅も大きくばらつくことになる。このた。The signal amplitude will also vary greatly. others.

・ 7 ・ め、fscの振幅成分ml、m2が等しくならず(2)
式で。
・ 7 ・ The amplitude components ml and m2 of fsc are not equal (2)
In the ceremony.

求めた( fsc −40fH)成分の+(m1nt 
−m2n2)’が完全にOとはならなくなる。(なおn
lと02は“ディジタル的に作るためほぼnl+n2と
なる) ゛さらに不都合なことに、ICは少量穴品種よ
り5も少品種大量生産の方がコスト面で圧倒的に有。
+(m1nt of the obtained (fsc -40fH) component
-m2n2)' is no longer completely O. (It should be noted that n
1 and 02 are made digitally, so they are approximately nl + n2. ゛Moreover, it is overwhelmingly cheaper to mass produce a small number of ICs than to produce a small number of holes.

利になるため、ICに般用性をもたせるのが−。In order to benefit people, it is important to make ICs more general-purpose.

般的である。この原則に従いキャリア発生回路。Common. Carrier generation circuit according to this principle.

を含む色信号処理ICもNTSC方式及びPA’L方式
にもIC外付は部品を変更するだけで両10方式に対応
できるように工夫されている。NT・SC方式とPAL
方式では−fscの周波数が異な・る。このためfsc
の90度位相推移回路の交流イ・ンピーダンスばらつき
が両方式同程度となる中・間の値となる必要性がある。
The color signal processing IC including the NTSC system and PA'L system has been devised so that it can be compatible with both 10 systems by simply changing the external IC parts. NT/SC system and PAL
The frequency of -fsc is different in each method. For this reason fsc
It is necessary that the alternating current impedance variation of the 90-degree phase shift circuit has an intermediate value that is the same for both types.

このためfscの90+s度位相差のある信号成分m1
とm2のばらつきは大。
Therefore, the signal component m1 with a phase difference of 90+s degree of fsc
The variation in and m2 is large.

きくなり、(f8o−4ofH)成分が充分に消去さ。The (f8o-4ofH) component is sufficiently erased.

れす、色信号の位相と振幅に歪を生じさせ、正。This causes distortion in the phase and amplitude of the color signal and is positive.

しい色が再現できなくなる。Colors cannot be reproduced.

〔発明の目的〕[Purpose of the invention]

・ 8 ・ 本発明の目的は、上記した従来技術の欠点をなくシ、高
価なフィルタを不要にしかつ性能を。
・ 8 ・ The object of the present invention is to eliminate the above-mentioned drawbacks of the prior art, eliminate the need for expensive filters, and improve performance.

向上させたキャリア信号発生装置を提供すること正こめ
る。
It is an object of the present invention to provide an improved carrier signal generator.

〔発明の概要〕              5本発明
は、fBr2信号成分のばらつきをなくす゛ために、f
scの90度位相差のある信号振幅を等。
[Summary of the Invention] 5 The present invention provides fBr2 signal component variation in fBr2 signal components.
etc. Signal amplitude with 90 degree phase difference of sc.

測的に充分に太きくシ、シかもダイナミツフレ。It's thick enough in terms of measurement, and it's probably Dynamitsufure.

ンジが不足しないように、fBt2の90度位相差の。To ensure that there is no shortage of frequency, the phase difference of fBt2 is 90 degrees.

ある信号にリミッタをかけるものである。  10〔発
明の実施例〕 第3図に本発明を実施したキャリア信号発生。
It applies a limiter to a certain signal. 10 [Embodiments of the Invention] FIG. 3 shows carrier signal generation in which the present invention is implemented.

回路の一ブロック図を示す。A block diagram of the circuit is shown.

25はリミッタ回路で90度位相推移回路11の出゛力
にリミッタをかけ、90度位相差のある信号全15掛算
器8,9に出力する。
A limiter circuit 25 applies a limiter to the output of the 90 degree phase shift circuit 11 and outputs a signal with a 90 degree phase difference to all 15 multipliers 8 and 9.

第4図に本発明のリミッタ回路の一実施例を。FIG. 4 shows an embodiment of the limiter circuit of the present invention.

示し説明する。Show and explain.

R18〜R23は抵抗、Q19〜Q26はトランジス。R18 to R23 are resistors, and Q19 to Q26 are transistors.

り、R4は定電圧源である。この場合f8cの9岨変位
相差のある信号は次のようにして作られる。
R4 is a constant voltage source. In this case, a signal with a phase difference of 9 degrees of f8c is generated as follows.

トランジスタQ20のベースには抵抗R2と容量゛C2
の両端信号をベクトル加算した周波数が−fscの信号
URCが入力され、トランジスタQ21 、Q2iのベ
ースには容量C2の両端信号Ucが入力され、トランジ
スタQ23のベースにはバイアス電位の。
A resistor R2 and a capacitor C2 are connected to the base of the transistor Q20.
A signal URC having a frequency of -fsc, which is the vector addition of signals at both ends of the capacitor C2, is inputted to the bases of the transistors Q21 and Q2i, and a signal Uc at both ends of the capacitor C2 is inputted to the base of the transistor Q23.

みが入力される。この時トランジスタQ21のコ。is entered. At this time, the transistor Q21.

レンジには、URC−Uc酸成分なわちUR酸成分信。The microwave contains URC-Uc acid components, that is, UR acid components.

号が、Q22のコレクタには−Uc成分の信号が得゛ら
れる。この両者の信号の位相差が90度となる。
A -Uc component signal is obtained at the collector of Q22. The phase difference between these two signals is 90 degrees.

トランジスタQ21 、 Q22のコレクタに発生する
This occurs at the collectors of transistors Q21 and Q22.

信号の振幅は、各々の差動対に入力される信号。The amplitude of the signal is the signal input to each differential pair.

振幅差に、各々の差動対のエミッタ抵抗とコレ。The amplitude difference is the emitter resistance of each differential pair.

フタの負荷で決まる利得を掛けたものとなる。。It is multiplied by the gain determined by the load on the lid. .

たとえば抵抗R21,22,234こ流れる電流を0.
4 m Al1とし、抵抗R,18,19の抵抗値を1
にΩ、抵抗1(,20・を500Ωとすると、差動対の
利得は約11.7dBとな・す、差動対の信号入力差が
0.2 Vpp程の時、トラ。
For example, the current flowing through resistors R21, 22, and 234 is 0.
4 m Al1, the resistance value of resistor R, 18, 19 is 1
If the resistance 1 (, 20) is 500 Ω, the gain of the differential pair is approximately 11.7 dB.When the signal input difference of the differential pair is approximately 0.2 Vpp, the gain of the differential pair is approximately 11.7 dB.

ンジスタQ21,22のコレクタに発生ずる信号は約。The signal generated at the collectors of transistors Q21 and Q22 is approximately.

0.77Vpp 、 o、aVpp)時Lt t、15
Vppiトナ6o Lカpr1し、実際は差動トランジ
スタ対のリミッタ効果。
0.77Vpp, o, aVpp) at Lt t, 15
Vppi toner 6o L capr1, which is actually the limiter effect of a differential transistor pair.

とトランジスタQ19のエミッタ電位が(E4−’VB
E ) V (VBE:ベース・エミッタ間電圧)と。
and the emitter potential of transistor Q19 is (E4-'VB
E) V (VBE: base-emitter voltage).

上限が制限され、トランジスタQ21 、 Q22のコ
゛レンタにあたるfsc出力端の最低電位も(E45−
VBB −I Xo、4) ■== (E 4−VBE
−0,4) V ’と制限される。このようにダイナミ
ックレンジ。
The upper limit is limited, and the lowest potential of the fsc output terminal, which corresponds to the colentor of transistors Q21 and Q22, is also limited (E45-
VBB -I Xo, 4) ■== (E 4-VBE
-0,4) V'. In this way, the dynamic range.

が0.4V程度しかなく振幅が0.4Vppに制限され
、。
is only about 0.4V, and the amplitude is limited to 0.4Vpp.

リミッタ回路となる。したがって掛算器8,9゜に入力
されるfsc信号は、正弦波の上側と下側IQが制限さ
れた0、4Vppの台形波に近い波形となるbこのよう
な波形の基本波(fsc )成分は、ツー・リエ級数展
開することにより第5図に示すグラ・フとなる。なお信
号振幅A点(0,18Vpp程度)。
It becomes a limiter circuit. Therefore, the fsc signal input to the multipliers 8 and 9 degrees has a waveform close to a trapezoidal wave of 0 and 4 Vpp with limited upper and lower IQs of the sine wave.The fundamental wave (fsc) component of such a waveform becomes the graph shown in Fig. 5 by expanding it into a Two-Rier series. Note that the signal amplitude is at point A (approximately 0.18 Vpp).

は差動対トランジスタのリミッタ効果が見え始15める
点とした。第5図かられかるとおり、UR,。
The limiter effect of the differential pair transistors was set at 15 points. As can be seen from Figure 5, UR.

tJcの信号振幅が大になればなるほど基本波形成。The larger the signal amplitude of tJc, the more the fundamental wave is formed.

分の増加は少なくなり十に近づく。したがって。The increase in minutes becomes smaller and approaches ten. therefore.

リミッタ回路を用いることによりNTSC方式。NTSC system by using a limiter circuit.

及びPAL方式における抵抗R2、容−JiC2のイ・
11 ・ インピーダンスのバラつきによるキャリア信号゛発生回
路の(jsc −40fH)信号の発生はほぼな。
And resistance R2 in PAL system, capacitor-JiC2 i.
11 - There is almost no generation of the (jsc -40fH) signal in the carrier signal generation circuit due to variations in impedance.

くなり、正しい位相、飽和度の色信号が記録再。The color signal with correct phase and saturation is recorded and re-recorded.

生されることになる。will be born.

またリミッタ回路を用いることにより、入力゛′端子1
7から入力されるf8c信号レベルを小さく。
In addition, by using a limiter circuit, input terminal 1
Reduce the f8c signal level input from 7.

することができ、掛算器のダイナミックレンジ“を広く
とれる。また、掛算器に入力する90度位。
The dynamic range of the multiplier can be widened.Also, the input angle to the multiplier can be about 90 degrees.

相差のあるfsc伯゛号レベルもO13〜0.4V1)
1)程度で゛よく、掛算器の差動対トランジスタでのコ
レグ0り・ベース容量等によるキャリアリークに対し゛
ても有利となる。
The fsc number level with a difference is also O13~0.4V1)
1) is sufficient, and it is also advantageous against carrier leakage due to coreg zero or base capacitance in the differential pair transistors of the multiplier.

〔発明の効果〕〔Effect of the invention〕

以上説明したようにキャリア信号発生回路の・f8o9
0度位相推移回路にリミッタ回路を挿入す15ることに
より、NTSC方式及びPAL方式に。
As explained above, ・f8o9 of the carrier signal generation circuit
By inserting a limiter circuit into the 0 degree phase shift circuit15, it becomes NTSC and PAL systems.

おいてもfscの振幅成分のばらつきをなくシ、。Also, the variation in the amplitude component of fsc can be eliminated.

キャリア信号発生回路で生じる( f8cm40.fH
)。
Generated in the carrier signal generation circuit (f8cm40.fH
).

周波数成分を消去することが可能となり、トラ。It is now possible to eliminate frequency components.

ツブとその調整が不要になり、IC化した際、20・1
2・ 低コストにでき、かっ色再現を正しくすることができる
When the knob and its adjustment are no longer necessary and it is converted to an IC, 20.1
2. It can be made at low cost and the brown color can be reproduced correctly.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、従来のキャリア信号発生回路のブロック図、
第2図は、第1図の一部分の回路図、第3図は、本発明
を採用したキャリア信号発生。 回路の一実施例のブロック図、第4図は、第3゜図の一
部の実施例の回路図、第5図は、入力信。 号振幅と基本波成分との関係を示す特性図であ。 る。                     10
11・・・90度位相推移回路 25・・・リミッタ回路 5 壷Yl【士受
FIG. 1 is a block diagram of a conventional carrier signal generation circuit.
FIG. 2 is a circuit diagram of a portion of FIG. 1, and FIG. 3 shows carrier signal generation employing the present invention. FIG. 4 is a block diagram of one embodiment of the circuit; FIG. 4 is a circuit diagram of a partial embodiment of FIG. 3; FIG. 5 is an input signal diagram. FIG. 3 is a characteristic diagram showing the relationship between the signal amplitude and the fundamental wave component. Ru. 10
11...90 degree phase shift circuit 25...Limiter circuit 5 Pot Yl

Claims (1)

【特許請求の範囲】 水平周波数の整数倍で発振する第1の発振器゛と、該第
1の発振器の出力を−と−(mは正の  4m 整数)番こ分局する一分周回路と一分周回路と、。 m            4m 諾分周回路の出力からそれぞれ水平周期毎にn。 ×90度(nは正の整数)位相推移する信号切換。 回路と、信号切換回路の2つの出力信号と一分周器出力
信号を入力として90度の位相差をもつ11′2つの信
号を発生する第1及び第2のフIJ 2ブフロツブ回路
と、第1及び第2のフリップフロ゛ツブ回路のいずれか
一方の出力が入力される第。 1のコンバータと、他方のフリップフロップ回。 路の出力が入力される第2のコンバータと、色1う副搬
送波周波数で発振する第2の発振器と、第・2の発振器
の出力を906位相差をもつ2つの信号。 に変換し、一方の信号を上記第1のコンバータ。 に、他方の信号を上記第2のコンバータにそれ。 ぞれ供給する位相推移回路と、第1のコンパ−2゜りと
第2のコンバータの出力を加算もしくは減。 算する回路を有する装置において、上記位相推。 移回路ζこリミッタ回路を内蔵することを特徴と。 するキャリア信号発生回路。
[Claims] A first oscillator that oscillates at an integral multiple of the horizontal frequency, a divide-by-one circuit that divides the output of the first oscillator into - and - (m is a positive 4m integer) number. frequency divider circuit. m 4m n for each horizontal period from the output of the frequency divider circuit. ×90 degree (n is a positive integer) signal switching with phase shift. a first and second IJ circuit that generates two signals having a phase difference of 90 degrees by inputting the two output signals of the signal switching circuit and the one-frequency divider output signal; The output of either one of the first and second flip-flop circuits is input. 1 converter and the other flip-flop circuit. a second converter into which the output of the second oscillator is input, a second oscillator that oscillates at a subcarrier frequency of one color, and the output of the second oscillator into two signals having a phase difference of 906. and converting one signal to the first converter. Then, send the other signal to the second converter. The outputs of the first converter and the second converter are added or subtracted from each other. In a device having a circuit for calculating the above phase estimation. It is characterized by a built-in transfer circuit and limiter circuit. carrier signal generation circuit.
JP20192182A 1982-11-19 1982-11-19 Carrier signal generating circuit Granted JPS5992692A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20192182A JPS5992692A (en) 1982-11-19 1982-11-19 Carrier signal generating circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20192182A JPS5992692A (en) 1982-11-19 1982-11-19 Carrier signal generating circuit

Publications (2)

Publication Number Publication Date
JPS5992692A true JPS5992692A (en) 1984-05-28
JPH0133079B2 JPH0133079B2 (en) 1989-07-11

Family

ID=16449000

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20192182A Granted JPS5992692A (en) 1982-11-19 1982-11-19 Carrier signal generating circuit

Country Status (1)

Country Link
JP (1) JPS5992692A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0360230A2 (en) * 1988-09-19 1990-03-28 Sanyo Electric Co., Ltd. Chrominance signal processing circuit and video tape recorder using such a circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0360230A2 (en) * 1988-09-19 1990-03-28 Sanyo Electric Co., Ltd. Chrominance signal processing circuit and video tape recorder using such a circuit

Also Published As

Publication number Publication date
JPH0133079B2 (en) 1989-07-11

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