JPS5992679A - Signal processing method of ccd - Google Patents

Signal processing method of ccd

Info

Publication number
JPS5992679A
JPS5992679A JP57203307A JP20330782A JPS5992679A JP S5992679 A JPS5992679 A JP S5992679A JP 57203307 A JP57203307 A JP 57203307A JP 20330782 A JP20330782 A JP 20330782A JP S5992679 A JPS5992679 A JP S5992679A
Authority
JP
Japan
Prior art keywords
reset
period
time width
signal
noise
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP57203307A
Other languages
Japanese (ja)
Inventor
Masayuki Matsunaga
誠之 松長
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP57203307A priority Critical patent/JPS5992679A/en
Publication of JPS5992679A publication Critical patent/JPS5992679A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70SSIS architectures; Circuits associated therewith
    • H04N25/71Charge-coupled device [CCD] sensors; Charge-transfer registers specially adapted for CCD sensors
    • H04N25/75Circuitry for providing, modifying or processing image signals from the pixel array

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)

Abstract

PURPOSE:To reduce a low-frequency noise superposed upon an output signal during high-frequency driving by setting the ON time width and OFF time width of a reset gate nearly in 1:1 proportion and also holding the time width of the signal output and the time width of a reset noise nearly in 1:1 proportion. CONSTITUTION:A semiconductor substrate is covered with an insulating film 4 and transfer electrodes 5a and 5b, and an output gate 6 and a reset gate 7 are provided thereupon. When a potential which has an H period and an L period almost in 1:1 proportion similarly to a potential supplied to the transfer electrode 5a is applied to the reset gate 7, an output waveform has a reset noise eriod and a signal output period almost in 1:1 proportion and a low-frequency noise outputted from a on-chip source follower circuit 10, etc., is superposed in both said periods in common. For this purpose, the signal is clamped in the reset noise period and sampled and held in both periods to obtain the difference between the outputs, so that the signal output has no low-frequency noise.

Description

【発明の詳細な説明】 〔発明の技術分野〕 本発明はCOD (Charge C!oupled 
Device;電荷結合素子)の信号処理方法に係り、
特に高(i )             、、。
[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to a COD (Charge C!
Regarding a signal processing method for a device (charge coupled device),
Especially high (i), .

速駆動されるCODイメージセンサの信号処理方法に関
する。
The present invention relates to a signal processing method for a rapidly driven COD image sensor.

〔発明の技術的背景〕[Technical background of the invention]

第7図および第一図を参照して従来の信号処理方法を説
明する。第7図はCODの信号出力部付近の断面図であ
る。P型半導体基板/上にn型拡散層−を設けて埋め込
みチャンネルとし、n型拡散層コにはポテンシャル段差
をつけるためにP型拡散層3を形成する。そして、半導
体基板を絶縁膜ダで株い、その上に転送電極ja、jb
、出力ゲート6およびリセットゲート7を設ける。出力
ゲート6とリセットゲート7の間にはフローティングデ
ィフユージ田ンざを設け、リセットゲートクの他方の側
にはリセットドレインtを設ける。
A conventional signal processing method will be explained with reference to FIG. 7 and FIG. FIG. 7 is a sectional view of the vicinity of the signal output section of the COD. An n-type diffusion layer is provided on a P-type semiconductor substrate to serve as a buried channel, and a P-type diffusion layer 3 is formed on the n-type semiconductor substrate to provide a potential step. Then, the semiconductor substrate is covered with an insulating film, and transfer electrodes ja, jb are placed on top of it.
, an output gate 6 and a reset gate 7 are provided. A floating diffuser is provided between the output gate 6 and the reset gate 7, and a reset drain t is provided on the other side of the reset gate.

また、フローティングディフユージ璽ンtの信号電荷は
NET(電界効果トランジスタ)等からなるソースフォ
ロア回路10に与え、ここで検出された電圧が電流増幅
されるようにする。
Further, the signal charge of the floating diffuser t is applied to a source follower circuit 10 consisting of a NET (field effect transistor) or the like, so that the voltage detected here is amplified by current.

第一図を参照して第1図のCODにおける従来の信号処
理方法を説明する。第一図の如く、転送(2) 電極の最終段jaにはONの期間とOFFの期間が略l
:/のパルスが加えられており、リセットゲートクには
ONの期間が短いパルスが加えられている。
A conventional signal processing method in the COD shown in FIG. 1 will be explained with reference to FIG. As shown in Figure 1, the final stage of the transfer (2) electrode has an ON period and an OFF period of approximately l.
A pulse of :/ is applied, and a pulse with a short ON period is applied to the reset gate.

時刻1. において、リセットゲートクの電位RGが′
H″(ハイレベル)になるとリセットゲートフはONシ
、フローティングディフユージwンtはリセットされる
Time 1. , the potential RG of the reset gate is '
When the level becomes H'' (high level), the reset gate is turned on and the floating differential is reset.

時刻t、において、リセットゲートクの電位FIGが1
L′(ローレベル)になるとリセットゲートタはOFF
する。これKよって、時刻t、〜t。
At time t, the reset gate potential FIG becomes 1.
When it goes to L' (low level), the reset gater turns OFF.
do. According to this K, time t, ~t.

の間にリセットノイズが重畳されることになる。Reset noise will be superimposed during this time.

時刻t8において、転送電極!Iaの電位TGが% L
 lになると転送電極3aの下の信号電荷は出カゲート
乙の下を通ってフローティングディフユージ曹ンlK流
れこみ、ここから出方信号として検出される。
At time t8, the transfer electrode! The potential TG of Ia is %L
When the signal charge reaches 1, the signal charge under the transfer electrode 3a flows into the floating diffuser 1K passing under the output gate 3, and is detected as an output signal from there.

時刻t4において、リセットゲートクの電位RGが1H
′になるとリセットゲートクはONシ、上記の動作を繰
り返す。
At time t4, the potential RG of the reset gate becomes 1H.
', the reset gate turns ON and the above operation is repeated.

ところで、リセットゲートクがONしている期間(1,
、−1,)においてはON抵抗により熱雑音が発生し、
リセットゲート7のOFFによってフローティングディ
フュージョンざに電荷として残ることになる(これを「
kTcノイズ」という)。
By the way, the period when the reset gate is ON (1,
, -1,), thermal noise is generated due to ON resistance,
When the reset gate 7 is turned off, the floating diffusion remains as a charge (this is referred to as "
kTc noise).

このkToノイズは、リセットゲート7をOFF して
から信号市、荷を移送するまでの期間(1,〜1.)、
および信号電荷が検出されている期間(1,〜t4)の
いずれの期間においても出方信号に重畳されている。そ
こで、従来はkTcノイズが前記のいずれの期間におい
ても出力信号に重畳されている点に着目し、信号電1荷
の移送される前の期間(1゜〜ts  )を一定電圧に
クランプし、t、〜t4の期間の出力信号をサンプルホ
ールドすることによりkTCノイズを消去している。こ
れを相関コ重サンプリングという。
This kTo noise is generated during the period (1, to 1.) from when the reset gate 7 is turned off until the signal is turned off and the load is transferred.
and the period (1, to t4) in which signal charges are detected are superimposed on the output signal. Therefore, conventionally, we focused on the fact that kTc noise is superimposed on the output signal in any of the above periods, and clamped the period (1° to ts) before the signal charge is transferred to a constant voltage. The kTC noise is eliminated by sampling and holding the output signal during the periods t and t4. This is called correlated multiple sampling.

〔背f技術の問題点〕[Problems with backf technology]

このような相関2重サンプリングによってkTCノイズ
を除去するためには、第一図のt、〜t。
In order to remove kTC noise by such correlated double sampling, t, to t in FIG.

期間のようカ一定電圧にクランプする期間が必要になる
。ところが、高速駆動するOCDイメージセンサでは駆
動するパルスのパルス幅そのものが狭くなり、そのため
ディニーティ比の小さいリセットパルスの周波数を高く
して第一図のtt%t。
A period in which the voltage is clamped to a constant voltage is required. However, in an OCD image sensor that is driven at high speed, the pulse width of the driving pulse itself becomes narrow, so the frequency of the reset pulse with a small dignity ratio is increased to tt%t in FIG.

期間の如きものを作ることが困難になる。これが、00
Dの高速駆動を妨げる要因となっていた。
It becomes difficult to create something like a period. This is 00
This was a factor that hindered high-speed driving of D.

また、高感度のCODイメージ七ンサでは、フローティ
ングディフユージ四ンの容量が小さくなるためkTOノ
イズはほとんど問題にならないが、ソーヌフォロア回路
などから発生する低周波ノイズの問題が新たKでてくる
Furthermore, in a high-sensitivity COD image sensor, the capacitance of the floating diffuser is small, so kTO noise is hardly a problem, but low-frequency noise generated from the Saone follower circuit, etc., becomes a new problem.

〔発明の目的〕[Purpose of the invention]

本発明は上記の従来技術の欠点に鑑みてなされたもので
、高周波駆動の下で出力信号に重畳した低周波ノイズを
低減することのできるOODの信号処理方法を提供する
ことを目的とする。
The present invention has been made in view of the above-mentioned drawbacks of the prior art, and an object of the present invention is to provide an OOD signal processing method that can reduce low-frequency noise superimposed on an output signal under high-frequency driving.

〔発明の概要〕[Summary of the invention]

上記の目的を実現するため本発明は、リセットゲートの
ON時間幅とOF’F時間幅の比を略/:/とし、前記
信号出力部からの信号出力時間幅とリセットノイズの時
間幅を略/:lとするccDの信号処理方法を提供する
ものである。
In order to achieve the above object, the present invention makes the ratio of the ON time width of the reset gate and the OFF'F time width approximately /:/, and the signal output time width from the signal output section and the reset noise time width approximately /:l.

〔発明の実施例〕[Embodiments of the invention]

第3図を参照して本発明の一実施例を説明する。 An embodiment of the present invention will be described with reference to FIG.

卯、3図の如く、転送電極jaに与える電位と同様の、
′H′の期間と% L lの期間が略l:lの電位をリ
セットゲート7に与える。このようにすると、出力波形
はリセットノイズ期間(1,〜ts)ト信号出力期間(
ta〜t7 )が略/:/のものとなる。オンチップソ
ーヌフォロア回路などから出る低周波ノイズは、t、〜
t、の期間とt、〜t7の期間に共通に重畳される。そ
のため、t5〜t6の期をクランプし、t6〜t、の期
間をサンプルホールドすると低周波ノイズが除ける。t
、〜t6の期間とt6〜t、の期間をそれぞれサンプル
ホールドし、得られたλつの出力の差を取り出せば、低
周波ノイズを除去した信号出力を得ることができる。
Rabbit, as shown in Figure 3, the same potential as that applied to the transfer electrode ja,
A potential of approximately 1:1 is applied to the reset gate 7 during the 'H' period and the %L1 period. In this way, the output waveform will be the reset noise period (1, ~ts) and the signal output period (
ta~t7) is approximately /:/. The low frequency noise emitted from the on-chip Sonne follower circuit etc. is t, ~
It is commonly superimposed on the period t, and the period t, to t7. Therefore, by clamping the period from t5 to t6 and sampling and holding the period from t6 to t, low frequency noise can be removed. t
, ~t6 and t6 to t, respectively, and extracting the difference between the obtained λ outputs, a signal output from which low frequency noise has been removed can be obtained.

〔発明の効果〕〔Effect of the invention〕

上述の如く本発明によれば、リセットゲートのON 、
 01jFの時間幅を略/:/とし、信号出力時間幅と
リセット時間幅を略/:lとしたので、リセットパルス
の周波数をあげてCODを高速駆動させることができ、
かつ、高速駆動において低周波ノイズを除去することの
できるCODの信号処理方法を伺ることかできる。
As described above, according to the present invention, when the reset gate is turned on,
Since the time width of 01jF is approximately /:/, and the signal output time width and reset time width are approximately /:l, it is possible to increase the frequency of the reset pulse and drive the COD at high speed.
In addition, we can learn about a COD signal processing method that can remove low frequency noise during high-speed driving.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はCC′Dの信号出力部付近の断面図、第一図は
従来方法を説明するタイミングチャート、第3Mは本発
明の一実施例に係る信号処理方法を説明するタイミング
チャートである。 出願人代理人  猪  股     清(り) 工 」  工 」       釘 臀
FIG. 1 is a sectional view of the vicinity of the signal output section of CC'D, FIG. 1 is a timing chart illustrating a conventional method, and FIG. 3M is a timing chart illustrating a signal processing method according to an embodiment of the present invention. Applicant's agent: Kiyoshi Inomata

Claims (1)

【特許請求の範囲】 受光部で光発生した信号電荷を電荷転送部で転送し、前
記電荷転送部から与えられた信号電荷を信号出力部で出
力し、前記信号出力部を通った信号電荷をリセットゲー
トでリセットするCODの信号処理方法において、 前記リセットゲートのON時間幅と077時間幅の比を
略l:lとし、前記信号出力部からの信号出力時間幅と
リセットノイズの時間幅を略/:lとすることを特徴と
する寺寺鴫−m−勢春00Dの信号処理方法。
[Scope of Claims] A signal charge photo-generated in a light receiving section is transferred by a charge transfer section, a signal charge given from the charge transfer section is outputted by a signal output section, and a signal charge passing through the signal output section is transferred. In a signal processing method for a COD that is reset by a reset gate, the ratio of the ON time width of the reset gate to the 077 time width is approximately l:l, and the signal output time width from the signal output section and the time width of reset noise are approximately /:l.
JP57203307A 1982-11-19 1982-11-19 Signal processing method of ccd Pending JPS5992679A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57203307A JPS5992679A (en) 1982-11-19 1982-11-19 Signal processing method of ccd

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57203307A JPS5992679A (en) 1982-11-19 1982-11-19 Signal processing method of ccd

Publications (1)

Publication Number Publication Date
JPS5992679A true JPS5992679A (en) 1984-05-28

Family

ID=16471860

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57203307A Pending JPS5992679A (en) 1982-11-19 1982-11-19 Signal processing method of ccd

Country Status (1)

Country Link
JP (1) JPS5992679A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6178284A (en) * 1984-09-25 1986-04-21 Matsushita Electric Ind Co Ltd Solid-state image pickup device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6178284A (en) * 1984-09-25 1986-04-21 Matsushita Electric Ind Co Ltd Solid-state image pickup device
JPH0473673B2 (en) * 1984-09-25 1992-11-24

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