JPS5989588A - Controller for motor - Google Patents

Abstract

PURPOSE:To prevent the abnormal rotation of a motor by breaking a control signal of the motor when the frequency and the phase of a rotating pulse by the motor do not coincide with those of a reference signal oscillator even if the prescribed period of time is elapsed after the control signal is outputted. CONSTITUTION:When the rotating speed of a motor 1 does not become the prescribed rotating speed even if the prescribed period of time is elapsed after a motor ON signal is outputted, an FF circuit 11 is reset when the charging current of a capacitor 8 reaches a threshold level VT, the gate of an AND circuit 13 is closed by the reset output, the motor ON signal from a control circuit is not supplied to a PLL circuit 3, which then stops driving the motor 1. In this manner, when any trouble occurs in a control system of the motor or a defect occurs in the rotation of the motor, the abnormal rotation of the motor can be prevented.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a motor control device that controls the drive of a rotating motor.

[Technical background of the invention]

Recently, phase-locked motor control devices have been used as motor control devices, which control by matching the frequency and phase of the oscillation output of a crystal oscillator and the rotation detection signal from the motor, in order to accurately rotate a DC motor at a predetermined rotation speed. - A device using a loop (PLL) circuit has been developed and put into practical use.

[Problems with background technology]

However, with the above-mentioned device, it has not been possible to prevent the motor from rotating abnormally when some kind of problem occurs in the motor control system or when a problem occurs in the rotation of the motor.

[Purpose of the invention]

This invention was made in view of the above circumstances, and its purpose is to provide a motor control system that can prevent abnormal rotation of the motor when some kind of malfunction occurs in the motor control system or when a problem occurs in the rotation of the motor. The goal is to provide equipment.

[Summary of the invention]

This invention enables the motor control signal to be output when the frequency and phase of the rotation A'rus by the motor do not match the frequency and phase of the reference signal oscillator even after a predetermined period of time has elapsed since the motor control signal was output. It was designed so that it could be interrupted.

[Embodiments of the invention]

An embodiment of the present invention will be described below with reference to the drawings.

In FIG. 1, a motor 1 rotates an optical disk 23 in the optical disk device shown in FIG. This motor 1 is constituted by a Hall motor whose rotational speed is controlled by a power amplifying section 22, which will be described later. A rotation/4' pulse generator (rotation detector) 2 is mechanically directly connected to the shaft of the motor 1, and this rotation/4' pulse generator 2 generates pulses with a frequency proportional to the rotation of the motor 1. This is a well-known type that is widely used in sono motors. The rotation pulse output from the rotation pulse generator 2 is PL
L (phase locked loop f) circuit is supplied to the 30 rotation pulse generator P. Further, a motor-on signal (motor control signal) from a control circuit (not shown) is supplied to one input terminal of an AND circuit 4, and the other input terminal of this AND circuit 4 is connected to a lock signal output terminal LO of the PLL circuit 3.
An input signal from CK is supplied via an inverter circuit 5. The output of the AND circuit 4 is supplied to a charge/discharge circuit 6. This charging/discharging circuit 6 is constituted by an integrating circuit consisting of a resistor 7 and a capacitor 8, and a series circuit consisting of a resistor 9 connected in parallel with the resistor 7 and a diode 10 having the polarity shown. In the charge/discharge circuit 6, when the AND circuit 4 is a logic 1 signal, the capacitor 8 is charged with a time constant τ□, and when the AND circuit 4 is a logic 0 signal, the capacitor 8 is charged with a time constant τ2. 10 and resistor 9, and the constants of resistor 7 and capacitor 8 are determined so that the time constant τ1>τ2.

The output of the charge/discharge circuit 6, that is, the signal from the connection point between the resistor 7 and the capacitor 8 is supplied to the reset input terminal of a flip-flop circuit (FF circuit) 11.
The motor-on signal is supplied to the set input terminal of the inverter circuit 12 via the inverter circuit 12. The set output of the FF circuit 11 is supplied to one input terminal of the AND circuit 13,
The other input terminal of this AND circuit 13 is supplied with the motor-on signal. The output i of the AND circuit 13 is supplied to the motor-on input terminal MON of the PLL circuit 3. Further, the oscillation signal (reference clock) from the reference signal oscillator 14 is transmitted to the clock pulse input terminal C of the PLL circuit 3.
It is supplied to P.

The PLL circuit 3 operates when a motor-on signal is supplied to the motor-on input terminal MON, compares the reference clock from the oscillator 14 and the rotational pulse from the rotational pulse generator 2, and responds accordingly to the difference in frequency. A voltage corresponding to the phase difference is output from the auto frequency control output terminal AFC, and a voltage corresponding to the phase difference is output from the auto phase control output terminal AP.
A lock signal is output from the lock signal output terminal LOCK when the above comparison results match. The signal from the output terminal AFC and the signal from the output terminal APC of the PLL circuit 3 are respectively supplied to the inverting input terminal of the differential amplifier 170 via the resistors 15 and 16, and the non-inverting input terminal of the differential amplifier 17 is supplied to the inverting input terminal of the differential amplifier 170. A constant voltage is supplied from a series circuit consisting of resistors 18 and 19. Further, a parallel circuit consisting of a resistor 20 and a capacitor 21 is connected between the output terminal and the inverting input terminal of the differential amplifier 17. Here, resistors 15, 16, 18, 19,
20. Differential amplifier 17. A power amplifying section 22 is constituted by the capacitor 21 and the capacitor 21 . This power amplification section 22
By adding the outputs from the output terminal AFC and output terminal APC of the PLL circuit 3, and comparing and amplifying them with a certain constant value,
It provides rotational power to the motor 1.

Next, the operation in such a configuration will be explained. For example, assume that a motor-on signal is supplied from a control circuit (not shown). At this time, the FF circuit 11 is set, and the dart of the AND circuit 13 is opened by this set output. As a result, the motor-on signal is supplied to the input terminal MOH of the PLL circuit 3 via the AND circuit 13.

Then, the PLL circuit 3 starts operating and calculates the difference in frequency by comparing the reference clock signal from the oscillator 4 and the rotation pulse generated by the rotation pulse generator 2 according to the rotation of the motor 1. The corresponding voltage and the voltage corresponding to the phase difference are respectively output from the AFC.

Output from APC. Accordingly, the power amplifying section 20 adds the voltages from the output terminals AFC and APC, compares and amplifies this added value with a predetermined value, and uses this output to supply current to each coil in the motor 1 to control the rotation. be done. Further, the AND circuit 4 is established by the motor ON signal, and the output of the AND circuit 4 becomes a logic "1# signal," and the capacitor 8 is charged with a time constant τ1.Then, the rotation pulse of the motor 1 and the reference clock are When the frequency and phase match,
The PLL circuit 3 outputs a lock signal from the output terminal LOCK.

Therefore, if the rotational speed of the motor 1 does not reach the predetermined rotational speed within a certain period of time after the motor-on signal is output, a lock signal is output from the PLL circuit 3. Then, the AND circuit 4 fails and the output of the AND circuit 4 becomes a logic @0'' signal.As a result, the diode 10 and the resistor 9 cause the voltage to be charged to the capacitor 8 to be It is discharged at a constant τ2.

By the way, if the rotational speed of the motor 1 does not reach the predetermined rotational speed even after a certain period of time has passed since the motor-on signal was output, when the charging voltage of the capacitor 8 reaches the shoulder level vT, the FF circuit 11 The reset output closes the dart of the cyanand circuit 13, and the motor-on signal from the control circuit (not shown) is no longer supplied to the PLL circuit 3, causing the PLL circuit 3 to stop driving the motor 1. Thereafter, when the lock signal is monitored by a control circuit (not shown), the charging voltage of the capacitor 8 is discharged by stopping the motor-on signal.

Further, even when a lock signal is output from the PLL circuit 3 due to a disturbance or the like while the motor 1 is rotating, the same operation as described above is performed.

Incidentally, a timing chart of the main parts in the above operation is shown in FIG.

In this way, when abnormal rotation of the motor occurs, it is possible to reliably prevent the abnormal rotation of the motor, and the control circuit need only monitor it every few seconds, for example, instead of constantly monitoring it.

In the above embodiments, the high-frequency oscillator is described as a clock having one frequency, but it may be one in which the oscillation frequency is variable and the rotational speed of the motor can be changed. Further, the charging/discharging circuit and the FF circuit may be realized by a monostable multivibrator circuit.

〔Effect of the invention〕

As described in detail above, according to the present invention, it is possible to provide a motor control device that can prevent abnormal rotation of the motor when some kind of malfunction occurs in the motor control system or a failure occurs in the 9-1st rotation of the motor.

[Brief explanation of drawings]

The drawings show one embodiment of the present invention, and FIG. 1 is an electric circuit diagram schematically showing the overall configuration, FIG. 2 is a schematic configuration diagram of an optical disk device showing the relationship between a motor and an optical disk, and FIG. The figure is a timing chart for explaining the main parts of the operation. 1...Motor, 2...Rotating nof pulse generator, 3...
・PLL circuit, 4...AND circuit, 6...charging/discharging circuit, 8...capacitor, 11...FF circuit, 13.
...AND circuit, 14...Reference signal oscillator, 17...
- Differential amplifier, 22...power amplification section. Applicant's agent: Takehiko Suzue 10-

Claims (1)

[Claims] A rotation detector generates rotation pulses with a frequency corresponding to the rotation speed of the motor, and the frequency and phase of the rotation pulse generated by the rotation detector are compared with the frequency and phase of a reference signal oscillator in accordance with the motor control signal. , a control means for controlling the rotational speed of the motor according to the comparison result; a comparison means for outputting a lock signal when the comparison result matches; A motor control device comprising time monitoring means for cutting off the motor control signal when the lock signal is not supplied.